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/Documentation/scheduler/
Dsched-capacity.rst2 Capacity Aware Scheduling
5 1. CPU Capacity
16 CPU capacity is a measure of the performance a CPU can reach, normalized against
18 asymmetric CPU capacity systems, as they contain CPUs of different capacities.
20 Disparity in maximum attainable performance (IOW in maximum CPU capacity) stems
36 capacity(cpu) = work_per_hz(cpu) * max_freq(cpu)
41 Two different capacity values are used within the scheduler. A CPU's
42 ``capacity_orig`` is its maximum attainable capacity, i.e. its maximum
43 attainable performance level. A CPU's ``capacity`` is its ``capacity_orig`` to
47 Note that a CPU's ``capacity`` is solely intended to be used by the CFS class,
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Dsched-energy.rst64 knowledge about the platform's topology, which include the 'capacity' of CPUs,
71 EAS (as well as the rest of the scheduler) uses the notion of 'capacity' to
72 differentiate CPUs with different computing throughput. The 'capacity' of a CPU
74 frequency compared to the most capable CPU of the system. Capacity values are
77 to capacity and utilization values, EAS is able to estimate how big/busy a
79 energy trade-offs. The capacity of CPUs is provided via arch-specific code
135 for the CPU with the highest spare capacity (CPU capacity - CPU utilization) in
161 The CPU capacity and power cost associated with each OPP is listed in
185 maximum spare capacity in the two performance domains. In this example,
283 being run, they will require all of the available CPU capacity, and there isn't
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Dindex.rst15 sched-capacity
Dsched-bwc.rst164 The larger period here allows for increased burst capacity.
174 response at the expense of burst capacity.
/Documentation/devicetree/bindings/arm/
Dcpu-capacity.txt2 ARM CPUs capacity bindings
15 2 - CPU capacity definition
18 CPU capacity is a number that provides the scheduler information about CPUs
27 final capacity should, however, be:
43 3 - capacity-dmips-mhz
46 capacity-dmips-mhz is an optional cpu node [1] property: u32 value
47 representing CPU capacity expressed in normalized DMIPS/MHz. At boot time, the
48 maximum frequency available to the cpu is then used to calculate the capacity
51 capacity-dmips-mhz property is all-or-nothing: if it is specified for a cpu
53 fall back to the default capacity value for every CPU. If cpufreq is not
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Dcpus.yaml234 capacity-dmips-mhz:
237 u32 value representing CPU capacity (see ./cpu-capacity.txt) in
238 DMIPS/MHz, relative to highest capacity-dmips-mhz
/Documentation/power/
Dpower_supply_class.rst61 | **Charge/Energy/Capacity - how to not confuse** |
63 | **Because both "charge" (µAh) and "energy" (µWh) represents "capacity" |
67 | attributes represents capacity in µAh only. |
69 | attributes represents capacity in µWh only. |
70 | - `CAPACITY` |
71 | attribute represents capacity in *percents*, from 0 to 100. |
108 between voltage and battery capacity, but some dumb
109 batteries use voltage for very approximated calculation of capacity.
146 (typically 20% of battery capacity).
151 this setting (typically 10% of battery capacity).
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/Documentation/devicetree/bindings/power/supply/
Dbattery.yaml50 description: battery design capacity
80 ocv-capacity-celsius:
83 for each of the battery capacity lookup table.
110 '^ocv-capacity-table-[0-9]+$':
114 of the battery and corresponding battery capacity percent, which is used
115 to look up battery capacity according to current OCV value. And the open
121 - description: battery capacity percent
146 ocv-capacity-celsius = <(-10) 0 10>;
148 ocv-capacity-table-0 = <4185000 100>, <4113000 95>, <4066000 90>;
150 ocv-capacity-table-1 = <4200000 100>, <4185000 95>, <4113000 90>;
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Dmaxim,ds2760.txt23 - rated-capacity-microamp-hours:
24 The rated capacity of the battery, in mAh.
Dmax17040_battery.txt16 - maxim,double-soc : Certain devices return double the capacity.
19 SOC == State of Charge == Capacity.
Dbq24190.txt16 phase (typically 20% of battery capacity).
19 this setting (typically 10% of battery capacity).
Dsc27xx-fg.txt27 ocv-capacity-celsius = <20>;
28 ocv-capacity-table-0 = <4185000 100>, <4113000 95>, <4066000 90>,
Dltc2941.txt3 All chips measure battery capacity.
/Documentation/devicetree/bindings/net/
Dmarvell-neta-bm.txt12 - pool<0 : 3>,capacity: size of external buffer pointers' ring maintained
34 pool2,capacity = <4096>;
/Documentation/admin-guide/laptops/
Dlg-laptop.rst44 sets the maximum capacity to charge the battery. Limiting the charge
45 reduces battery capacity loss over time.
/Documentation/devicetree/bindings/thermal/
Dthermal-idle.yaml65 capacity-dmips-mhz = <1024>;
81 capacity-dmips-mhz = <1024>;
/Documentation/driver-api/mmc/
Dmmc-dev-attrs.rst76 For MMC, "preferred_erase_size" is the high-capacity
78 based on the capacity of the card.
/Documentation/ABI/testing/
Dsysfs-class-power263 What: /sys/class/power_supply/<supply_name>/capacity
267 Fine grain representation of battery capacity.
277 Maximum battery capacity trip-wire value where the supply will
292 Minimum battery capacity trip-wire value where the supply will
307 Battery capacity measurement becomes unreliable without
312 100% means, that the capacity related values are basically
323 Coarse representation of battery capacity.
/Documentation/scsi/
Daha152x.rst132 total capacity of disks in blocks (sectors).
151 cylinders by dividing the capacity reported by the disk by 64*32 (1 MB).
158 63 for sectors and then divides the capacity of the disk by 255*63
/Documentation/admin-guide/pm/
Dcpufreq.rst25 there is a natural tradeoff between the CPU capacity (the number of instructions
32 instructions so quickly and maintaining the highest available CPU capacity for a
34 It also may not be physically possible to maintain maximum CPU capacity for too
35 long for thermal or power supply capacity reasons or similar. To cover those
41 capacity, so as to decide which P-states to put the CPUs into. Of course, since
59 Scaling governors implement algorithms to estimate the required CPU capacity.
511 capacity.
559 which may not be suitable for systems with limited power supply capacity (e.g.
658 limited capacity, such as batteries, so the ability to disable the boost
/Documentation/powerpc/
Dcxlflash.rst100 with it does not exceed the physical capacity.
330 This ioctl is used to detect various changes such as the capacity of
408 available capacity.
415 - Maximum total capacity of provisioned LUNs for the port (4K blocks)
416 - Current total capacity of provisioned LUNs for the port (4K blocks)
418 With this information, the number of available LUNs and capacity can be
/Documentation/filesystems/
Dzonefs.rst113 maximum size, that is, beyond the zone capacity. Any access exceeding the zone
114 capacity is failed with the -EFBIG error.
120 capacity of the zone file, or in other words, the maximum file size.
159 the zone, or up to the zone capacity, in which case the file's zone is
420 of a file as reported by stat() and fstat() indicates the capacity of the file
435 capacity in this example. Of note is that the "IO block" field always
/Documentation/ide/
DChangeLog.ide-tape.1995-2002222 * function to get tape capacity in frames: tape->capacity.
229 * - Add capacity, logical_blk_num and first/last_frame_position
DChangeLog.ide-cd.1994-200450 * Read total cdrom capacity during open.
64 * 3.02 Sep 16, 1995 -- Stick total disk capacity in partition table as well.
252 * - Fix real capacity reporting.
/Documentation/admin-guide/device-mapper/
Ddm-zoned.rst24 and memory usage as well as storage capacity loss). For a 10TB
49 Metadata zones are not reported as useable capacity to the user.

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