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/Documentation/scheduler/
Dsched-capacity.rst2 Capacity Aware Scheduling
5 1. CPU Capacity
9 ----------------
13 different performance characteristics - on such platforms, not all CPUs can be
16 CPU capacity is a measure of the performance a CPU can reach, normalized against
17 the most performant CPU in the system. Heterogeneous systems are also called
18 asymmetric CPU capacity systems, as they contain CPUs of different capacities.
20 Disparity in maximum attainable performance (IOW in maximum CPU capacity) stems
23 - not all CPUs may have the same microarchitecture (µarch).
24 - with Dynamic Voltage and Frequency Scaling (DVFS), not all CPUs may be
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Dsched-energy.rst6 ---------------
10 Energy Model (EM) of the CPUs to select an energy efficient CPU for each task,
17 /!\ EAS does not support platforms with symmetric CPU topologies /!\
19 EAS operates only on heterogeneous CPU topologies (such as Arm big.LITTLE)
25 please refer to its documentation (see Documentation/power/energy-model.rst).
29 -----------------------------
32 - energy = [joule] (resource like a battery on powered devices)
33 - power = energy/time = [joule/second] = [watt]
39 --------------------
45 -----------
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Dsched-bwc.rst5 [ This document only discusses CPU bandwidth control for SCHED_NORMAL.
6 The SCHED_RT case is covered in Documentation/scheduler/sched-rt-group.rst ]
9 specification of the maximum CPU bandwidth available to a group or hierarchy.
13 microseconds of CPU time. That quota is assigned to per-cpu run queues in
21 is transferred to cpu-local "silos" on a demand basis. The amount transferred
25 ----------
26 Quota and period are managed within the cpu subsystem via cgroupfs.
28 cpu.cfs_quota_us: the total available run-time within a period (in microseconds)
29 cpu.cfs_period_us: the length of a period (in microseconds)
30 cpu.stat: exports throttling statistics [explained further below]
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/Documentation/devicetree/bindings/arm/
Dcpu-capacity.txt2 ARM CPUs capacity bindings
6 1 - Introduction
15 2 - CPU capacity definition
18 CPU capacity is a number that provides the scheduler information about CPUs
19 heterogeneity. Such heterogeneity can come from micro-architectural differences
23 capture a first-order approximation of the relative performance of CPUs.
25 CPU capacities are obtained by running a suitable benchmark. This binding makes
27 final capacity should, however, be:
29 * A "single-threaded" or CPU affine benchmark
30 * Divided by the running frequency of the CPU executing the benchmark
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Dcpus.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
14 the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
15 defining properties for every cpu.
17 Bindings for CPU nodes follow the Devicetree Specification, available from:
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
34 cpus and cpu node bindings definition
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/Documentation/devicetree/bindings/thermal/
Dthermal-idle.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/thermal/thermal-idle.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Daniel Lezcano <daniel.lezcano@linaro.org>
22 const: thermal-idle
24 A thermal-idle node describes the idle cooling device properties to
27 '#cooling-cells':
31 the cooling-maps reference. The first cell is the minimum cooling state
34 duration-us:
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Dthermal-cooling-devices.yaml1 # SPDX-License-Identifier: (GPL-2.0)
4 ---
5 $id: http://devicetree.org/schemas/thermal/thermal-cooling-devices.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Amit Kucheria <amitk@kernel.org>
20 - thermal-sensor: device that measures temperature, has SoC-specific bindings
21 - cooling-device: device used to dissipate heat either passively or actively
22 - thermal-zones: a container of the following node types used to describe all
28 - Passive cooling: by means of regulating device performance. A typical
29 passive cooling mechanism is a CPU that has dynamic voltage and frequency
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/Documentation/admin-guide/pm/
Dcpufreq.rst1 .. SPDX-License-Identifier: GPL-2.0
7 CPU Performance Scaling
15 The Concept of CPU Performance Scaling
20 Operating Performance Points or P-states (in ACPI terminology). As a rule,
22 can be retired by the CPU over a unit of time, but also the higher the clock
24 time (or the more power is drawn) by the CPU in the given P-state. Therefore
25 there is a natural tradeoff between the CPU capacity (the number of instructions
26 that can be executed over a unit of time) and the power drawn by the CPU.
29 as possible and then there is no reason to use any P-states different from the
30 highest one (i.e. the highest-performance frequency/voltage configuration
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/Documentation/core-api/
Dcircular-buffers.rst12 (1) Convenience functions for determining information about power-of-2 sized
27 (*) Measuring power-of-2 buffers.
30 - The producer.
31 - The consumer.
41 (1) A 'head' index - the point at which the producer inserts items into the
44 (2) A 'tail' index - the point at which the consumer finds the next item in
58 than 1 if multiple items or variable-sized items are to be included in the
63 Measuring power-of-2 buffers
66 Calculation of the occupancy or the remaining capacity of an arbitrarily sized
68 modulus (divide) instruction. However, if the buffer is of a power-of-2 size,
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Dworkqueue.rst32 worker thread per CPU and a single threaded (ST) wq had one worker
33 thread system-wide. A single MT wq needed to keep around the same
35 wq users over the years and with the number of CPU cores continuously
42 worker pool. An MT wq could provide only one execution context per CPU
60 * Use per-CPU unified worker pools shared by all wq to provide
83 called worker-pools.
85 The cmwq design differentiates between the user-facing workqueues that
87 which manages worker-pools and processes the queued work items.
89 There are two worker-pools, one for normal work items and the other
90 for high priority ones, for each possible CPU and some extra
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Dassoc_array.rst48 The implementation uses a tree of 16-pointer nodes internally that are indexed
51 what would otherwise be a series of single-occupancy nodes. Further, nodes
68 ./script/config -e ASSOCIATIVE_ARRAY
72 -----------
82 after an RCU grace period has passed - thus allowing access functions to
112 ----------------
126 This should return a chunk of caller-supplied index key starting at the
137 rather than from a caller-supplied index key.
153 differs from the given index key or -1 if they are the same.
166 ----------------------
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/Documentation/scsi/
Daha152x.rst1 .. SPDX-License-Identifier: GPL-2.0
5 Adaptec AHA-1520/1522 SCSI driver for Linux (aha152x)
8 Copyright |copy| 1993-1999 Jürgen Fischer <fischer@norbit.de>
14 bottom-half handler complete()).
17 error handling code in 2.3, produced less cpu load (much
27 IRQ interrupt level (9-12; default 11)
28 SCSI_ID scsi id of controller (0-7; default 7)
42 - DAUTOCONF
43 use configuration the controller reports (AHA-152x only)
45 - DSKIP_BIOSTEST
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/Documentation/ide/
DChangeLog.ide-tape.1995-20022 * Ver 0.1 Nov 1 95 Pre-working code :-)
8 * we received non serial read-ahead requests from the
17 * ide tapes :-)
73 * Removed some old (non-active) code which had
96 * Pre-calculation of the expected read/write request
109 * continuous view of the media - any mix of block sizes
116 * By cooperating with ide-dma.c, bus mastering DMA can
119 * reduce the CPU's overhead when accessing the device,
120 * and can be enabled by using hdparm -d1 on the tape's
122 * comments in ide-dma.c.
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/Documentation/admin-guide/device-mapper/
Ddm-zoned.rst2 dm-zoned
5 The dm-zoned device mapper target exposes a zoned block device (ZBC and
7 pattern constraints. In effect, it implements a drive-managed zoned
10 host-managed zoned block devices and can mitigate the potential
11 device-side performance degradation due to excessive random writes on
12 host-aware zoned block devices.
21 http://www.t13.org/Documents/UploadedDocuments/docs2015/di537r05-Zoned_Device_ATA_Command_Set_ZAC.p…
23 The dm-zoned implementation is simple and minimizes system overhead (CPU
24 and memory usage as well as storage capacity loss). For a 10TB
25 host-managed disk with 256 MB zones, dm-zoned memory usage per disk
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/Documentation/devicetree/bindings/mtd/
Dgpmc-nand.txt7 explained in a separate documents - please refer to
8 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
11 Documentation/devicetree/bindings/mtd/nand-controller.yaml
16 - compatible: "ti,omap2-nand"
17 - reg: range id (CS number), base offset and length of the
19 - interrupts: Two interrupt specifiers, one for fifoevent, one for termcount.
23 - nand-bus-width: Set this numeric value to 16 if the hardware
27 - ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
28 "sw" 1-bit Hamming ecc code via software
30 "hw-romcode" <deprecated> use "ham1" instead
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/Documentation/driver-api/iio/
Dbuffers.rst13 :file:`/dev/iio:device{X}` character device node, thus reducing the CPU load.
21 * :file:`length`, the total number of data samples (capacity) that can be
50 For example, a driver for a 3-axis accelerometer with 12 bit resolution where
51 data is stored in two 8-bits registers as follows::
54 +---+---+---+---+---+---+---+---+
56 +---+---+---+---+---+---+---+---+
59 +---+---+---+---+---+---+---+---+
61 +---+---+---+---+---+---+---+---+
116 Setting **scan_index** to -1 can be used to indicate that the specific channel
122 .. kernel-doc:: include/linux/iio/buffer.h
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/Documentation/x86/
Dresctrl_ui.rst1 .. SPDX-License-Identifier: GPL-2.0
9 :Authors: - Fenghua Yu <fenghua.yu@intel.com>
10 - Tony Luck <tony.luck@intel.com>
11 - Vikas Shivappa <vikas.shivappa@intel.com>
31 # mount -t resctrl resctrl [-o cdp[,cdpl2][,mba_MBps]] /sys/fs/resctrl
47 pseudo-locking is a unique way of using cache control to "pin" or
49 "Cache Pseudo-Locking".
86 own settings for cache use which can over-ride
89 Annotated capacity bitmasks showing how all
118 Corresponding region is pseudo-locked. No
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/Documentation/ABI/testing/
Dsysfs-devices-system-cpu1 What: /sys/devices/system/cpu/
2 Date: pre-git history
3 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
5 A collection of both global and individual CPU attributes
7 Individual CPU attributes are contained in subdirectories
8 named by the kernel's logical CPU number, e.g.:
10 /sys/devices/system/cpu/cpu#/
12 What: /sys/devices/system/cpu/kernel_max
13 /sys/devices/system/cpu/offline
14 /sys/devices/system/cpu/online
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/Documentation/filesystems/
Df2fs.rst1 .. SPDX-License-Identifier: GPL-2.0
4 WHAT IS Flash-Friendly File System (F2FS)?
7 NAND flash memory-based storage devices, such as SSD, eMMC, and SD cards, have
13 F2FS is a file system exploiting NAND flash memory-based storage devices, which
14 is based on Log-structured File System (LFS). The design has been focused on
18 Since a NAND flash memory-based storage device shows different characteristic
20 F2FS and its tools support various parameters not only for configuring on-disk
26 - git://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk/f2fs-tools.git
30 - linux-f2fs-devel@lists.sourceforge.net
35 Log-structured File System (LFS)
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Dproc.rst1 .. SPDX-License-Identifier: GPL-2.0
24 1.1 Process-Specific Subdirectories
36 3 Per-Process Parameters
37 3.1 /proc/<pid>/oom_adj & /proc/<pid>/oom_score_adj - Adjust the oom-killer
39 3.2 /proc/<pid>/oom_score - Display current oom-killer score
40 3.3 /proc/<pid>/io - Display the IO accounting fields
41 3.4 /proc/<pid>/coredump_filter - Core dump filtering settings
42 3.5 /proc/<pid>/mountinfo - Information about mounts
44 3.7 /proc/<pid>/task/<tid>/children - Information about task children
45 3.8 /proc/<pid>/fdinfo/<fd> - Information about opened file
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/Documentation/devicetree/bindings/remoteproc/
Dti,k3-r5f-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F
17 capacity. These are used together with other processors present on the SoC
20 Each Dual-Core R5F sub-system is represented as a single DTS node
33 - ti,am654-r5fss
34 - ti,j721e-r5fss
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/Documentation/admin-guide/laptops/
Dlaptop-mode.rst2 How to conserve battery power using laptop-mode
12 ------------
31 ------------
41 located in /etc/default/laptop-mode on Debian-based systems, or in
42 /etc/sysconfig/laptop-mode on other systems.
52 -------
64 * If you mount some of your ext3/reiserfs filesystems with the -n option, then
67 wrong options -- or it will fail because it cannot write to /etc/mtab.
80 -----------
117 -------------
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/Documentation/admin-guide/sysctl/
Dkernel.rst5 .. See scripts/check-sysctl-docs to keep this up to date
14 ------------------------------------------------------------------------------
38 If BSD-style process accounting is enabled these values control
123 Ctrl-Alt-Delete). Writing a value to this file which doesn't
124 correspond to a running process will result in ``-ESRCH``.
126 See also `ctrl-alt-del`_.
216 ctrl-alt-del
219 When the value in this file is 0, ctrl-alt-del is trapped and
227 mode, the ctrl-alt-del is intercepted by the program before it
272 See :doc:`/driver-api/firmware/fallback-mechanisms`.
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/Documentation/admin-guide/
Dkernel-parameters.txt5 force -- enable ACPI if default was off
6 on -- enable ACPI but allow fallback to DT [arm64]
7 off -- disable ACPI if default was on
8 noirq -- do not use ACPI for IRQ routing
9 strict -- Be less tolerant of platforms that are not
11 rsdt -- prefer RSDT over (default) XSDT
12 copy_dsdt -- copy DSDT to memory
26 If set to vendor, prefer vendor-specific driver
58 Documentation/firmware-guide/acpi/debug.rst for more information about
121 Disable auto-serialization of AML methods
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Dcgroup-v2.rst9 conventions of cgroup v2. It describes all userland-visible aspects
12 v1 is available under :ref:`Documentation/admin-guide/cgroup-v1/index.rst <cgroup-v1>`.
17 1-1. Terminology
18 1-2. What is cgroup?
20 2-1. Mounting
21 2-2. Organizing Processes and Threads
22 2-2-1. Processes
23 2-2-2. Threads
24 2-3. [Un]populated Notification
25 2-4. Controlling Controllers
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