Searched +full:timeout +full:- +full:sec (Results 1 – 25 of 53) sorted by relevance
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| /Documentation/watchdog/ |
| D | mlx-wdt.rst | 16 Actual HW timeout can be defined as a power of 2 msec.
17 e.g. timeout 20 sec will be rounded up to 32768 msec.
18 The maximum timeout period is 32 sec (32768 msec.),
19 Get time-left isn't supported
22 Actual HW timeout is defined in sec. and it's the same as
23 a user-defined timeout.
24 Maximum timeout is 255 sec.
25 Get time-left is supported.
28 Same as Type 2 with extended maximum timeout period.
29 Maximum timeout is 65535 sec.
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| /Documentation/devicetree/bindings/watchdog/ |
| D | stericsson-coh901327.txt | 1 ST-Ericsson COH 901 327 Watchdog timer
4 - compatible: must be "stericsson,coh901327".
5 - reg: physical base address of the controller and length of memory mapped
7 - interrupts: the interrupt used for the watchdog timeout warning.
10 - timeout-sec: contains the watchdog timeout in seconds.
18 timeout-sec = <60>;
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| D | atmel-wdt.txt | 3 ** at91sam9-wdt
6 - compatible: must be "atmel,at91sam9260-wdt".
7 - reg: physical base address of the controller and length of memory mapped
9 - clocks: phandle to input clock.
12 - timeout-sec: contains the watchdog timeout in seconds.
13 - interrupts : Should contain WDT interrupt.
14 - atmel,max-heartbeat-sec : Should contain the maximum heartbeat value in
17 - atmel,min-heartbeat-sec : Should contain the minimum heartbeat value in
18 seconds. This value must be smaller than the max-heartbeat-sec value.
20 - atmel,watchdog-type : Should be "hardware" or "software". Hardware watchdog
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| D | brcm,bcm2835-pm-wdog.txt | 5 - compatible : should be "brcm,bcm2835-pm-wdt"
6 - reg : Specifies base physical address and size of the registers.
10 - timeout-sec : Contains the watchdog timeout in seconds
15 compatible = "brcm,bcm2835-pm-wdt";
17 timeout-sec = <10>;
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| D | cadence-wdt.txt | 2 -------------------------------------------
5 - compatible : Should be "cdns,wdt-r1p2".
6 - clocks : This is pclk (APB clock).
7 - interrupts : This is wd_irq - watchdog timeout interrupt.
10 - reset-on-timeout : If this property exists, then a reset is done
12 - timeout-sec : Watchdog timeout value (in seconds).
16 compatible = "cdns,wdt-r1p2";
18 interrupt-parent = <&intc>;
21 reset-on-timeout;
22 timeout-sec = <10>;
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| D | pnx4008-wdt.txt | 4 - compatible: must be "nxp,pnx4008-wdt"
5 - reg: physical base address of the controller and length of memory mapped
9 - timeout-sec: contains the watchdog timeout in seconds.
14 compatible = "nxp,pnx4008-wdt";
16 timeout-sec = <10>;
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| D | sirfsoc_wdt.txt | 4 - compatible: "sirf,prima2-tick"
5 - reg: Address range of tick timer/WDT register set
6 - interrupts: interrupt number to the cpu
9 - timeout-sec : Contains the watchdog timeout in seconds
14 compatible = "sirf,prima2-tick";
17 timeout-sec = <30>;
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| D | sigma,smp8642-wdt.txt | 4 - compatible: Should be "sigma,smp8642-wdt"
5 - reg: Specifies the physical address region
6 - clocks: Should be a phandle to the clock
9 - timeout-sec: watchdog timeout in seconds
14 compatible = "sigma,smp8642-wdt";
17 timeout-sec = <30>;
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| D | qcom,pm8916-wdt.txt | 3 This pm8916 watchdog timer controller must be under pm8916-pon node.
6 - compatible: should be "qcom,pm8916-wdt"
9 - interrupts : Watchdog pre-timeout (bark) interrupt.
10 - timeout-sec : Watchdog timeout value in seconds.
15 compatible = "qcom,pm8916", "qcom,spmi-pmic";
19 compatible = "qcom,pm8916-pon";
23 compatible = "qcom,pm8916-wdt";
25 timeout-sec = <10>;
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| D | ziirave-wdt.txt | 4 - compatible: must be "zii,rave-wdt"
5 - reg: i2c slave address of device, usually 0x38
8 - timeout-sec: Watchdog timeout value in seconds.
9 - reset-duration-ms: Duration of the pulse generated when the watchdog times
15 compatible = "zii,rave-wdt";
17 timeout-sec = <30>;
18 reset-duration-ms = <30>;
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| D | meson-wdt.txt | 5 - compatible : depending on the SoC this should be one of:
6 "amlogic,meson6-wdt" on Meson6 SoCs
7 "amlogic,meson8-wdt" and "amlogic,meson6-wdt" on Meson8 SoCs
8 "amlogic,meson8b-wdt" on Meson8b SoCs
9 "amlogic,meson8m2-wdt" and "amlogic,meson8b-wdt" on Meson8m2 SoCs
10 - reg : Specifies base physical address and size of the registers.
13 - timeout-sec: contains the watchdog timeout in seconds.
18 compatible = "amlogic,meson6-wdt";
20 timeout-sec = <10>;
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| D | ts4800-wdt.txt | 4 - compatible: must be "technologic,ts4800-wdt"
5 - syscon: phandle / integer array that points to the syscon node which
7 - phandle to FPGA's syscon
8 - offset to the watchdog register
11 - timeout-sec: contains the watchdog timeout in seconds.
16 compatible = "syscon", "simple-mfd";
18 reg-io-width = <2>;
21 compatible = "technologic,ts4800-wdt";
23 timeout-sec = <10>;
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| D | sprd-wdt.txt | 4 - compatible : Should be "sprd,sp9860-wdt".
5 - reg : Specifies base physical address and size of the registers.
6 - interrupts : Exactly one interrupt specifier.
7 - timeout-sec : Contain the default watchdog timeout in seconds.
8 - clock-names : Contain the input clock names.
9 - clocks : Phandles to input clocks.
13 compatible = "sprd,sp9860-wdt";
16 timeout-sec = <12>;
17 clock-names = "enable", "rtc_enable";
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| D | digicolor-wdt.txt | 10 - compatible : Should be "cnxt,cx92755-wdt"
11 - reg : Specifies base physical address and size of the registers
12 - clocks : phandle; specifies the clock that drives the timer
16 - timeout-sec : Contains the watchdog timeout in seconds
21 compatible = "cnxt,cx92755-wdt";
24 timeout-sec = <15>;
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| D | davinci-wdt.txt | 4 - compatible : Should be "ti,davinci-wdt", "ti,keystone-wdt"
5 - reg : Should contain WDT registers location and length
8 - timeout-sec : Contains the watchdog timeout in seconds
9 - clocks : the clock feeding the watchdog timer.
11 See clock-bindings.txt
14 Davinci DM646x - https://www.ti.com/lit/ug/spruer5b/spruer5b.pdf
15 Keystone - https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf
20 compatible = "ti,davinci-wdt";
22 timeout-sec = <30>;
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| D | sbsa-gwdt.txt | 4 after two stages of timeout have elapsed. A detailed definition of the
5 watchdog timer can be found in the ARM document: ARM-DEN-0029 - Server
9 - compatible: Should at least contain "arm,sbsa-gwdt".
11 - reg: Each entry specifies the base physical address of a register frame
17 - interrupts: Should contain the Watchdog Signal 0 (WS0) SPI (Shared
21 - timeout-sec: Watchdog timeout values (in seconds).
26 compatible = "arm,sbsa-gwdt";
30 timeout-sec = <30>;
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| D | alphascale-asm9260.txt | 5 - compatible : should be "alphascale,asm9260-wdt".
6 - reg : Specifies base physical address and size of the registers.
7 - clocks : the clocks feeding the watchdog timer. See clock-bindings.txt
8 - clock-names : should be set to
9 "mod" - source for tick counter.
10 "ahb" - ahb gate.
11 - resets : phandle pointing to the system reset controller with
13 - reset-names : should be set to "wdt_rst".
16 - timeout-sec : shall contain the default watchdog timeout in seconds,
17 if unset, the default timeout is 30 seconds.
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| D | mtk-wdt.txt | 5 - compatible should contain:
6 "mediatek,mt2701-wdt", "mediatek,mt6589-wdt": for MT2701
7 "mediatek,mt2712-wdt", "mediatek,mt6589-wdt": for MT2712
8 "mediatek,mt6589-wdt": for MT6589
9 "mediatek,mt6797-wdt", "mediatek,mt6589-wdt": for MT6797
10 "mediatek,mt7622-wdt", "mediatek,mt6589-wdt": for MT7622
11 "mediatek,mt7623-wdt", "mediatek,mt6589-wdt": for MT7623
12 "mediatek,mt7629-wdt", "mediatek,mt6589-wdt": for MT7629
13 "mediatek,mt8183-wdt", "mediatek,mt6589-wdt": for MT8183
14 "mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516
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| D | atmel-sama5d4-wdt.txt | 4 - compatible: "atmel,sama5d4-wdt" or "microchip,sam9x60-wdt"
5 - reg: base physical address and length of memory mapped region.
8 - timeout-sec: watchdog timeout value (in seconds).
9 - interrupts: interrupt number to the CPU.
10 - atmel,watchdog-type: should be "hardware" or "software".
15 - atmel,idle-halt: present if you want to stop the watchdog when the CPU is
22 - atmel,dbg-halt: present if you want to stop the watchdog when the CPU is
27 compatible = "atmel,sama5d4-wdt";
30 timeout-sec = <10>;
31 atmel,watchdog-type = "hardware";
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| D | marvel.txt | 5 - Compatibility : "marvell,orion-wdt"
6 "marvell,armada-370-wdt"
7 "marvell,armada-xp-wdt"
8 "marvell,armada-375-wdt"
9 "marvell,armada-380-wdt"
11 - reg : Should contain two entries: first one with the
15 For "marvell,armada-375-wdt" and "marvell,armada-380-wdt":
17 - reg : A third entry is mandatory and should contain the
20 Clocks required for compatibles = "marvell,orion-wdt",
21 "marvell,armada-370-wdt":
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| D | st_lpc_wdt.txt | 1 STMicroelectronics Low Power Controller (LPC) - Watchdog
7 [See: ../rtc/rtc-st-lpc.txt for RTC options]
8 [See: ../timer/st,stih407-lpc for Clocksource options]
12 - compatible : Should be: "st,stih407-lpc"
13 - reg : LPC registers base address + size
14 - interrupts : LPC interrupt line number and associated flags
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
16 - st,lpc-mode : The LPC can run either one of three modes:
24 - st,syscfg : Phandle to syscfg node used to enable watchdog and configure
26 - timeout-sec : Watchdog timeout in seconds
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| D | toshiba,visconti-wdt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/watchdog/toshiba,visconti-wdt.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
14 - $ref: watchdog.yaml#
19 - toshiba,visconti-wdt
27 timeout-sec: true
30 - compatible
31 - reg
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| D | fsl-imx7ulp-wdt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/fsl-imx7ulp-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
13 - $ref: "watchdog.yaml#"
18 - fsl,imx7ulp-wdt
29 assigned-clocks:
32 assigned-clocks-parents:
35 timeout-sec: true
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| D | omap-wdt.txt | 4 - compatible : "ti,omap3-wdt" for OMAP3 or "ti,omap4-wdt" for OMAP4
5 - ti,hwmods : Name of the hwmod associated to the WDT
8 - timeout-sec : default watchdog timeout in seconds
13 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
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| D | nuvoton,npcm-wdt.txt | 3 Nuvoton NPCM timer module provides five 24-bit timer counters, and a watchdog.
4 The watchdog supports a pre-timeout interrupt that fires 10ms before the
8 - compatible : "nuvoton,npcm750-wdt" for NPCM750 (Poleg).
9 - reg : Offset and length of the register set for the device.
10 - interrupts : Contain the timer interrupt with flags for
14 - clocks : phandle of timer reference clock.
15 - clock-frequency : The frequency in Hz of the clock that drives the NPCM7xx
19 - timeout-sec : Contains the watchdog timeout in seconds
24 compatible = "nuvoton,npcm750-wdt";
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