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Searched refs:TCR_EL1 (Results 1 – 6 of 6) sorted by relevance

/arch/arm64/kvm/hyp/include/hyp/
Dsysreg-sr.h36 ctxt_sys_reg(ctxt, TCR_EL1) = read_sysreg_el1(SYS_TCR); in __sysreg_save_el1_state()
87 write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); in __sysreg_restore_el1_state()
94 write_sysreg_el1((ctxt_sys_reg(ctxt, TCR_EL1) | in __sysreg_restore_el1_state()
130 write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); in __sysreg_restore_el1_state()
/arch/arm64/kvm/
Dinject_fault.c90 if (vcpu_read_sys_reg(vcpu, TCR_EL1) & TTBCR_EAE) { in inject_abt32()
Dsys_regs.c1478 { SYS_DESC(SYS_TCR_EL1), access_vm_reg, reset_val, TCR_EL1, 0 },
1905 { AA32(LO), Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, TCR_EL1 },
1907 { AA32(HI), Op1( 0), CRn( 2), CRm( 0), Op2( 3), access_vm_reg, NULL, TCR_EL1 },
/arch/arm64/include/asm/
Dkvm_host.h156 TCR_EL1, /* Translation Control Register */ enumerator
487 case TCR_EL1: *val = read_sysreg_s(SYS_TCR_EL12); break; in __vcpu_read_sys_reg_from_cpu()
532 case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
/arch/arm64/kvm/hyp/nvhe/
Dswitch.c66 write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); in __activate_traps()
/arch/arm64/
DKconfig857 case-1 TTBR0_EL1 with TCR_EL1.NFD0 == 1.
859 case-3 TTBR1_EL1 with TCR_EL1.NFD1 == 1.
1493 table entries. When enabled in TCR_EL1 (HA and HD bits) on