/arch/arm64/crypto/ |
D | Makefile | 9 sha1-ce-y := sha1-ce-glue.o sha1-ce-core.o 12 sha2-ce-y := sha2-ce-glue.o sha2-ce-core.o 15 sha512-ce-y := sha512-ce-glue.o sha512-ce-core.o 18 sha3-ce-y := sha3-ce-glue.o sha3-ce-core.o 21 sm3-ce-y := sm3-ce-glue.o sm3-ce-core.o 24 sm4-ce-y := sm4-ce-glue.o sm4-ce-core.o 27 ghash-ce-y := ghash-ce-glue.o ghash-ce-core.o 30 crct10dif-ce-y := crct10dif-ce-core.o crct10dif-ce-glue.o 33 aes-ce-cipher-y := aes-ce-core.o aes-ce-glue.o 36 aes-ce-ccm-y := aes-ce-ccm-glue.o aes-ce-ccm-core.o [all …]
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D | Kbuild.fips140 | 7 sha1-ce-y := sha1-ce-glue.o sha1-ce-core.o 8 sha2-ce-y := sha2-ce-glue.o sha2-ce-core.o 9 sha512-ce-y := sha512-ce-glue.o sha512-ce-core.o 10 ghash-ce-y := ghash-ce-glue.o ghash-ce-core.o 11 aes-ce-cipher-y := aes-ce-core.o aes-ce-glue.o 14 sha256-arm64-y := sha256-glue.o sha256-core.o 15 sha512-arm64-y := sha512-glue.o sha512-core.o 16 aes-arm64-y := aes-cipher-core.o aes-cipher-glue.o 17 aes-neon-bs-y := aes-neonbs-core.o aes-neonbs-glue.o
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D | .gitignore | 2 sha256-core.S 3 sha512-core.S 4 poly1305-core.S
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/arch/arm/crypto/ |
D | Makefile | 27 aes-arm-y := aes-cipher-core.o aes-cipher-glue.o 28 aes-arm-bs-y := aes-neonbs-core.o aes-neonbs-glue.o 32 sha256-arm-y := sha256-core.o sha256_glue.o $(sha256-arm-neon-y) 34 sha512-arm-y := sha512-core.o sha512-glue.o $(sha512-arm-neon-y) 36 libblake2s-arm-y:= blake2s-core.o blake2s-glue.o 37 blake2b-neon-y := blake2b-neon-core.o blake2b-neon-glue.o 38 sha1-arm-ce-y := sha1-ce-core.o sha1-ce-glue.o 39 sha2-arm-ce-y := sha2-ce-core.o sha2-ce-glue.o 40 aes-arm-ce-y := aes-ce-core.o aes-ce-glue.o 41 ghash-arm-ce-y := ghash-ce-core.o ghash-ce-glue.o [all …]
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D | .gitignore | 2 aesbs-core.S 3 sha256-core.S 4 sha512-core.S 5 poly1305-core.S
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/arch/mips/include/asm/netlogic/xlp-hal/ |
D | sys.h | 121 #define SYS_CPU_PLL_CTRL0(core) (0x1c0 + (core * 4)) argument 122 #define SYS_CPU_PLL_CTRL1(core) (0x1c1 + (core * 4)) argument 123 #define SYS_CPU_PLL_CTRL2(core) (0x1c2 + (core * 4)) argument 124 #define SYS_CPU_PLL_CTRL3(core) (0x1c3 + (core * 4)) argument 155 #define SYS_9XX_CPU_PLL_CTRL0(core) (0xc0 + (core * 4)) argument 156 #define SYS_9XX_CPU_PLL_CTRL1(core) (0xc1 + (core * 4)) argument 157 #define SYS_9XX_CPU_PLL_CTRL2(core) (0xc2 + (core * 4)) argument 158 #define SYS_9XX_CPU_PLL_CTRL3(core) (0xc3 + (core * 4)) argument
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/arch/mips/netlogic/xlp/ |
D | wakeup.c | 53 static int xlp_wakeup_core(uint64_t sysbase, int node, int core) in xlp_wakeup_core() argument 58 coremask = (1 << core); in xlp_wakeup_core() 114 int core, n, cpu, ncores; in xlp_enable_secondary_cores() local 172 for (core = 0; core < ncores; core++) { in xlp_enable_secondary_cores() 174 if (n == 0 && core == 0) in xlp_enable_secondary_cores() 178 if ((syscoremask & (1 << core)) == 0) in xlp_enable_secondary_cores() 182 cpu = (n * ncores + core) * NLM_THREADS_PER_CORE; in xlp_enable_secondary_cores() 187 if (!xlp_wakeup_core(nodep->sysbase, n, core)) in xlp_enable_secondary_cores() 191 nodep->coremask |= 1u << core; in xlp_enable_secondary_cores() 195 pr_err("Node %d : timeout core %d\n", n, core); in xlp_enable_secondary_cores()
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D | nlm_hal.c | 228 static unsigned int nlm_xlp2_get_core_frequency(int node, int core) in nlm_xlp2_get_core_frequency() argument 236 SYS_9XX_CPU_PLL_CTRL0(core)); in nlm_xlp2_get_core_frequency() 238 SYS_9XX_CPU_PLL_CTRL1(core)); in nlm_xlp2_get_core_frequency() 242 SYS_CPU_PLL_CTRL0(core)); in nlm_xlp2_get_core_frequency() 244 SYS_CPU_PLL_CTRL1(core)); in nlm_xlp2_get_core_frequency() 274 static unsigned int nlm_xlp_get_core_frequency(int node, int core) in nlm_xlp_get_core_frequency() argument 286 dfs_div = ((dfsval >> (core * 4)) & 0xf) + 1; in nlm_xlp_get_core_frequency() 295 unsigned int nlm_get_core_frequency(int node, int core) in nlm_get_core_frequency() argument 298 return nlm_xlp2_get_core_frequency(node, core); in nlm_get_core_frequency() 300 return nlm_xlp_get_core_frequency(node, core); in nlm_get_core_frequency()
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/arch/mips/kernel/ |
D | smp-cps.c | 38 static unsigned core_vpe_count(unsigned int cluster, unsigned core) in core_vpe_count() argument 43 return mips_cps_numvps(cluster, core); in core_vpe_count() 214 static void boot_core(unsigned int core, unsigned int vpe_id) in boot_core() argument 220 mips_cm_lock_other(0, core, 0, CM_GCR_Cx_OTHER_BLOCK_LOCAL); in boot_core() 232 set_gcr_access(1 << core); in boot_core() 236 mips_cpc_lock_other(core); in boot_core() 270 core, stat); in boot_core() 283 bitmap_set(core_power, core, 1); in boot_core() 288 unsigned core = cpu_core(¤t_cpu_data); in remote_vpe_boot() local 289 struct core_boot_config *core_cfg = &mips_cps_core_bootcfg[core]; in remote_vpe_boot() [all …]
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D | pm-cps.c | 113 unsigned core = cpu_core(¤t_cpu_data); in cps_pm_enter_state() local 123 entry = per_cpu(nc_asm_enter, core)[state]; in cps_pm_enter_state() 147 core_cfg = &mips_cps_core_bootcfg[core]; in cps_pm_enter_state() 159 core_ready_count = per_cpu(ready_count, core); in cps_pm_enter_state() 167 coupled_barrier(&per_cpu(pm_barrier, core), online); in cps_pm_enter_state() 639 unsigned core = cpu_core(&cpu_data[cpu]); in cps_pm_online_cpu() local 643 if (per_cpu(nc_asm_enter, core)[state]) in cps_pm_online_cpu() 651 core, state); in cps_pm_online_cpu() 655 per_cpu(nc_asm_enter, core)[state] = entry_fn; in cps_pm_online_cpu() 658 if (!per_cpu(ready_count, core)) { in cps_pm_online_cpu() [all …]
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/arch/mips/include/asm/octeon/ |
D | cvmx-coremask.h | 49 int core) in cvmx_coremask_is_core_set() argument 53 n = core % CVMX_COREMASK_ELTSZ; in cvmx_coremask_is_core_set() 54 i = core / CVMX_COREMASK_ELTSZ; in cvmx_coremask_is_core_set() 80 static inline void cvmx_coremask_clear_core(struct cvmx_coremask *pcm, int core) in cvmx_coremask_clear_core() argument 84 n = core % CVMX_COREMASK_ELTSZ; in cvmx_coremask_clear_core() 85 i = core / CVMX_COREMASK_ELTSZ; in cvmx_coremask_clear_core()
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/arch/powerpc/platforms/ps3/ |
D | system-bus.c | 350 dev->match_id, dev->match_sub_id, dev_name(&dev->core), in ps3_system_bus_match() 351 drv->match_id, drv->match_sub_id, drv->core.name); in ps3_system_bus_match() 355 dev->match_id, dev->match_sub_id, dev_name(&dev->core), in ps3_system_bus_match() 356 drv->match_id, drv->match_sub_id, drv->core.name); in ps3_system_bus_match() 377 dev_name(&dev->core)); in ps3_system_bus_probe() 379 pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev_name(&dev->core)); in ps3_system_bus_probe() 398 dev_dbg(&dev->core, "%s:%d %s: no remove method\n", in ps3_system_bus_remove() 399 __func__, __LINE__, drv->core.name); in ps3_system_bus_remove() 401 pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev_name(&dev->core)); in ps3_system_bus_remove() 412 dev_dbg(&dev->core, " -> %s:%d: match_id %d\n", __func__, __LINE__, in ps3_system_bus_shutdown() [all …]
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/arch/arm/mach-integrator/ |
D | Kconfig | 46 bool "Integrator/CM7TDMI core module" 52 bool "Integrator/CM720T core module" 58 bool "Integrator/CM740T core module" 64 bool "Integrator/CM920T core module" 70 bool "Integrator/CM922T-XA10 core module" 76 bool "Integrator/CM926EJ-S core module" 82 bool "Integrator/CM940T core module" 88 bool "Integrator/CM946E-S core module" 94 bool "Integrator/CM966E-S core module" 99 bool "Integrator/CM10200E rev.0 core module" [all …]
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/arch/mips/crypto/ |
D | Makefile | 9 chacha-mips-y := chacha-core.o chacha-glue.o 10 AFLAGS_chacha-core.o += -O2 # needed to fill branch delay slots 13 poly1305-mips-y := poly1305-core.o poly1305-glue.o 21 $(obj)/poly1305-core.S: $(src)/poly1305-mips.pl FORCE 24 targets += poly1305-core.S
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/arch/c6x/boot/dts/ |
D | tms320c6678.dtsi | 61 compatible = "ti,c64x+core-pic"; 81 ti,core-mask = < 0x01 >; 87 ti,core-mask = < 0x02 >; 93 ti,core-mask = < 0x04 >; 99 ti,core-mask = < 0x08 >; 105 ti,core-mask = < 0x10 >; 111 ti,core-mask = < 0x20 >; 117 ti,core-mask = < 0x40 >; 123 ti,core-mask = < 0x80 >;
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D | tms320c6472.dtsi | 51 compatible = "ti,c64x+core-pic"; 71 ti,core-mask = < 0x01 >; 77 ti,core-mask = < 0x02 >; 83 ti,core-mask = < 0x04 >; 89 ti,core-mask = < 0x08 >; 95 ti,core-mask = < 0x10 >; 101 ti,core-mask = < 0x20 >;
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D | tms320c6474.dtsi | 38 compatible = "ti,c64x+core-pic"; 56 ti,core-mask = < 0x04 >; 62 ti,core-mask = < 0x02 >; 68 ti,core-mask = < 0x01 >;
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/arch/arm/kernel/ |
D | module-plts.c | 53 struct mod_plt_sec *pltsec = !in_init(mod, loc) ? &mod->arch.core : in get_module_plt() 228 mod->arch.core.plt = s; in module_frob_arch_sections() 235 if (!mod->arch.core.plt || !mod->arch.init.plt) { in module_frob_arch_sections() 267 mod->arch.core.plt->sh_type = SHT_NOBITS; in module_frob_arch_sections() 268 mod->arch.core.plt->sh_flags = SHF_EXECINSTR | SHF_ALLOC; in module_frob_arch_sections() 269 mod->arch.core.plt->sh_addralign = L1_CACHE_BYTES; in module_frob_arch_sections() 270 mod->arch.core.plt->sh_size = round_up(core_plts * PLT_ENT_SIZE, in module_frob_arch_sections() 272 mod->arch.core.plt_count = 0; in module_frob_arch_sections() 273 mod->arch.core.plt_ent = NULL; in module_frob_arch_sections() 284 mod->arch.core.plt->sh_size, mod->arch.init.plt->sh_size); in module_frob_arch_sections()
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/arch/arc/ |
D | Makefile | 89 core-y += arch/arc/ 92 core-y += arch/arc/boot/dts/ 94 core-y += arch/arc/plat-sim/ 95 core-$(CONFIG_ARC_PLAT_TB10X) += arch/arc/plat-tb10x/ 96 core-$(CONFIG_ARC_PLAT_AXS10X) += arch/arc/plat-axs10x/ 97 core-$(CONFIG_ARC_SOC_HSDK) += arch/arc/plat-hsdk/
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/arch/powerpc/kvm/ |
D | book3s_hv_rm_xics.c | 85 int core; in grab_next_hostcore() local 88 for (core = start + 1; core < max; core++) { in grab_next_hostcore() 89 old = new = READ_ONCE(rm_core[core].rm_state); in grab_next_hostcore() 97 success = cmpxchg64(&rm_core[core].rm_state.raw, in grab_next_hostcore() 107 return core; in grab_next_hostcore() 116 int core; in find_available_hostcore() local 120 core = grab_next_hostcore(my_core, rm_core, cpu_nr_cores(), action); in find_available_hostcore() 121 if (core == -1) in find_available_hostcore() 122 core = grab_next_hostcore(core, rm_core, my_core, action); in find_available_hostcore() 124 return core; in find_available_hostcore() [all …]
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/arch/powerpc/include/asm/ |
D | cputhreads.h | 75 int cpu_first_thread_of_core(int core); 78 static inline int cpu_first_thread_of_core(int core) { return core; } in cpu_first_thread_of_core() argument
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D | ps3.h | 367 struct device core; member 381 struct device_driver core; member 396 return container_of(_drv, struct ps3_system_bus_driver, core); in ps3_drv_to_system_bus_drv() 401 return container_of(_dev, struct ps3_system_bus_device, core); in ps3_dev_to_system_bus_dev() 407 BUG_ON(!_dev->core.driver); in ps3_system_bus_dev_to_system_bus_drv() 408 return ps3_drv_to_system_bus_drv(_dev->core.driver); in ps3_system_bus_dev_to_system_bus_drv() 420 dev_set_drvdata(&dev->core, data); in ps3_system_bus_set_drvdata() 425 return dev_get_drvdata(&dev->core); in ps3_system_bus_get_drvdata()
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/arch/arm/probes/kprobes/ |
D | Makefile | 2 obj-$(CONFIG_KPROBES) += core.o actions-common.o checkers-common.o 4 test-kprobes-objs := test-core.o
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/arch/mips/include/asm/mach-cavium-octeon/ |
D | kernel-entry-init.h | 25 # a2 = 1 if init core, zero otherwise 63 4: # core-16057 work around 66 5: # No core-16057 work around 89 # Get my core id 114 # This is the variable where the next core to boot is stored 116 # Get the core id of the next to be booted
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/arch/arm64/boot/dts/marvell/ |
D | armada-cp11x.dtsi | 284 clock-names = "core", "reg"; 296 clock-names = "core", "reg"; 328 clock-names = "core", "reg"; 338 clock-names = "core", "reg"; 348 clock-names = "core", "axi"; 359 clock-names = "core", "axi"; 371 clock-names = "core", "reg"; 383 clock-names = "core", "reg"; 449 clock-names = "core", "reg"; 461 clock-names = "core", "reg"; [all …]
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