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Searched refs:counter (Results 1 – 25 of 147) sorted by relevance

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/arch/x86/kernel/cpu/
Dperfctr-watchdog.c109 int avail_to_resrv_perfctr_nmi_bit(unsigned int counter) in avail_to_resrv_perfctr_nmi_bit() argument
111 BUG_ON(counter > NMI_MAX_COUNTER_BITS); in avail_to_resrv_perfctr_nmi_bit()
113 return !test_bit(counter, perfctr_nmi_owner); in avail_to_resrv_perfctr_nmi_bit()
119 unsigned int counter; in reserve_perfctr_nmi() local
121 counter = nmi_perfctr_msr_to_bit(msr); in reserve_perfctr_nmi()
123 if (counter > NMI_MAX_COUNTER_BITS) in reserve_perfctr_nmi()
126 if (!test_and_set_bit(counter, perfctr_nmi_owner)) in reserve_perfctr_nmi()
134 unsigned int counter; in release_perfctr_nmi() local
136 counter = nmi_perfctr_msr_to_bit(msr); in release_perfctr_nmi()
138 if (counter > NMI_MAX_COUNTER_BITS) in release_perfctr_nmi()
[all …]
/arch/arm/include/asm/
Datomic.h25 #define atomic_read(v) READ_ONCE((v)->counter)
26 #define atomic_set(v,i) WRITE_ONCE(((v)->counter), (i))
42 prefetchw(&v->counter); \
49 : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) \
50 : "r" (&v->counter), "Ir" (i) \
60 prefetchw(&v->counter); \
68 : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) \
69 : "r" (&v->counter), "Ir" (i) \
81 prefetchw(&v->counter); \
89 : "=&r" (result), "=&r" (val), "=&r" (tmp), "+Qo" (v->counter) \
[all …]
/arch/powerpc/include/asm/
Datomic.h29 __asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m"(v->counter)); in atomic_read()
36 __asm__ __volatile__("stw%U0%X0 %1,%0" : "=m"(v->counter) : "r"(i)); in atomic_set()
49 : "=&r" (t), "+m" (v->counter) \
50 : "r" (a), "r" (&v->counter) \
64 : "=&r" (t), "+m" (v->counter) \
65 : "r" (a), "r" (&v->counter) \
81 : "=&r" (res), "=&r" (t), "+m" (v->counter) \
82 : "r" (a), "r" (&v->counter) \
129 : "=&r" (t), "+m" (v->counter) in ATOMIC_OPS()
130 : "r" (&v->counter) in ATOMIC_OPS()
[all …]
/arch/arm64/include/asm/
Darm_dsu_pmu.h53 static inline void __dsu_pmu_select_counter(int counter) in __dsu_pmu_select_counter() argument
55 write_sysreg_s(counter, CLUSTERPMSELR_EL1); in __dsu_pmu_select_counter()
59 static inline u64 __dsu_pmu_read_counter(int counter) in __dsu_pmu_read_counter() argument
61 __dsu_pmu_select_counter(counter); in __dsu_pmu_read_counter()
65 static inline void __dsu_pmu_write_counter(int counter, u64 val) in __dsu_pmu_write_counter() argument
67 __dsu_pmu_select_counter(counter); in __dsu_pmu_write_counter()
72 static inline void __dsu_pmu_set_event(int counter, u32 event) in __dsu_pmu_set_event() argument
74 __dsu_pmu_select_counter(counter); in __dsu_pmu_set_event()
90 static inline void __dsu_pmu_disable_counter(int counter) in __dsu_pmu_disable_counter() argument
92 write_sysreg_s(BIT(counter), CLUSTERPMCNTENCLR_EL1); in __dsu_pmu_disable_counter()
[all …]
/arch/x86/include/asm/
Datomic64_64.h22 return __READ_ONCE((v)->counter); in arch_atomic64_read()
34 __WRITE_ONCE(v->counter, i); in arch_atomic64_set()
47 : "=m" (v->counter) in arch_atomic64_add()
48 : "er" (i), "m" (v->counter) : "memory"); in arch_atomic64_add()
61 : "=m" (v->counter) in arch_atomic64_sub()
62 : "er" (i), "m" (v->counter) : "memory"); in arch_atomic64_sub()
76 return GEN_BINARY_RMWcc(LOCK_PREFIX "subq", v->counter, e, "er", i); in arch_atomic64_sub_and_test()
89 : "=m" (v->counter) in arch_atomic64_inc()
90 : "m" (v->counter) : "memory"); in arch_atomic64_inc()
103 : "=m" (v->counter) in arch_atomic64_dec()
[all …]
Datomic.h29 return __READ_ONCE((v)->counter); in arch_atomic_read()
41 __WRITE_ONCE(v->counter, i); in arch_atomic_set()
54 : "+m" (v->counter) in arch_atomic_add()
68 : "+m" (v->counter) in arch_atomic_sub()
83 return GEN_BINARY_RMWcc(LOCK_PREFIX "subl", v->counter, e, "er", i); in arch_atomic_sub_and_test()
96 : "+m" (v->counter) :: "memory"); in arch_atomic_inc()
109 : "+m" (v->counter) :: "memory"); in arch_atomic_dec()
123 return GEN_UNARY_RMWcc(LOCK_PREFIX "decl", v->counter, e); in arch_atomic_dec_and_test()
137 return GEN_UNARY_RMWcc(LOCK_PREFIX "incl", v->counter, e); in arch_atomic_inc_and_test()
152 return GEN_BINARY_RMWcc(LOCK_PREFIX "addl", v->counter, s, "er", i); in arch_atomic_add_negative()
[all …]
Dlocal.h22 : "+m" (l->a.counter)); in local_inc()
28 : "+m" (l->a.counter)); in local_dec()
34 : "+m" (l->a.counter) in local_add()
41 : "+m" (l->a.counter) in local_sub()
56 return GEN_BINARY_RMWcc(_ASM_SUB, l->a.counter, e, "er", i); in local_sub_and_test()
69 return GEN_UNARY_RMWcc(_ASM_DEC, l->a.counter, e); in local_dec_and_test()
82 return GEN_UNARY_RMWcc(_ASM_INC, l->a.counter, e); in local_inc_and_test()
96 return GEN_BINARY_RMWcc(_ASM_ADD, l->a.counter, s, "er", i); in local_add_negative()
110 : "+r" (i), "+m" (l->a.counter) in local_add_return()
124 (cmpxchg_local(&((l)->a.counter), (o), (n)))
[all …]
/arch/s390/include/asm/
Datomic.h24 : "=d" (c) : "Q" (v->counter)); in atomic_read()
32 : "=Q" (v->counter) : "d" (i)); in atomic_set()
37 return __atomic_add_barrier(i, &v->counter) + i; in atomic_add_return()
42 return __atomic_add_barrier(i, &v->counter); in atomic_fetch_add()
53 __atomic_add_const(i, &v->counter); in atomic_add()
57 __atomic_add(i, &v->counter); in atomic_add()
67 __atomic_##op(i, &v->counter); \
71 return __atomic_##op##_barrier(i, &v->counter); \
80 #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) in ATOMIC_OPS()
84 return __atomic_cmpxchg(&v->counter, old, new); in ATOMIC_OPS()
[all …]
/arch/mips/include/asm/
Dlocal.h47 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) in local_add_return()
48 : "Ir" (i), "m" (l->a.counter) in local_add_return()
63 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) in local_add_return()
64 : "Ir" (i), "m" (l->a.counter) in local_add_return()
70 result = l->a.counter; in local_add_return()
72 l->a.counter = result; in local_add_return()
96 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) in local_sub_return()
97 : "Ir" (i), "m" (l->a.counter) in local_sub_return()
112 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) in local_sub_return()
113 : "Ir" (i), "m" (l->a.counter) in local_sub_return()
[all …]
Datomic.h30 return READ_ONCE(v->counter); \
35 WRITE_ONCE(v->counter, i); \
40 return cmpxchg(&v->counter, o, n); \
45 return xchg(&v->counter, n); \
64 v->counter c_op i; \
78 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
91 result = v->counter; \
93 v->counter = result; \
109 "+" GCC_OFF_SMALL_ASM() (v->counter) \
124 result = v->counter; \
[all …]
/arch/alpha/include/asm/
Datomic.h29 #define atomic_read(v) READ_ONCE((v)->counter)
30 #define atomic64_read(v) READ_ONCE((v)->counter)
32 #define atomic_set(v,i) WRITE_ONCE((v)->counter, (i))
33 #define atomic64_set(v,i) WRITE_ONCE((v)->counter, (i))
53 :"=&r" (temp), "=m" (v->counter) \
54 :"Ir" (i), "m" (v->counter)); \
70 :"=&r" (temp), "=m" (v->counter), "=&r" (result) \
71 :"Ir" (i), "m" (v->counter) : "memory"); \
88 :"=&r" (temp), "=m" (v->counter), "=&r" (result) \
89 :"Ir" (i), "m" (v->counter) : "memory"); \
[all …]
Dlocal.h33 :"=&r" (temp), "=m" (l->a.counter), "=&r" (result) in local_add_return()
34 :"Ir" (i), "m" (l->a.counter) : "memory"); in local_add_return()
50 :"=&r" (temp), "=m" (l->a.counter), "=&r" (result) in local_sub_return()
51 :"Ir" (i), "m" (l->a.counter) : "memory"); in local_sub_return()
56 (cmpxchg_local(&((l)->a.counter), (o), (n)))
57 #define local_xchg(l, n) (xchg_local(&((l)->a.counter), (n)))
97 #define __local_inc(l) ((l)->a.counter++)
98 #define __local_dec(l) ((l)->a.counter++)
99 #define __local_add(i,l) ((l)->a.counter+=(i))
100 #define __local_sub(i,l) ((l)->a.counter-=(i))
/arch/h8300/include/asm/
Datomic.h15 #define atomic_read(v) READ_ONCE((v)->counter)
16 #define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i))
25 ret = v->counter c_op i; \
37 ret = v->counter; \
38 v->counter c_op i; \
49 v->counter c_op i; \
76 ret = v->counter; in atomic_cmpxchg()
78 v->counter = new; in atomic_cmpxchg()
89 ret = v->counter; in atomic_fetch_add_unless()
91 v->counter += a; in atomic_fetch_add_unless()
/arch/parisc/include/asm/
Datomic.h64 v->counter = i; in atomic_set()
73 return READ_ONCE((v)->counter); in atomic_read()
77 #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
78 #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
86 v->counter c_op i; \
97 ret = (v->counter c_op i); \
110 ret = v->counter; \
111 v->counter c_op i; \
149 v->counter c_op i; \
160 ret = (v->counter c_op i); \
[all …]
Dspinlock.h79 if (rw->counter > 0) { in arch_read_trylock()
80 rw->counter--; in arch_read_trylock()
105 if (rw->counter == __ARCH_RW_LOCK_UNLOCKED__) { in arch_write_trylock()
106 rw->counter = 0; in arch_write_trylock()
133 rw->counter++; in arch_read_unlock()
144 rw->counter = __ARCH_RW_LOCK_UNLOCKED__; in arch_write_unlock()
/arch/arc/include/asm/
Datomic.h17 #define atomic_read(v) READ_ONCE((v)->counter)
21 #define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i))
34 : [ctr] "r" (&v->counter), /* Not "m": llock only supports reg direct addr mode */ \
56 : [ctr] "r" (&v->counter), \
83 : [ctr] "r" (&v->counter), \
97 #define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i))
115 WRITE_ONCE(v->counter, i); in atomic_set()
134 v->counter c_op i; \
148 temp = v->counter; \
150 v->counter = temp; \
[all …]
Dspinlock.h101 : [rwlock] "r" (&(rw->counter)), in arch_read_lock()
125 : [rwlock] "r" (&(rw->counter)), in arch_read_trylock()
158 : [rwlock] "r" (&(rw->counter)), in arch_write_lock()
183 : [rwlock] "r" (&(rw->counter)), in arch_write_trylock()
209 : [rwlock] "r" (&(rw->counter)) in arch_read_unlock()
217 WRITE_ONCE(rw->counter, __ARCH_RW_LOCK_UNLOCKED__); in arch_write_unlock()
310 if (rw->counter > 0) { in arch_read_trylock()
311 rw->counter--; in arch_read_trylock()
336 if (rw->counter == __ARCH_RW_LOCK_UNLOCKED__) { in arch_write_trylock()
337 rw->counter = 0; in arch_write_trylock()
[all …]
/arch/sparc/include/asm/
Datomic_64.h17 #define atomic_read(v) READ_ONCE((v)->counter)
18 #define atomic64_read(v) READ_ONCE((v)->counter)
20 #define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i))
21 #define atomic64_set(v, i) WRITE_ONCE(((v)->counter), (i))
52 #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) in ATOMIC_OPS()
56 return xchg(&v->counter, new); in ATOMIC_OPS()
60 ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
61 #define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
/arch/ia64/include/asm/
Datomic.h24 #define atomic_read(v) READ_ONCE((v)->counter)
25 #define atomic64_read(v) READ_ONCE((v)->counter)
27 #define atomic_set(v,i) WRITE_ONCE(((v)->counter), (i))
28 #define atomic64_set(v,i) WRITE_ONCE(((v)->counter), (i))
81 ? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter) \
89 ? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter) \
97 ? ia64_fetchadd(__ia64_aar_i, &(v)->counter, acq) \
105 ? ia64_fetchadd(-__ia64_asr_i, &(v)->counter, acq) \
166 ? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter) \
174 ? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter) \
[all …]
/arch/hexagon/include/asm/
Datomic.h24 : "r" (&v->counter), "r" (new) in atomic_set()
37 #define atomic_read(v) READ_ONCE((v)->counter)
44 #define atomic_xchg(v, new) (xchg(&((v)->counter), (new)))
76 : "r" (&v->counter), "r" (old), "r" (new) in atomic_cmpxchg()
94 : "r" (&v->counter), "r" (i) \
110 : "r" (&v->counter), "r" (i) \
127 : "r" (&v->counter), "r" (i) \
/arch/sh/include/asm/
Datomic.h22 #define atomic_read(v) READ_ONCE((v)->counter)
23 #define atomic_set(v,i) WRITE_ONCE((v)->counter, (i))
33 #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
34 #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
Datomic-irq.h19 v->counter c_op i; \
29 temp = v->counter; \
31 v->counter = temp; \
43 temp = v->counter; \
44 v->counter c_op i; \
/arch/csky/include/asm/
Datomic.h29 : "r" (a), "r"(&v->counter), "r"(u) in __atomic_add_unless()
49 : "r" (i), "r"(&v->counter) \
66 : "r" (i), "r"(&v->counter) \
86 : "r" (i), "r"(&v->counter) \
113 : "r" (a), "r"(&v->counter), "r"(u) in __atomic_add_unless()
133 : "r" (i), "r"(&v->counter) \
152 : "r" (i), "r"(&v->counter) \
173 : "r" (i), "r"(&v->counter) \
/arch/riscv/include/asm/
Datomic.h30 return READ_ONCE(v->counter); in atomic_read()
34 WRITE_ONCE(v->counter, i); in atomic_set()
41 return READ_ONCE(v->counter); in atomic64_read()
45 WRITE_ONCE(v->counter, i); in atomic64_set()
60 : "+A" (v->counter) \
96 : "+A" (v->counter), "=r" (ret) \ in ATOMIC_OPS()
107 : "+A" (v->counter), "=r" (ret) \
212 : [p]"=&r" (prev), [rc]"=&r" (rc), [c]"+A" (v->counter)
233 : [p]"=&r" (prev), [rc]"=&r" (rc), [c]"+A" (v->counter) in atomic64_fetch_add_unless()
249 return __xchg_relaxed(&(v->counter), n, size); \
[all …]
/arch/sparc/lib/
Datomic32.c38 ret = v->counter; \
39 v->counter c_op i; \
53 ret = (v->counter c_op i); \
76 ret = v->counter; in atomic_xchg()
77 v->counter = new; in atomic_xchg()
89 ret = v->counter; in atomic_cmpxchg()
91 v->counter = new; in atomic_cmpxchg()
104 ret = v->counter; in atomic_fetch_add_unless()
106 v->counter += a; in atomic_fetch_add_unless()
118 v->counter = i; in atomic_set()

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