/arch/x86/crypto/ |
D | blake2s-glue.c | 22 const u32 inc); 25 const u32 inc); 31 size_t nblocks, const u32 inc) in blake2s_compress() argument 37 blake2s_compress_generic(state, block, nblocks, inc); in blake2s_compress() 48 blake2s_compress_avx512(state, block, blocks, inc); in blake2s_compress() 50 blake2s_compress_ssse3(state, block, blocks, inc); in blake2s_compress()
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/arch/sparc/lib/ |
D | memscan_64.S | 70 inc %g2 75 inc %g2 79 inc %g2 87 inc %g2 92 inc %g2 96 inc %g2 101 inc %g2 104 inc %g2
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D | M7memset.S | 153 inc %o5 329 inc %o5 ! next byte 347 inc %o5
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/arch/mips/cavium-octeon/ |
D | csrc-octeon.c | 146 u64 cur, end, inc; in __udelay() local 150 inc = us * octeon_udelay_factor; in __udelay() 151 end = cur + inc; in __udelay() 160 u64 cur, end, inc; in __ndelay() local 164 inc = ((ns * octeon_ndelay_factor) >> 16); in __ndelay() 165 end = cur + inc; in __ndelay()
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D | setup.c | 933 u64 inc = addr - *mem; in memory_exclude_page() local 934 memblock_add(*mem, inc); in memory_exclude_page() 935 *mem += inc; in memory_exclude_page() 936 *size -= inc; in memory_exclude_page()
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/arch/arm/include/asm/ |
D | assembler.h | 382 .macro usraccoff, instr, reg, ptr, inc, off, cond, abort, t=TUSER() 384 .if \inc == 1 386 .elseif \inc == 4 398 .macro usracc, instr, reg, ptr, inc, cond, rept, abort 412 usraccoff \instr, \reg, \ptr, \inc, 0, \cond, \abort 414 usraccoff \instr, \reg, \ptr, \inc, \inc, \cond, \abort 417 add\cond \ptr, #\rept * \inc 422 .macro usracc, instr, reg, ptr, inc, cond, rept, abort, t=TUSER() 425 .if \inc == 1 426 \instr\()b\t\cond \reg, [\ptr], #\inc [all …]
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/arch/arm/crypto/ |
D | blake2b-neon-glue.c | 19 const u8 *block, size_t nblocks, u32 inc); 22 const u8 *block, size_t nblocks, u32 inc) in blake2b_compress_arch() argument 25 blake2b_compress_generic(state, block, nblocks, inc); in blake2b_compress_arch() 34 blake2b_compress_neon(state, block, blocks, inc); in blake2b_compress_arch()
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/arch/ia64/include/uapi/asm/ |
D | gcc_intrin.h | 234 #define ia64_fetchadd4_acq(p, inc) \ argument 239 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \ 245 #define ia64_fetchadd4_rel(p, inc) \ argument 249 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \ 255 #define ia64_fetchadd8_acq(p, inc) \ argument 260 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \ 266 #define ia64_fetchadd8_rel(p, inc) \ argument 270 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
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/arch/x86/include/asm/ |
D | xor.h | 104 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_2() 138 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_2_pf64() 197 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_3() 234 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_3_pf64() 300 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_4() 339 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_4_pf64() 412 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_5() 453 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_5_pf64()
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D | cmpxchg.h | 233 #define __xadd(ptr, inc, lock) __xchg_op((ptr), (inc), xadd, lock) argument 234 #define xadd(ptr, inc) __xadd((ptr), (inc), LOCK_PREFIX) argument
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D | asm.h | 35 #define _ASM_INC __ASM_SIZE(inc)
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D | atomic64_32.h | 213 __alternative_atomic64(inc, inc_return, /* no output */, in arch_atomic64_inc()
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/arch/xtensa/kernel/ |
D | signal.c | 84 int inc = 0; in flush_window_regs_user() local 89 inc = 1; in flush_window_regs_user() 95 inc = 2; in flush_window_regs_user() 101 inc = 3; in flush_window_regs_user() 106 sp = regs->areg[((base + inc) * 4 + 1) % XCHAL_NUM_AREGS]; in flush_window_regs_user() 113 base += inc; in flush_window_regs_user()
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/arch/h8300/lib/ |
D | strncpy.S | 23 inc.l #1,er3
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/arch/hexagon/lib/ |
D | memcpy.S | 162 #define inc R15:14 /* inc kernel by -1 and defetch ptr by 32 */ macro 348 inc = combine(#32, #-1); define 371 ptr_in_p_128kernel = vaddw(ptr_in_p_128kernel, inc); 407 ptr_in_p_128kernel = vaddw(ptr_in_p_128kernel, inc);
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/arch/mips/kernel/ |
D | signal.c | 78 int inc = test_thread_flag(TIF_32BIT_FPREGS) ? 2 : 1; in copy_fp_to_sigcontext() local 80 for (i = 0; i < NUM_FPU_REGS; i += inc) { in copy_fp_to_sigcontext() 97 int inc = test_thread_flag(TIF_32BIT_FPREGS) ? 2 : 1; in copy_fp_from_sigcontext() local 100 for (i = 0; i < NUM_FPU_REGS; i += inc) { in copy_fp_from_sigcontext()
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/arch/x86/lib/ |
D | checksum_32.S | 66 inc %esi 173 inc %esi
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D | atomic64_cx8_32.S | 100 incdec_return inc add adc
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D | atomic64_386_32.S | 101 BEGIN_IRQ_SAVE(inc)
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/arch/mips/include/asm/octeon/ |
D | cvmx-spxx-defs.h | 151 uint64_t inc:1; member 165 uint64_t inc:1;
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/arch/um/kernel/ |
D | tlb.c | 224 #define ADD_ROUND(n, inc) (((n) + (inc)) & ~((inc) - 1)) argument
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/arch/sparc/mm/ |
D | viking.S | 60 inc %o2 83 8: inc %o1
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/arch/m68k/fpsp040/ |
D | scale.S | 216 bnes no_dir |if set, neg op, no inc 221 beqs no_dir |if clr, neg op, no inc
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/arch/arm64/kernel/ |
D | head.S | 178 .macro populate_entries, tbl, rtbl, index, eindex, flags, inc, tmp1 182 add \rtbl, \rtbl, \inc // rtbl = pa next level
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/arch/powerpc/platforms/powernv/ |
D | pci-ioda.c | 1396 unsigned long start, end, inc; in pnv_pci_p7ioc_tce_invalidate() local 1405 inc = 16; in pnv_pci_p7ioc_tce_invalidate() 1406 end |= inc - 1; /* round up end to be different than start */ in pnv_pci_p7ioc_tce_invalidate() 1415 start += inc; in pnv_pci_p7ioc_tce_invalidate() 1498 unsigned long start, end, inc; in pnv_pci_phb3_tce_invalidate() local 1508 inc = (0x1ull << shift); in pnv_pci_phb3_tce_invalidate() 1516 start += inc; in pnv_pci_phb3_tce_invalidate()
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