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Searched refs:max_irr (Results 1 – 8 of 8) sorted by relevance

/arch/x86/kvm/
Dlapic.h93 bool __kvm_apic_update_irr(u32 *pir, void *regs, int *max_irr);
94 bool kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir, int *max_irr);
Dlapic.c423 bool __kvm_apic_update_irr(u32 *pir, void *regs, int *max_irr) in __kvm_apic_update_irr() argument
430 *max_irr = -1; in __kvm_apic_update_irr()
445 *max_irr = __fls(irr_val) + vec; in __kvm_apic_update_irr()
449 (max_updated_irr == *max_irr)); in __kvm_apic_update_irr()
453 bool kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir, int *max_irr) in kvm_apic_update_irr() argument
457 return __kvm_apic_update_irr(pir, apic->regs, max_irr); in kvm_apic_update_irr()
2742 int max_irr, max_isr; in kvm_lapic_sync_to_vapic() local
2751 max_irr = apic_find_highest_irr(apic); in kvm_lapic_sync_to_vapic()
2752 if (max_irr < 0) in kvm_lapic_sync_to_vapic()
2753 max_irr = 0; in kvm_lapic_sync_to_vapic()
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Dx86.c8475 int max_irr, tpr; in update_cr8_intercept() local
8487 max_irr = kvm_lapic_find_highest_irr(vcpu); in update_cr8_intercept()
8489 max_irr = -1; in update_cr8_intercept()
8491 if (max_irr != -1) in update_cr8_intercept()
8492 max_irr >>= 4; in update_cr8_intercept()
8496 kvm_x86_ops.update_cr8_intercept(vcpu, tpr, max_irr); in update_cr8_intercept()
/arch/x86/kvm/svm/
Dsvm.h459 void svm_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr);
Davic.c602 void svm_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr) in svm_hwapic_irr_update() argument
/arch/x86/kvm/vmx/
Dnested.c3759 int max_irr; in vmx_complete_nested_posted_interrupt() local
3770 max_irr = find_last_bit((unsigned long *)vmx->nested.pi_desc->pir, 256); in vmx_complete_nested_posted_interrupt()
3771 if (max_irr != 256) { in vmx_complete_nested_posted_interrupt()
3777 vapic_page, &max_irr); in vmx_complete_nested_posted_interrupt()
3779 if ((u8)max_irr > ((u8)status & 0xff)) { in vmx_complete_nested_posted_interrupt()
3781 status |= (u8)max_irr; in vmx_complete_nested_posted_interrupt()
Dvmx.c6433 static void vmx_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr) in vmx_hwapic_irr_update() argument
6444 vmx_set_rvi(max_irr); in vmx_hwapic_irr_update()
6450 int max_irr; in vmx_sync_pir_to_irr() local
6462 kvm_apic_update_irr(vcpu, vmx->pi_desc.pir, &max_irr); in vmx_sync_pir_to_irr()
6474 max_irr = kvm_lapic_find_highest_irr(vcpu); in vmx_sync_pir_to_irr()
6476 vmx_hwapic_irr_update(vcpu, max_irr); in vmx_sync_pir_to_irr()
6477 return max_irr; in vmx_sync_pir_to_irr()
/arch/x86/include/asm/
Dkvm_host.h1181 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);