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Searched refs:pll1 (Results 1 – 15 of 15) sorted by relevance

/arch/arm/boot/dts/
Dstih407-clock.dtsi126 clk_s_c0_pll1: clk-s-c0-pll1 {
128 compatible = "st,clkgen-pll1";
132 clock-output-names = "clk-s-c0-pll1-odf-0";
Dstih418-clock.dtsi124 clk_s_c0_pll1: clk-s-c0-pll1 {
126 compatible = "st,clkgen-pll1";
130 clock-output-names = "clk-s-c0-pll1-odf-0";
Dstih410-clock.dtsi127 clk_s_c0_pll1: clk-s-c0-pll1 {
129 compatible = "st,clkgen-pll1";
133 clock-output-names = "clk-s-c0-pll1-odf-0";
Ddra72x.dtsi72 reg-names = "dss", "pll1_clkctrl", "pll1";
Ddove-cubox.dts101 /* connect xtal input as source of pll0 and pll1 */
Ddra74x.dtsi138 reg-names = "dss", "pll1_clkctrl", "pll1",
Dste-nomadik-stn8815.dtsi219 pll1: pll1@0 { label
230 clocks = <&pll1>;
Dda850.dtsi700 pll1: clock-controller@21a000 { label
701 compatible = "ti,da850-pll1";
Dr8a73a4.dtsi528 clock-output-names = "main", "pll0", "pll1", "pll2",
Dsh73a0.dtsi651 clock-output-names = "main", "pll0", "pll1", "pll2",
/arch/arm/mach-davinci/
Ddm646x.c653 void __iomem *pll1, *psc; in dm646x_init_time() local
660 pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); in dm646x_init_time()
661 dm646x_pll1_init(NULL, pll1, NULL); in dm646x_init_time()
Ddm644x.c670 void __iomem *pll1, *psc; in dm644x_init_time() local
676 pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); in dm644x_init_time()
677 dm644x_pll1_init(NULL, pll1, NULL); in dm644x_init_time()
Ddm355.c734 void __iomem *pll1, *psc; in dm355_init_time() local
740 pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); in dm355_init_time()
741 dm355_pll1_init(NULL, pll1, NULL); in dm355_init_time()
Ddm365.c778 void __iomem *pll1, *pll2, *psc; in dm365_init_time() local
784 pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); in dm365_init_time()
785 dm365_pll1_init(NULL, pll1, NULL); in dm365_init_time()
/arch/arm64/boot/dts/ti/
Dk3-j721e-main.dtsi408 wiz0_pll1_refclk: pll1-refclk {
465 wiz1_pll1_refclk: pll1-refclk {
522 wiz2_pll1_refclk: pll1-refclk {
579 wiz3_pll1_refclk: pll1-refclk {