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Searched refs:EXT_INT_ENAB (Results 1 – 13 of 13) sorted by relevance

/drivers/net/hamradio/
Ddmascc.c518 write_scc(priv, R1, EXT_INT_ENAB); in setup_adapter()
753 write_scc(priv, R1, EXT_INT_ENAB | WT_FN_RDYFN); in scc_open()
991 EXT_INT_ENAB | WT_FN_RDYFN | in tx_on()
1003 EXT_INT_ENAB | WT_FN_RDYFN | TxINT_ENAB); in tx_on()
1036 write_scc(priv, R1, EXT_INT_ENAB | INT_ERR_Rx | in rx_on()
1042 write_scc(priv, R1, EXT_INT_ENAB | INT_ALL_Rx | WT_RDY_RT | in rx_on()
1058 write_scc(priv, R1, EXT_INT_ENAB | WT_FN_RDYFN); in rx_off()
1338 write_scc(priv, R1, EXT_INT_ENAB | WT_FN_RDYFN); in es_isr()
Dz8530.h39 #define EXT_INT_ENAB 0x1 /* Ext Int Enable */ macro
Dscc.c877 or(scc,R1,INT_ALL_Rx|TxINT_ENAB|EXT_INT_ENAB); /* enable interrupts */ in init_channel()
/drivers/tty/serial/
Dzs.c467 zport_a->regs[1] &= ~EXT_INT_ENAB; in zs_stop_rx()
473 zport->regs[1] &= ~EXT_INT_ENAB; in zs_stop_rx()
477 zport->regs[1] &= ~EXT_INT_ENAB; in zs_stop_rx()
497 if (!(zport_a->regs[1] & EXT_INT_ENAB)) in zs_enable_ms()
501 zport_a->regs[1] |= EXT_INT_ENAB; in zs_enable_ms()
781 if (!(zport->regs[1] & EXT_INT_ENAB)) in zs_startup()
786 zport->regs[1] |= RxINT_ALL | TxINT_ENAB | EXT_INT_ENAB; in zs_startup()
Dzs.h91 #define EXT_INT_ENAB 0x1 /* Ext Int Enable */ macro
Dip22zilog.h71 #define EXT_INT_ENAB 0x1 /* Ext Int Enable */ macro
Dsunzilog.h63 #define EXT_INT_ENAB 0x1 /* Ext Int Enable */ macro
Dip22zilog.c178 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB)); in __load_zsregs()
728 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in __ip22zilog_startup()
789 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in ip22zilog_shutdown()
1140 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in ip22zilog_prepare()
Dsunzilog.c197 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB)); in __load_zsregs()
793 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in __sunzilog_startup()
854 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in sunzilog_shutdown()
1347 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in sunzilog_init_hw()
1363 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in sunzilog_init_hw()
Dpmac_zilog.h160 #define EXT_INT_ENAB 0x1 /* Ext Int Enable */ macro
Dpmac_zilog.c132 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB)); in pmz_load_zsregs()
208 uap->curregs[1] |= EXT_INT_ENAB; in pmz_interrupt_control()
210 uap->curregs[1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in pmz_interrupt_control()
/drivers/net/wan/
Dz85230.h60 #define EXT_INT_ENAB 0x1 /* Ext Int Enable */ macro
Dz85230.c227 1, EXT_INT_ENAB|TxINT_ENAB|INT_ALL_Rx,
252 1, EXT_INT_ENAB|TxINT_ENAB|INT_ALL_Rx,