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Searched refs:IER (Results 1 – 25 of 30) sorted by relevance

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/drivers/tty/
Dmxser.c235 int IER; /* Interrupt Enable Register */ member
712 info->IER &= ~UART_IER_MSI; in mxser_change_speed()
716 info->IER |= UART_IER_MSI; in mxser_change_speed()
726 outb(info->IER & ~UART_IER_THRI, in mxser_change_speed()
729 info->IER |= UART_IER_THRI; in mxser_change_speed()
730 outb(info->IER, info->ioaddr + in mxser_change_speed()
740 info->IER &= ~UART_IER_THRI; in mxser_change_speed()
741 outb(info->IER, info->ioaddr + in mxser_change_speed()
751 info->IER |= UART_IER_MSI; in mxser_change_speed()
752 outb(info->IER, info->ioaddr + UART_IER); in mxser_change_speed()
[all …]
Damiserial.c97 int IER; /* Interrupt Enable Register */ member
161 if (info->IER & UART_IER_THRI) { in rs_stop()
162 info->IER &= ~UART_IER_THRI; in rs_stop()
180 && !(info->IER & UART_IER_THRI)) { in rs_start()
181 info->IER |= UART_IER_THRI; in rs_start()
314 info->IER &= ~UART_IER_THRI; in transmit_chars()
336 info->IER &= ~UART_IER_THRI; in transmit_chars()
386 info->IER |= UART_IER_THRI; in check_modem_status()
401 info->IER &= ~UART_IER_THRI; in check_modem_status()
420 if(info->IER & UART_IER_MSI) in ser_vbl_int()
[all …]
/drivers/macintosh/
Dvia-cuda.c51 #define IER (14*RS) /* Interrupt enable register */ macro
275 out_8(&via[IER], IER_SET|SR_INT); /* enable interrupt from SR */ in find_via_cuda()
381 out_8(&via[IER], 0x7f); /* disable interrupts from VIA */ in cuda_init_via()
382 (void)in_8(&via[IER]); in cuda_init_via()
384 out_8(&via[IER], SR_INT); /* disable SR interrupt from VIA */ in cuda_init_via()
Dvia-pmu.c99 #define IER (14*RS) /* Interrupt enable register */ macro
363 out_8(&via1[IER], IER_CLR | 0x7f); /* disable all intrs */ in find_via_pmu()
476 out_8(&via1[IER], IER_SET | SR_INT | CB1_INT); in via_pmu_start()
1325 out_8(&via1[IER], CB1_INT | IER_CLR); in pmu_suspend()
1349 out_8(&via1[IER], CB1_INT | IER_SET); in pmu_resume()
1620 intr, in_8(&via1[IER]), pmu_state); in via_pmu_interrupt()
1860 out_8(&via1[IER], IER_CLR | 0x7f); /* disable all intrs */ in restore_via_state()
1862 out_8(&via1[IER], IER_SET | SR_INT | CB1_INT); in restore_via_state()
Dvia-macii.c57 #define IER (14*RS) /* Interrupt enable register */ macro
/drivers/gpu/drm/i915/
Di915_irq.h140 gen3_irq_reset((uncore), type##IMR, type##IIR, type##IER)
157 type##IER, ier_val, \
/drivers/irqchip/
Dirq-xilinx-intc.c25 #define IER 0x08 /* Interrupt Enable Register */ macro
215 xintc_write(irqc, IER, 0); in xilinx_intc_of_init()
/drivers/net/hamradio/
Dbaycom_ser_fdx.c94 #define IER(iobase) (iobase+1) macro
408 outb(0, IER(dev->base_addr)); in ser12_open()
425 outb(0x0a, IER(dev->base_addr)); in ser12_open()
449 outb(0, IER(dev->base_addr)); in ser12_close()
Dbaycom_ser_hdx.c80 #define IER(iobase) (iobase+1) macro
476 outb(0, IER(dev->base_addr)); in ser12_open()
485 outb(2, IER(dev->base_addr)); in ser12_open()
508 outb(0, IER(dev->base_addr)); in ser12_close()
Dyam.c151 #define IER(iobase) (iobase+1) macro
293 outb(0, IER(iobase)); in fpga_reset()
465 outb(0, IER(dev->base_addr)); in yam_set_uart()
480 outb(ENABLE_RTXINT, IER(dev->base_addr)); in yam_set_uart()
864 outb(0, IER(dev->base_addr)); in yam_open()
907 outb(0, IER(dev->base_addr)); in yam_close()
/drivers/clocksource/
Dtimer-atmel-tcb.c101 writel(tcb_cache[i].imr, tcaddr + ATMEL_TC_REG(i, IER)); in tc_clksrc_resume()
186 writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER)); in tc_set_oneshot()
211 writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER)); in tc_set_periodic()
/drivers/block/rsxx/
Dcore.c59 ioread32(card->regmap + IER)); in rsxx_attr_pci_regs_show()
298 iowrite32(card->ier_mask, card->regmap + IER); in rsxx_enable_ier()
307 iowrite32(card->ier_mask, card->regmap + IER); in rsxx_disable_ier()
319 iowrite32(card->ier_mask, card->regmap + IER); in rsxx_enable_ier_and_isr()
329 iowrite32(card->ier_mask, card->regmap + IER); in rsxx_disable_ier_and_isr()
Drsxx_priv.h183 IER = 0x14, /* Interrupt Enable Register */ enumerator
/drivers/usb/serial/
Dio_16654.h32 #define IER 1 // ! Interrupt Enable Register macro
/drivers/power/reset/
Dqnap-poweroff.c65 writel(0x00, UART1_REG(IER)); in qnap_power_off()
/drivers/spi/
Dspi-at91-usart.c109 at91_usart_spi_writel(aus, IER, US_IR_RXRDY); in dma_callback()
265 at91_usart_spi_writel(aus, IER, US_IR_RXRDY); in at91_usart_spi_dma_transfer()
452 at91_usart_spi_writel(aus, IER, US_OVRE_RXRDY_IRQS); in at91_usart_spi_prepare_message()
Dspi-atmel.c608 spi_writel(as, IER, SPI_BIT(RDRF) | SPI_BIT(OVRES)); in atmel_spi_next_xfer_single()
678 spi_writel(as, IER, SPI_BIT(RXFTHF) | SPI_BIT(OVRES)); in atmel_spi_next_xfer_fifo()
771 spi_writel(as, IER, SPI_BIT(OVRES)); in atmel_spi_next_xfer_dma_submit()
920 spi_writel(as, IER, SPI_BIT(RXBUFF) | SPI_BIT(OVRES)); in atmel_spi_pdc_next_xfer()
/drivers/video/fbdev/i810/
Di810_regs.h44 #define IER 0x020A0 macro
/drivers/video/fbdev/
Di740_reg.h229 #define IER 0x3030 macro
/drivers/media/common/saa7146/
Dsaa7146_core.c396 saa7146_write(dev, IER, 0); in saa7146_init_one()
517 saa7146_write(dev, IER, 0); in saa7146_remove_one()
/drivers/net/ethernet/cadence/
Dmacb_main.c661 queue_writel(queue, IER, in macb_mac_link_up()
995 queue_writel(queue, IER, MACB_TX_INT_FLAGS); in macb_tx_error_task()
1469 queue_writel(queue, IER, bp->rx_intr_mask); in macb_poll()
1521 queue_writel(queue, IER, in macb_hresp_error_task()
3724 queue->IER = GEM_IER(hw_q - 1); in macb_init()
3739 queue->IER = MACB_IER; in macb_init()
3945 macb_writel(lp, IER, MACB_BIT(RCOMP) | in at91ether_start()
4735 queue_writel(bp->queues, IER, GEM_BIT(WOL)); in macb_suspend()
4747 queue_writel(bp->queues, IER, MACB_BIT(WOL)); in macb_suspend()
/drivers/video/fbdev/intelfb/
Dintelfbhw.h92 #define IER 0x20A0 macro
Dintelfbhw.c651 hw->ier = INREG16(IER); in intelfbhw_read_hw_state()
2060 if (tmp != INREG16(IER)) { in intelfbhw_enable_irq()
2062 OUTREG16(IER, tmp); in intelfbhw_enable_irq()
2079 OUTREG16(IER, 0x0); in intelfbhw_disable_irq()
/drivers/net/wireless/admtek/
Dadm8211.h30 __le32 IER; /* 0x38 CSR7 */ member
/drivers/net/ethernet/natsemi/
Dns83820.c314 #define IER 0x18 macro
755 writel(1, dev->base + IER); in ns83820_setup_rx()
1376 writel(0, dev->base + IER);
1377 readl(dev->base + IER);

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