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Searched refs:LCD_SPU_DZM_HPXL_VLN (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/armada/
Darmada_hw.h30 LCD_SPU_DZM_HPXL_VLN = 0x00f0, enumerator
Darmada_overlay.c106 armada_reg_queue_set(regs, idx, val, LCD_SPU_DZM_HPXL_VLN); in armada_drm_overlay_plane_atomic_update()
/drivers/video/fbdev/
Dpxa168fb.h35 #define LCD_SPU_DZM_HPXL_VLN 0x00F0 macro
/drivers/video/fbdev/mmp/hw/
Dmmp_ctrl.h208 #define LCD_SPU_DZM_HPXL_VLN 0x00F0 macro