| /sound/hda/ |
| D | hdac_regmap.c | 37 #define get_verb(reg) (((reg) >> 8) & 0xfff) argument
39 static bool hda_volatile_reg(struct device *dev, unsigned int reg) in hda_volatile_reg() argument
42 unsigned int verb = get_verb(reg); in hda_volatile_reg()
66 static bool hda_writeable_reg(struct device *dev, unsigned int reg) in hda_writeable_reg() argument
69 unsigned int verb = get_verb(reg); in hda_writeable_reg()
115 static bool hda_readable_reg(struct device *dev, unsigned int reg) in hda_readable_reg() argument
118 unsigned int verb = get_verb(reg); in hda_readable_reg()
137 return hda_writeable_reg(dev, reg); in hda_readable_reg()
148 static bool is_stereo_amp_verb(unsigned int reg) in is_stereo_amp_verb() argument
150 if (((reg >> 8) & 0x700) != AC_VERB_SET_AMP_GAIN_MUTE) in is_stereo_amp_verb()
[all …]
|
| /sound/soc/tegra/ |
| D | tegra210_admaif.c | 20 #define CH_REG(offset, reg, id) \ argument
21 ((offset) + (reg) + (TEGRA_ADMAIF_CHANNEL_REG_STRIDE * (id)))
23 #define CH_TX_REG(reg, id) CH_REG(admaif->soc_data->tx_base, reg, id) argument
25 #define CH_RX_REG(reg, id) CH_REG(admaif->soc_data->rx_base, reg, id) argument
80 static bool tegra_admaif_wr_reg(struct device *dev, unsigned int reg) in tegra_admaif_wr_reg() argument
92 if ((reg >= rx_base) && (reg < rx_max)) { in tegra_admaif_wr_reg()
93 reg = (reg - rx_base) % ch_stride; in tegra_admaif_wr_reg()
94 if ((reg == TEGRA_ADMAIF_RX_ENABLE) || in tegra_admaif_wr_reg()
95 (reg == TEGRA_ADMAIF_RX_FIFO_CTRL) || in tegra_admaif_wr_reg()
96 (reg == TEGRA_ADMAIF_RX_SOFT_RESET) || in tegra_admaif_wr_reg()
[all …]
|
| D | tegra30_ahub.c | 25 static inline void tegra30_apbif_write(u32 reg, u32 val) in tegra30_apbif_write() argument
27 regmap_write(ahub->regmap_apbif, reg, val); in tegra30_apbif_write()
30 static inline u32 tegra30_apbif_read(u32 reg) in tegra30_apbif_read() argument
34 regmap_read(ahub->regmap_apbif, reg, &val); in tegra30_apbif_read()
38 static inline void tegra30_audio_write(u32 reg, u32 val) in tegra30_audio_write() argument
40 regmap_write(ahub->regmap_ahub, reg, val); in tegra30_audio_write()
92 u32 reg, val; in tegra30_ahub_allocate_rx_fifo() local
109 reg = TEGRA30_AHUB_CHANNEL_CTRL + in tegra30_ahub_allocate_rx_fifo()
111 val = tegra30_apbif_read(reg); in tegra30_ahub_allocate_rx_fifo()
117 tegra30_apbif_write(reg, val); in tegra30_ahub_allocate_rx_fifo()
[all …]
|
| /sound/firewire/tascam/ |
| D | tascam-stream.c | 19 __be32 reg; in get_clock() local
25 ®, sizeof(reg), 0); in get_clock()
29 *data = be32_to_cpu(reg); in get_clock()
48 __be32 reg; in set_clock() local
79 reg = cpu_to_be32(data); in set_clock()
83 ®, sizeof(reg), 0); in set_clock()
88 reg = cpu_to_be32(0x0000001a); in set_clock()
90 reg = cpu_to_be32(0x0000000d); in set_clock()
94 ®, sizeof(reg), 0); in set_clock()
143 __be32 reg; in enable_data_channels() local
[all …]
|
| /sound/firewire/fireface/ |
| D | ff-protocol-former.c | 76 __le32 reg; in former_get_clock() local
81 FORMER_REG_CLOCK_CONFIG, ®, sizeof(reg), 0); in former_get_clock()
84 data = le32_to_cpu(reg); in former_get_clock()
92 __le32 *reg; in former_switch_fetching_mode() local
100 reg = kcalloc(count, sizeof(__le32), GFP_KERNEL); in former_switch_fetching_mode()
101 if (!reg) in former_switch_fetching_mode()
113 reg[i] = cpu_to_le32(0x00000001); in former_switch_fetching_mode()
117 FORMER_REG_FETCH_PCM_FRAMES, reg, in former_switch_fetching_mode()
119 kfree(reg); in former_switch_fetching_mode()
125 __le32 reg; in dump_clock_config() local
[all …]
|
| /sound/pci/ |
| D | ad1889.c | 69 u16 reg; /* reg setup */ member
98 ad1889_readw(struct snd_ad1889 *chip, unsigned reg) in ad1889_readw() argument
100 return readw(chip->iobase + reg); in ad1889_readw()
104 ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val) in ad1889_writew() argument
106 writew(val, chip->iobase + reg); in ad1889_writew()
110 ad1889_readl(struct snd_ad1889 *chip, unsigned reg) in ad1889_readl() argument
112 return readl(chip->iobase + reg); in ad1889_readl()
116 ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val) in ad1889_writel() argument
118 writel(val, chip->iobase + reg); in ad1889_writel()
185 u16 reg; in ad1889_channel_reset() local
[all …]
|
| D | azt3328.c | 320 snd_azf3328_io_reg_setb(unsigned reg, u8 mask, bool do_set) in snd_azf3328_io_reg_setb() argument
325 u8 prev = inb(reg), new; in snd_azf3328_io_reg_setb()
330 outb(new, reg); in snd_azf3328_io_reg_setb()
339 unsigned reg, in snd_azf3328_codec_outb() argument
343 outb(value, codec->io_base + reg); in snd_azf3328_codec_outb()
347 snd_azf3328_codec_inb(const struct snd_azf3328_codec_data *codec, unsigned reg) in snd_azf3328_codec_inb() argument
349 return inb(codec->io_base + reg); in snd_azf3328_codec_inb()
354 unsigned reg, in snd_azf3328_codec_outw() argument
358 outw(value, codec->io_base + reg); in snd_azf3328_codec_outw()
362 snd_azf3328_codec_inw(const struct snd_azf3328_codec_data *codec, unsigned reg) in snd_azf3328_codec_inw() argument
[all …]
|
| /sound/soc/codecs/ |
| D | wm8961.c | 110 static bool wm8961_volatile(struct device *dev, unsigned int reg) in wm8961_volatile() argument
112 switch (reg) { in wm8961_volatile()
123 static bool wm8961_readable(struct device *dev, unsigned int reg) in wm8961_readable() argument
125 switch (reg) { in wm8961_readable()
508 u16 reg; in wm8961_hw_params() local
524 reg = snd_soc_component_read(component, WM8961_ADDITIONAL_CONTROL_3); in wm8961_hw_params()
525 reg &= ~WM8961_SAMPLE_RATE_MASK; in wm8961_hw_params()
526 reg |= wm8961_srate[best].val; in wm8961_hw_params()
527 snd_soc_component_write(component, WM8961_ADDITIONAL_CONTROL_3, reg); in wm8961_hw_params()
557 reg = snd_soc_component_read(component, WM8961_CLOCKING_4); in wm8961_hw_params()
[all …]
|
| D | rt715-sdw.c | 23 static bool rt715_readable_register(struct device *dev, unsigned int reg) in rt715_readable_register() argument
25 switch (reg) { in rt715_readable_register()
120 static bool rt715_volatile_register(struct device *dev, unsigned int reg) in rt715_volatile_register() argument
122 switch (reg) { in rt715_volatile_register()
146 static int rt715_sdw_read(void *context, unsigned int reg, unsigned int *val) in rt715_sdw_read() argument
155 if (reg > 0xffff) in rt715_sdw_read()
158 mask = reg & 0xf000; in rt715_sdw_read()
161 val2 = reg & 0xff; in rt715_sdw_read()
162 reg = reg >> 8; in rt715_sdw_read()
163 nid = reg & 0xff; in rt715_sdw_read()
[all …]
|
| D | rl6347a.c | 16 int rl6347a_hw_write(void *context, unsigned int reg, unsigned int value) in rl6347a_hw_write() argument
24 if (reg <= 0xff) { in rl6347a_hw_write()
25 rl6347a_hw_write(client, RL6347A_COEF_INDEX, reg); in rl6347a_hw_write()
27 if (reg == rl6347a->index_cache[i].reg) { in rl6347a_hw_write()
33 reg = RL6347A_PROC_COEF; in rl6347a_hw_write()
36 data[0] = (reg >> 24) & 0xff; in rl6347a_hw_write()
37 data[1] = (reg >> 16) & 0xff; in rl6347a_hw_write()
43 data[2] = ((reg >> 8) & 0xff) | ((value >> 8) & 0xff); in rl6347a_hw_write()
59 int rl6347a_hw_read(void *context, unsigned int reg, unsigned int *value) in rl6347a_hw_read() argument
68 if (reg <= 0xff) { in rl6347a_hw_read()
[all …]
|
| D | rt711-sdw.c | 21 static bool rt711_readable_register(struct device *dev, unsigned int reg) in rt711_readable_register() argument
23 switch (reg) { in rt711_readable_register()
59 static bool rt711_volatile_register(struct device *dev, unsigned int reg) in rt711_volatile_register() argument
61 switch (reg) { in rt711_volatile_register()
88 static int rt711_sdw_read(void *context, unsigned int reg, unsigned int *val) in rt711_sdw_read() argument
97 if (reg > 0xffff) in rt711_sdw_read()
100 mask = reg & 0xf000; in rt711_sdw_read()
103 val2 = reg & 0xff; in rt711_sdw_read()
104 reg = reg >> 8; in rt711_sdw_read()
105 nid = reg & 0xff; in rt711_sdw_read()
[all …]
|
| D | rt700-sdw.c | 21 static bool rt700_readable_register(struct device *dev, unsigned int reg) in rt700_readable_register() argument
23 switch (reg) { in rt700_readable_register()
54 static bool rt700_volatile_register(struct device *dev, unsigned int reg) in rt700_volatile_register() argument
56 switch (reg) { in rt700_volatile_register()
84 static int rt700_sdw_read(void *context, unsigned int reg, unsigned int *val) in rt700_sdw_read() argument
93 if (reg > 0xffff) in rt700_sdw_read()
96 mask = reg & 0xf000; in rt700_sdw_read()
99 val2 = reg & 0xff; in rt700_sdw_read()
100 reg = reg >> 8; in rt700_sdw_read()
101 nid = reg & 0xff; in rt700_sdw_read()
[all …]
|
| D | tas6424.c | 408 unsigned int reg; in tas6424_fault_check_work() local
411 ret = regmap_read(tas6424->regmap, TAS6424_CHANNEL_FAULT, ®); in tas6424_fault_check_work()
417 if (!reg) { in tas6424_fault_check_work()
418 tas6424->last_cfault = reg; in tas6424_fault_check_work()
428 if ((reg & TAS6424_FAULT_OC_CH1) && !(tas6424->last_cfault & TAS6424_FAULT_OC_CH1)) in tas6424_fault_check_work()
431 if ((reg & TAS6424_FAULT_OC_CH2) && !(tas6424->last_cfault & TAS6424_FAULT_OC_CH2)) in tas6424_fault_check_work()
434 if ((reg & TAS6424_FAULT_OC_CH3) && !(tas6424->last_cfault & TAS6424_FAULT_OC_CH3)) in tas6424_fault_check_work()
437 if ((reg & TAS6424_FAULT_OC_CH4) && !(tas6424->last_cfault & TAS6424_FAULT_OC_CH4)) in tas6424_fault_check_work()
440 if ((reg & TAS6424_FAULT_DC_CH1) && !(tas6424->last_cfault & TAS6424_FAULT_DC_CH1)) in tas6424_fault_check_work()
443 if ((reg & TAS6424_FAULT_DC_CH2) && !(tas6424->last_cfault & TAS6424_FAULT_DC_CH2)) in tas6424_fault_check_work()
[all …]
|
| D | wm5100-tables.c | 12 bool wm5100_volatile_register(struct device *dev, unsigned int reg) in wm5100_volatile_register() argument
14 switch (reg) { in wm5100_volatile_register()
31 if ((reg >= WM5100_DSP1_PM_0 && reg <= WM5100_DSP1_PM_1535) || in wm5100_volatile_register()
32 (reg >= WM5100_DSP1_ZM_0 && reg <= WM5100_DSP1_ZM_2047) || in wm5100_volatile_register()
33 (reg >= WM5100_DSP1_DM_0 && reg <= WM5100_DSP1_DM_511) || in wm5100_volatile_register()
34 (reg >= WM5100_DSP2_PM_0 && reg <= WM5100_DSP2_PM_1535) || in wm5100_volatile_register()
35 (reg >= WM5100_DSP2_ZM_0 && reg <= WM5100_DSP2_ZM_2047) || in wm5100_volatile_register()
36 (reg >= WM5100_DSP2_DM_0 && reg <= WM5100_DSP2_DM_511) || in wm5100_volatile_register()
37 (reg >= WM5100_DSP3_PM_0 && reg <= WM5100_DSP3_PM_1535) || in wm5100_volatile_register()
38 (reg >= WM5100_DSP3_ZM_0 && reg <= WM5100_DSP3_ZM_2047) || in wm5100_volatile_register()
[all …]
|
| /sound/pci/oxygen/ |
| D | oxygen_io.c | 16 u8 oxygen_read8(struct oxygen *chip, unsigned int reg) in oxygen_read8() argument
18 return inb(chip->addr + reg); in oxygen_read8()
22 u16 oxygen_read16(struct oxygen *chip, unsigned int reg) in oxygen_read16() argument
24 return inw(chip->addr + reg); in oxygen_read16()
28 u32 oxygen_read32(struct oxygen *chip, unsigned int reg) in oxygen_read32() argument
30 return inl(chip->addr + reg); in oxygen_read32()
34 void oxygen_write8(struct oxygen *chip, unsigned int reg, u8 value) in oxygen_write8() argument
36 outb(value, chip->addr + reg); in oxygen_write8()
37 chip->saved_registers._8[reg] = value; in oxygen_write8()
41 void oxygen_write16(struct oxygen *chip, unsigned int reg, u16 value) in oxygen_write16() argument
[all …]
|
| D | xonar_cs43xx.c | 66 static void cs4398_write(struct oxygen *chip, u8 reg, u8 value) in cs4398_write() argument
70 oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value); in cs4398_write()
71 if (reg < ARRAY_SIZE(data->cs4398_regs)) in cs4398_write()
72 data->cs4398_regs[reg] = value; in cs4398_write()
75 static void cs4398_write_cached(struct oxygen *chip, u8 reg, u8 value) in cs4398_write_cached() argument
79 if (value != data->cs4398_regs[reg]) in cs4398_write_cached()
80 cs4398_write(chip, reg, value); in cs4398_write_cached()
83 static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value) in cs4362a_write() argument
87 oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value); in cs4362a_write()
88 if (reg < ARRAY_SIZE(data->cs4362a_regs)) in cs4362a_write()
[all …]
|
| /sound/soc/img/ |
| D | img-i2s-in.c | 88 static inline void img_i2s_in_writel(struct img_i2s_in *i2s, u32 val, u32 reg) in img_i2s_in_writel() argument
90 writel(val, i2s->base + reg); in img_i2s_in_writel()
93 static inline u32 img_i2s_in_readl(struct img_i2s_in *i2s, u32 reg) in img_i2s_in_readl() argument
95 return readl(i2s->base + reg); in img_i2s_in_readl()
99 u32 val, u32 reg) in img_i2s_in_ch_writel() argument
101 writel(val, i2s->channel_base + (chan * IMG_I2S_IN_CH_STRIDE) + reg); in img_i2s_in_ch_writel()
105 u32 reg) in img_i2s_in_ch_readl() argument
107 return readl(i2s->channel_base + (chan * IMG_I2S_IN_CH_STRIDE) + reg); in img_i2s_in_ch_readl()
112 u32 reg; in img_i2s_in_ch_disable() local
114 reg = img_i2s_in_ch_readl(i2s, chan, IMG_I2S_IN_CH_CTL); in img_i2s_in_ch_disable()
[all …]
|
| D | img-i2s-out.c | 99 u32 reg) in img_i2s_out_writel() argument
101 writel(val, i2s->base + reg); in img_i2s_out_writel()
104 static inline u32 img_i2s_out_readl(struct img_i2s_out *i2s, u32 reg) in img_i2s_out_readl() argument
106 return readl(i2s->base + reg); in img_i2s_out_readl()
110 u32 chan, u32 val, u32 reg) in img_i2s_out_ch_writel() argument
112 writel(val, i2s->channel_base + (chan * IMG_I2S_OUT_CH_STRIDE) + reg); in img_i2s_out_ch_writel()
116 u32 reg) in img_i2s_out_ch_readl() argument
118 return readl(i2s->channel_base + (chan * IMG_I2S_OUT_CH_STRIDE) + reg); in img_i2s_out_ch_readl()
123 u32 reg; in img_i2s_out_ch_disable() local
125 reg = img_i2s_out_ch_readl(i2s, chan, IMG_I2S_OUT_CH_CTL); in img_i2s_out_ch_disable()
[all …]
|
| /sound/firewire/motu/ |
| D | motu-protocol-v3.c | 33 __be32 reg; in snd_motu_protocol_v3_get_clock_rate() local
37 err = snd_motu_transaction_read(motu, V3_CLOCK_STATUS_OFFSET, ®, in snd_motu_protocol_v3_get_clock_rate()
38 sizeof(reg)); in snd_motu_protocol_v3_get_clock_rate()
41 data = be32_to_cpu(reg); in snd_motu_protocol_v3_get_clock_rate()
55 __be32 reg; in snd_motu_protocol_v3_set_clock_rate() local
67 err = snd_motu_transaction_read(motu, V3_CLOCK_STATUS_OFFSET, ®, in snd_motu_protocol_v3_set_clock_rate()
68 sizeof(reg)); in snd_motu_protocol_v3_set_clock_rate()
71 data = be32_to_cpu(reg); in snd_motu_protocol_v3_set_clock_rate()
76 need_to_wait = data != be32_to_cpu(reg); in snd_motu_protocol_v3_set_clock_rate()
78 reg = cpu_to_be32(data); in snd_motu_protocol_v3_set_clock_rate()
[all …]
|
| D | motu-protocol-v2.c | 41 __be32 reg; in snd_motu_protocol_v2_get_clock_rate() local
44 err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, ®, in snd_motu_protocol_v2_get_clock_rate()
45 sizeof(reg)); in snd_motu_protocol_v2_get_clock_rate()
49 return get_clock_rate(be32_to_cpu(reg), rate); in snd_motu_protocol_v2_get_clock_rate()
55 __be32 reg; in snd_motu_protocol_v2_set_clock_rate() local
67 err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, ®, in snd_motu_protocol_v2_set_clock_rate()
68 sizeof(reg)); in snd_motu_protocol_v2_set_clock_rate()
71 data = be32_to_cpu(reg); in snd_motu_protocol_v2_set_clock_rate()
76 reg = cpu_to_be32(data); in snd_motu_protocol_v2_set_clock_rate()
77 return snd_motu_transaction_write(motu, V2_CLOCK_STATUS_OFFSET, ®, in snd_motu_protocol_v2_set_clock_rate()
[all …]
|
| /sound/synth/emux/ |
| D | emux_proc.c | 54 vp->reg.parm.moddelay, in snd_emux_proc_info_read()
55 vp->reg.parm.modatkhld, in snd_emux_proc_info_read()
56 vp->reg.parm.moddcysus, in snd_emux_proc_info_read()
57 vp->reg.parm.modrelease); in snd_emux_proc_info_read()
59 vp->reg.parm.voldelay, in snd_emux_proc_info_read()
60 vp->reg.parm.volatkhld, in snd_emux_proc_info_read()
61 vp->reg.parm.voldcysus, in snd_emux_proc_info_read()
62 vp->reg.parm.volrelease); in snd_emux_proc_info_read()
64 vp->reg.parm.lfo1delay, in snd_emux_proc_info_read()
65 vp->reg.parm.lfo2delay, in snd_emux_proc_info_read()
[all …]
|
| /sound/isa/gus/ |
| D | gus_io.c | 31 static inline void __snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg) in __snd_gf1_ctrl_stop() argument
35 outb(reg | 0x80, gus->gf1.reg_regsel); in __snd_gf1_ctrl_stop()
39 outb(reg, gus->gf1.reg_regsel); in __snd_gf1_ctrl_stop()
46 unsigned char reg, in __snd_gf1_write8() argument
49 outb(reg, gus->gf1.reg_regsel); in __snd_gf1_write8()
56 unsigned char reg) in __snd_gf1_look8() argument
58 outb(reg, gus->gf1.reg_regsel); in __snd_gf1_look8()
64 unsigned char reg, unsigned int data) in __snd_gf1_write16() argument
66 outb(reg, gus->gf1.reg_regsel); in __snd_gf1_write16()
73 unsigned char reg) in __snd_gf1_look16() argument
[all …]
|
| /sound/soc/qcom/ |
| D | lpass-cpu.c | 447 static bool lpass_cpu_regmap_writeable(struct device *dev, unsigned int reg) in lpass_cpu_regmap_writeable() argument
454 if (reg == LPAIF_I2SCTL_REG(v, i)) in lpass_cpu_regmap_writeable()
458 if (reg == LPAIF_IRQEN_REG(v, i)) in lpass_cpu_regmap_writeable()
460 if (reg == LPAIF_IRQCLEAR_REG(v, i)) in lpass_cpu_regmap_writeable()
465 if (reg == LPAIF_RDMACTL_REG(v, i)) in lpass_cpu_regmap_writeable()
467 if (reg == LPAIF_RDMABASE_REG(v, i)) in lpass_cpu_regmap_writeable()
469 if (reg == LPAIF_RDMABUFF_REG(v, i)) in lpass_cpu_regmap_writeable()
471 if (reg == LPAIF_RDMAPER_REG(v, i)) in lpass_cpu_regmap_writeable()
476 if (reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
478 if (reg == LPAIF_WRDMABASE_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
[all …]
|
| /sound/firewire/dice/ |
| D | dice-stream.c | 66 __be32 reg, nominal; in ensure_phase_lock() local
72 ®, sizeof(reg)); in ensure_phase_lock()
76 data = be32_to_cpu(reg); in ensure_phase_lock()
90 reg = cpu_to_be32(data); in ensure_phase_lock()
92 ®, sizeof(reg)); in ensure_phase_lock()
118 __be32 reg[2]; in get_register_params() local
121 err = snd_dice_transaction_read_tx(dice, TX_NUMBER, reg, sizeof(reg)); in get_register_params()
125 min_t(unsigned int, be32_to_cpu(reg[0]), MAX_STREAMS); in get_register_params()
126 tx_params->size = be32_to_cpu(reg[1]) * 4; in get_register_params()
128 err = snd_dice_transaction_read_rx(dice, RX_NUMBER, reg, sizeof(reg)); in get_register_params()
[all …]
|
| /sound/soc/intel/catpt/ |
| D | registers.h | 151 #define catpt_writel_ssp(cdev, ssp, reg, val) \ argument
152 writel(val, catpt_ssp_addr(cdev, ssp) + (reg))
154 #define catpt_readl_shim(cdev, reg) \ argument
155 readl(catpt_shim_addr(cdev) + CATPT_SHIM_##reg)
156 #define catpt_writel_shim(cdev, reg, val) \ argument
157 writel(val, catpt_shim_addr(cdev) + CATPT_SHIM_##reg)
158 #define catpt_updatel_shim(cdev, reg, mask, val) \ argument
159 catpt_writel_shim(cdev, reg, \
160 (catpt_readl_shim(cdev, reg) & ~(mask)) | (val))
162 #define catpt_readl_poll_shim(cdev, reg, val, cond, delay_us, timeout_us) \ argument
[all …]
|