/sound/pci/ice1712/ |
D | wm8776.c | 137 .reg1 = WM8776_REG_DACLVOL, 147 .reg1 = WM8776_REG_DACCTRL1, 156 .reg1 = WM8776_REG_DACCTRL1, 163 .reg1 = WM8776_REG_HPLVOL, 174 .reg1 = WM8776_REG_PWRDOWN, 181 .reg1 = WM8776_REG_HPLVOL, 190 .reg1 = WM8776_REG_OUTMUX, 196 .reg1 = WM8776_REG_OUTMUX, 202 .reg1 = WM8776_REG_DACCTRL1, 208 .reg1 = WM8776_REG_PHASESWAP, [all …]
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D | wm8766.c | 34 .reg1 = WM8766_REG_DACL1, 45 .reg1 = WM8766_REG_DACL2, 56 .reg1 = WM8766_REG_DACL3, 66 .reg1 = WM8766_REG_DACCTRL2, 73 .reg1 = WM8766_REG_DACCTRL2, 80 .reg1 = WM8766_REG_DACCTRL2, 87 .reg1 = WM8766_REG_IFCTRL, 93 .reg1 = WM8766_REG_IFCTRL, 99 .reg1 = WM8766_REG_IFCTRL, 105 .reg1 = WM8766_REG_DACCTRL2, [all …]
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D | wm8766.h | 124 u16 reg1, reg2, mask1, mask2, min, max, flags; member
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D | wm8776.h | 180 u16 reg1, reg2, mask1, mask2, min, max, flags; member
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/sound/pci/ |
D | ak4531_codec.c | 198 #define AK4531_INPUT_SW(xname, xindex, reg1, reg2, left_shift, right_shift) \ argument 202 .private_value = reg1 | (reg2 << 8) | (left_shift << 16) | (right_shift << 24) } 216 int reg1 = kcontrol->private_value & 0xff; in snd_ak4531_get_input_sw() local 222 ucontrol->value.integer.value[0] = (ak4531->regs[reg1] >> left_shift) & 1; in snd_ak4531_get_input_sw() 224 ucontrol->value.integer.value[2] = (ak4531->regs[reg1] >> right_shift) & 1; in snd_ak4531_get_input_sw() 233 int reg1 = kcontrol->private_value & 0xff; in snd_ak4531_put_input_sw() local 241 val1 = ak4531->regs[reg1] & ~((1 << left_shift) | (1 << right_shift)); in snd_ak4531_put_input_sw() 247 change = val1 != ak4531->regs[reg1] || val2 != ak4531->regs[reg2]; in snd_ak4531_put_input_sw() 248 ak4531->write(ak4531, reg1, ak4531->regs[reg1] = val1); in snd_ak4531_put_input_sw()
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/sound/soc/codecs/ |
D | cx2072x.c | 690 union cx2072x_reg_i2spcm_ctrl_reg1 reg1; in cx2072x_config_i2spcm() local 782 reg1.r.rx_data_one_line = 1; in cx2072x_config_i2spcm() 783 reg1.r.tx_data_one_line = 1; in cx2072x_config_i2spcm() 791 reg1.r.rx_ws_pol = is_frame_inv; in cx2072x_config_i2spcm() 792 reg1.r.rx_ws_wid = pulse_len - 1; in cx2072x_config_i2spcm() 794 reg1.r.rx_frm_len = frame_len / BITS_PER_SLOT - 1; in cx2072x_config_i2spcm() 795 reg1.r.rx_sa_size = (sample_size / BITS_PER_SLOT) - 1; in cx2072x_config_i2spcm() 797 reg1.r.tx_ws_pol = reg1.r.rx_ws_pol; in cx2072x_config_i2spcm() 798 reg1.r.tx_ws_wid = pulse_len - 1; in cx2072x_config_i2spcm() 799 reg1.r.tx_frm_len = reg1.r.rx_frm_len; in cx2072x_config_i2spcm() [all …]
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D | wm8993.c | 471 u16 reg1, reg4, reg5; in _wm8993_set_fll() local 486 reg1 = snd_soc_component_read(component, WM8993_FLL_CONTROL_1); in _wm8993_set_fll() 487 reg1 &= ~WM8993_FLL_ENA; in _wm8993_set_fll() 488 snd_soc_component_write(component, WM8993_FLL_CONTROL_1, reg1); in _wm8993_set_fll() 519 reg1 = snd_soc_component_read(component, WM8993_FLL_CONTROL_1); in _wm8993_set_fll() 520 reg1 &= ~WM8993_FLL_ENA; in _wm8993_set_fll() 521 snd_soc_component_write(component, WM8993_FLL_CONTROL_1, reg1); in _wm8993_set_fll() 525 reg1 |= WM8993_FLL_FRAC_MASK; in _wm8993_set_fll() 527 reg1 &= ~WM8993_FLL_FRAC_MASK; in _wm8993_set_fll() 528 snd_soc_component_write(component, WM8993_FLL_CONTROL_1, reg1); in _wm8993_set_fll() [all …]
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D | wm9081.c | 549 u16 reg1, reg4, reg5; in wm9081_set_fll() local 592 reg1 = snd_soc_component_read(component, WM9081_FLL_CONTROL_1); in wm9081_set_fll() 593 reg1 &= ~WM9081_FLL_ENA; in wm9081_set_fll() 594 snd_soc_component_write(component, WM9081_FLL_CONTROL_1, reg1); in wm9081_set_fll() 598 reg1 |= WM9081_FLL_FRAC_MASK; in wm9081_set_fll() 600 reg1 &= ~WM9081_FLL_FRAC_MASK; in wm9081_set_fll() 601 snd_soc_component_write(component, WM9081_FLL_CONTROL_1, reg1); in wm9081_set_fll() 622 snd_soc_component_write(component, WM9081_FLL_CONTROL_1, reg1 | WM9081_FLL_ENA); in wm9081_set_fll()
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D | wm8995.c | 673 int reg1 = 0; in configure_aif_clock() local 688 reg1 |= 0x8; in configure_aif_clock() 692 reg1 |= 0x10; in configure_aif_clock() 696 reg1 |= 0x18; in configure_aif_clock() 705 reg1 |= WM8995_AIF1CLK_DIV; in configure_aif_clock() 715 reg1); in configure_aif_clock()
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D | wm8994.c | 166 int reg1 = 0; in configure_aif_clock() local 180 reg1 |= 0x8; in configure_aif_clock() 185 reg1 |= 0x10; in configure_aif_clock() 190 reg1 |= 0x18; in configure_aif_clock() 200 reg1 |= WM8994_AIF1CLK_DIV; in configure_aif_clock() 210 reg1); in configure_aif_clock()
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/sound/isa/sb/ |
D | sb_mixer.c | 388 int reg1 = kcontrol->private_value & 0xff; in snd_sb16mixer_get_input_sw() local 395 val1 = snd_sbmixer_read(sb, reg1); in snd_sb16mixer_get_input_sw() 409 int reg1 = kcontrol->private_value & 0xff; in snd_sb16mixer_put_input_sw() local 417 oval1 = snd_sbmixer_read(sb, reg1); in snd_sb16mixer_put_input_sw() 427 snd_sbmixer_write(sb, reg1, val1); in snd_sb16mixer_put_input_sw()
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/sound/soc/fsl/ |
D | fsl_easrc.c | 753 unsigned int reg0, reg1, reg2, reg3; in fsl_easrc_config_one_slot() local 758 reg1 = REG_EASRC_DPCS0R1(slot_ctx_idx); in fsl_easrc_config_one_slot() 763 reg1 = REG_EASRC_DPCS1R1(slot_ctx_idx); in fsl_easrc_config_one_slot() 824 regmap_update_bits(easrc->regmap, reg1, in fsl_easrc_config_one_slot()
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