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Searched refs:reg_offset (Results 1 – 11 of 11) sorted by relevance

/sound/soc/fsl/
Dfsl_sai.c61 unsigned int ofs = sai->soc_data->reg_offset; in fsl_sai_isr()
172 unsigned int ofs = sai->soc_data->reg_offset; in fsl_sai_set_dai_sysclk_tr()
226 unsigned int ofs = sai->soc_data->reg_offset; in fsl_sai_set_dai_fmt_tr()
351 unsigned int ofs = sai->soc_data->reg_offset; in fsl_sai_set_bclk()
439 unsigned int ofs = sai->soc_data->reg_offset; in fsl_sai_hw_params()
534 unsigned int ofs = sai->soc_data->reg_offset; in fsl_sai_hw_free()
550 unsigned int ofs = sai->soc_data->reg_offset; in fsl_sai_config_disable()
585 unsigned int ofs = sai->soc_data->reg_offset; in fsl_sai_trigger()
705 unsigned int ofs = sai->soc_data->reg_offset; in fsl_sai_dai_probe()
807 unsigned int ofs = sai->soc_data->reg_offset; in fsl_sai_readable_reg()
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Dfsl_sai.h224 unsigned int reg_offset; member
/sound/pci/
Dintel8x0m.c155 unsigned long reg_offset; /* offset to bmaddr */ member
384 unsigned long port = ichdev->reg_offset; in snd_intel8x0m_setup_periods()
434 unsigned long port = ichdev->reg_offset; in snd_intel8x0m_update()
526 unsigned long port = ichdev->reg_offset; in snd_intel8x0m_pcm_trigger()
562 ptr1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb) << chip->pcm_pos_shift; in snd_intel8x0m_pcm_pointer()
951 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, 0x00); in snd_intel8x0m_chip_init()
954 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, ICH_RESETREGS); in snd_intel8x0m_chip_init()
957 iputdword(chip, ICH_REG_OFF_BDBAR + chip->ichd[i].reg_offset, chip->ichd[i].bdbar_addr); in snd_intel8x0m_chip_init()
969 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, 0x00); in snd_intel8x0m_free()
972 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, ICH_RESETREGS); in snd_intel8x0m_free()
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Dintel8x0.c333 unsigned long reg_offset; /* offset to bmaddr */ member
661 unsigned long port = ichdev->reg_offset; in snd_intel8x0_setup_periods()
713 unsigned long port = ichdev->reg_offset; in snd_intel8x0_update()
812 unsigned long port = ichdev->reg_offset; in snd_intel8x0_pcm_trigger()
849 unsigned long port = ichdev->reg_offset; in snd_intel8x0_ali_trigger()
1022 civ = igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV); in snd_intel8x0_pcm_pointer()
1023 ptr1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb); in snd_intel8x0_pcm_pointer()
1029 if (civ != igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV)) in snd_intel8x0_pcm_pointer()
1040 if (ptr1 == igetword(chip, ichdev->reg_offset + ichdev->roff_picb)) in snd_intel8x0_pcm_pointer()
2527 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, 0x00); in snd_intel8x0_chip_init()
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Dvia82xx.c311 unsigned int reg_offset; member
967 ((viadev->reg_offset & 0x10) == 0 ? VIA_REG_TYPE_INT_LSAMPLE : 0) | in via686_setup_format()
1032 if (chip->spdif_on && viadev->reg_offset == 0x30) in snd_via8233_playback_prepare()
1043 outb(chip->playback_volume[viadev->reg_offset / 0x10][0], in snd_via8233_playback_prepare()
1045 outb(chip->playback_volume[viadev->reg_offset / 0x10][1], in snd_via8233_playback_prepare()
1173 if (chip->spdif_on && viadev->reg_offset == 0x30) { in snd_via82xx_pcm_open()
1177 } else if (chip->dxs_fixed && viadev->reg_offset < 0x40) { in snd_via82xx_pcm_open()
1181 } else if (chip->dxs_src && viadev->reg_offset < 0x40) { in snd_via82xx_pcm_open()
1244 stream = viadev->reg_offset / 0x10; in snd_via8233_playback_open()
1338 stream = viadev->reg_offset / 0x10; in snd_via8233_playback_close()
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Dvia82xx_modem.c206 unsigned int reg_offset; member
815 static void init_viadev(struct via82xx_modem *chip, int idx, unsigned int reg_offset, in init_viadev() argument
818 chip->devs[idx].reg_offset = reg_offset; in init_viadev()
820 chip->devs[idx].port = chip->port + reg_offset; in init_viadev()
/sound/soc/codecs/
Dwm8995.c1800 int reg_offset, ret; in wm8995_set_fll() local
1815 reg_offset = 0; in wm8995_set_fll()
1819 reg_offset = 0x20; in wm8995_set_fll()
1865 snd_soc_component_update_bits(component, WM8995_FLL1_CONTROL_1 + reg_offset, in wm8995_set_fll()
1870 snd_soc_component_update_bits(component, WM8995_FLL1_CONTROL_2 + reg_offset, in wm8995_set_fll()
1874 snd_soc_component_write(component, WM8995_FLL1_CONTROL_3 + reg_offset, fll.k); in wm8995_set_fll()
1876 snd_soc_component_update_bits(component, WM8995_FLL1_CONTROL_4 + reg_offset, in wm8995_set_fll()
1880 snd_soc_component_update_bits(component, WM8995_FLL1_CONTROL_5 + reg_offset, in wm8995_set_fll()
1887 snd_soc_component_update_bits(component, WM8995_FLL1_CONTROL_1 + reg_offset, in wm8995_set_fll()
Dwm8994.c2210 int reg_offset, ret; in _wm8994_set_fll() local
2219 reg_offset = 0; in _wm8994_set_fll()
2224 reg_offset = 0x20; in _wm8994_set_fll()
2232 reg = snd_soc_component_read(component, WM8994_FLL1_CONTROL_1 + reg_offset); in _wm8994_set_fll()
2288 snd_soc_component_update_bits(component, WM8994_FLL1_CONTROL_1 + reg_offset, in _wm8994_set_fll()
2294 + reg_offset); in _wm8994_set_fll()
2315 snd_soc_component_update_bits(component, WM8994_FLL1_CONTROL_5 + reg_offset, in _wm8994_set_fll()
2322 snd_soc_component_update_bits(component, WM8994_FLL1_CONTROL_2 + reg_offset, in _wm8994_set_fll()
2326 snd_soc_component_update_bits(component, WM8994_FLL1_CONTROL_3 + reg_offset, in _wm8994_set_fll()
2329 snd_soc_component_update_bits(component, WM8994_FLL1_CONTROL_4 + reg_offset, in _wm8994_set_fll()
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Dwcd9335.c5002 .reg_offset = 0,
/sound/soc/sh/rcar/
Dgen.c38 unsigned int reg_offset; member
46 .reg_offset = offset, \
191 regf.reg = conf[i].reg_offset; in _rsnd_gen_regmap_init()
/sound/soc/rockchip/
Drockchip_i2s.c27 u32 reg_offset; member
376 regmap_write(i2s->grf, i2s->pins->reg_offset, val); in rockchip_i2s_hw_params()
574 .reg_offset = 0xe220,