| /arch/x86/kvm/vmx/ |
| D | posted_intr.h | 10 u32 pir[8]; /* Posted interrupt requested */ member
45 return test_and_set_bit(vector, (unsigned long *)pi_desc->pir); in pi_test_and_set_pir()
50 return bitmap_empty((unsigned long *)pi_desc->pir, NR_VECTORS); in pi_is_pir_empty()
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| D | vmx.c | 6462 kvm_apic_update_irr(vcpu, vmx->pi_desc.pir, &max_irr); in vmx_sync_pir_to_irr()
6496 memset(vmx->pi_desc.pir, 0, sizeof(vmx->pi_desc.pir)); in vmx_apicv_post_state_restore()
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| D | nested.c | 3770 max_irr = find_last_bit((unsigned long *)vmx->nested.pi_desc->pir, 256); in vmx_complete_nested_posted_interrupt()
3776 __kvm_apic_update_irr(vmx->nested.pi_desc->pir, in vmx_complete_nested_posted_interrupt()
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| /arch/powerpc/platforms/powernv/ |
| D | idle.c | 81 uint64_t pir = get_hard_smp_processor_id(cpu); in pnv_save_sprs_for_deep_states() local
84 rc = opal_slw_set_reg(pir, SPRN_HSPRG0, hsprg0_val); in pnv_save_sprs_for_deep_states()
88 rc = opal_slw_set_reg(pir, SPRN_LPCR, lpcr_val); in pnv_save_sprs_for_deep_states()
93 rc = opal_slw_set_reg(pir, P9_STOP_SPR_MSR, msr_val); in pnv_save_sprs_for_deep_states()
97 rc = opal_slw_set_reg(pir, in pnv_save_sprs_for_deep_states()
107 rc = opal_slw_set_reg(pir, SPRN_HMEER, hmeer_val); in pnv_save_sprs_for_deep_states()
111 rc = opal_slw_set_reg(pir, SPRN_HID0, hid0_val); in pnv_save_sprs_for_deep_states()
121 rc = opal_slw_set_reg(pir, SPRN_HID1, hid1_val); in pnv_save_sprs_for_deep_states()
125 rc = opal_slw_set_reg(pir, SPRN_HID4, hid4_val); in pnv_save_sprs_for_deep_states()
129 rc = opal_slw_set_reg(pir, SPRN_HID5, hid5_val); in pnv_save_sprs_for_deep_states()
[all …]
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| D | opal-fadump.h | 59 __be32 pir; member
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| D | opal-core.c | 111 static void fill_prstatus(struct elf_prstatus *prstatus, int pir, in fill_prstatus() argument
122 prstatus->pr_pid = cpu_to_be32(100 + pir); in fill_prstatus()
129 if (pir == oc_conf->crashing_cpu) { in fill_prstatus()
260 thread_pir = be32_to_cpu(thdr->pir); in opalcore_append_cpu_notes()
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| D | opal-hmi.c | 80 be32_to_cpu(hmi_evt->u.xstop_error.u.pir)); in print_core_checkstop_reason()
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| D | opal-fadump.c | 462 thread_pir = be32_to_cpu(thdr->pir); in opal_fadump_build_cpu_notes()
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| /arch/powerpc/include/uapi/asm/ |
| D | kvm_para.h | 59 __u32 pir; member
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| D | kvm.h | 210 __u32 pir; /* read-only */ member
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| /arch/powerpc/kvm/ |
| D | e500_emulate.c | 67 int pir = param & PPC_DBELL_PIR_MASK; in kvmppc_e500_emul_msgsnd() local
75 int cpir = cvcpu->arch.shared->pir; in kvmppc_e500_emul_msgsnd()
76 if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) { in kvmppc_e500_emul_msgsnd()
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| D | booke.c | 1524 sregs->u.e.pir = vcpu->vcpu_id; in get_sregs_arch206()
1537 if (sregs->u.e.pir != vcpu->vcpu_id) in set_sregs_arch206()
2106 vcpu->arch.shared->pir = vcpu->vcpu_id; in kvmppc_core_vcpu_create()
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| D | mpic.c | 217 uint32_t pir; /* Processor initialization register */ member
521 opp->pir = 0; in openpic_reset()
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| /arch/powerpc/platforms/85xx/ |
| D | smp.c | 40 u32 pir; member
250 out_be32(&spin_table->pir, hw_cpu); in smp_85xx_start_cpu()
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| /arch/x86/kvm/ |
| D | lapic.h | 93 bool __kvm_apic_update_irr(u32 *pir, void *regs, int *max_irr);
94 bool kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir, int *max_irr);
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| D | lapic.c | 423 bool __kvm_apic_update_irr(u32 *pir, void *regs, int *max_irr) in __kvm_apic_update_irr() argument
433 pir_val = READ_ONCE(pir[i]); in __kvm_apic_update_irr()
437 irr_val |= xchg(&pir[i], 0); in __kvm_apic_update_irr()
453 bool kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir, int *max_irr) in kvm_apic_update_irr() argument
457 return __kvm_apic_update_irr(pir, apic->regs, max_irr); in kvm_apic_update_irr()
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| /arch/powerpc/sysdev/ |
| D | mpic.c | 1908 u32 pir; in mpic_reset_core() local
1913 pir = mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT)); in mpic_reset_core()
1914 pir |= (1 << cpuid); in mpic_reset_core()
1915 mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir); in mpic_reset_core()
1919 pir &= ~(1 << cpuid); in mpic_reset_core()
1920 mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir); in mpic_reset_core()
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| /arch/powerpc/kernel/ |
| D | sysfs.c | 582 SYSFS_SPRSETUP(pir, SPRN_PIR);
592 static DEVICE_ATTR(pir, 0400, show_pir, NULL);
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| D | kvm.c | 527 kvm_patch_ins_lwz(inst, magic_var(pir), inst_rt); in kvm_check_ins()
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| /arch/powerpc/include/asm/ |
| D | opal-api.h | 636 __be32 pir; /* for CHECKSTOP_TYPE_CORE */ member
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