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1.. SPDX-License-Identifier: GPL-2.0
2
3===================================================================
4The Definitive KVM (Kernel-based Virtual Machine) API Documentation
5===================================================================
6
71. General description
8======================
9
10The kvm API is a set of ioctls that are issued to control various aspects
11of a virtual machine.  The ioctls belong to the following classes:
12
13 - System ioctls: These query and set global attributes which affect the
14   whole kvm subsystem.  In addition a system ioctl is used to create
15   virtual machines.
16
17 - VM ioctls: These query and set attributes that affect an entire virtual
18   machine, for example memory layout.  In addition a VM ioctl is used to
19   create virtual cpus (vcpus) and devices.
20
21   VM ioctls must be issued from the same process (address space) that was
22   used to create the VM.
23
24 - vcpu ioctls: These query and set attributes that control the operation
25   of a single virtual cpu.
26
27   vcpu ioctls should be issued from the same thread that was used to create
28   the vcpu, except for asynchronous vcpu ioctl that are marked as such in
29   the documentation.  Otherwise, the first ioctl after switching threads
30   could see a performance impact.
31
32 - device ioctls: These query and set attributes that control the operation
33   of a single device.
34
35   device ioctls must be issued from the same process (address space) that
36   was used to create the VM.
37
382. File descriptors
39===================
40
41The kvm API is centered around file descriptors.  An initial
42open("/dev/kvm") obtains a handle to the kvm subsystem; this handle
43can be used to issue system ioctls.  A KVM_CREATE_VM ioctl on this
44handle will create a VM file descriptor which can be used to issue VM
45ioctls.  A KVM_CREATE_VCPU or KVM_CREATE_DEVICE ioctl on a VM fd will
46create a virtual cpu or device and return a file descriptor pointing to
47the new resource.  Finally, ioctls on a vcpu or device fd can be used
48to control the vcpu or device.  For vcpus, this includes the important
49task of actually running guest code.
50
51In general file descriptors can be migrated among processes by means
52of fork() and the SCM_RIGHTS facility of unix domain socket.  These
53kinds of tricks are explicitly not supported by kvm.  While they will
54not cause harm to the host, their actual behavior is not guaranteed by
55the API.  See "General description" for details on the ioctl usage
56model that is supported by KVM.
57
58It is important to note that althought VM ioctls may only be issued from
59the process that created the VM, a VM's lifecycle is associated with its
60file descriptor, not its creator (process).  In other words, the VM and
61its resources, *including the associated address space*, are not freed
62until the last reference to the VM's file descriptor has been released.
63For example, if fork() is issued after ioctl(KVM_CREATE_VM), the VM will
64not be freed until both the parent (original) process and its child have
65put their references to the VM's file descriptor.
66
67Because a VM's resources are not freed until the last reference to its
68file descriptor is released, creating additional references to a VM
69via fork(), dup(), etc... without careful consideration is strongly
70discouraged and may have unwanted side effects, e.g. memory allocated
71by and on behalf of the VM's process may not be freed/unaccounted when
72the VM is shut down.
73
74
753. Extensions
76=============
77
78As of Linux 2.6.22, the KVM ABI has been stabilized: no backward
79incompatible change are allowed.  However, there is an extension
80facility that allows backward-compatible extensions to the API to be
81queried and used.
82
83The extension mechanism is not based on the Linux version number.
84Instead, kvm defines extension identifiers and a facility to query
85whether a particular extension identifier is available.  If it is, a
86set of ioctls is available for application use.
87
88
894. API description
90==================
91
92This section describes ioctls that can be used to control kvm guests.
93For each ioctl, the following information is provided along with a
94description:
95
96  Capability:
97      which KVM extension provides this ioctl.  Can be 'basic',
98      which means that is will be provided by any kernel that supports
99      API version 12 (see section 4.1), a KVM_CAP_xyz constant, which
100      means availability needs to be checked with KVM_CHECK_EXTENSION
101      (see section 4.4), or 'none' which means that while not all kernels
102      support this ioctl, there's no capability bit to check its
103      availability: for kernels that don't support the ioctl,
104      the ioctl returns -ENOTTY.
105
106  Architectures:
107      which instruction set architectures provide this ioctl.
108      x86 includes both i386 and x86_64.
109
110  Type:
111      system, vm, or vcpu.
112
113  Parameters:
114      what parameters are accepted by the ioctl.
115
116  Returns:
117      the return value.  General error numbers (EBADF, ENOMEM, EINVAL)
118      are not detailed, but errors with specific meanings are.
119
120
1214.1 KVM_GET_API_VERSION
122-----------------------
123
124:Capability: basic
125:Architectures: all
126:Type: system ioctl
127:Parameters: none
128:Returns: the constant KVM_API_VERSION (=12)
129
130This identifies the API version as the stable kvm API. It is not
131expected that this number will change.  However, Linux 2.6.20 and
1322.6.21 report earlier versions; these are not documented and not
133supported.  Applications should refuse to run if KVM_GET_API_VERSION
134returns a value other than 12.  If this check passes, all ioctls
135described as 'basic' will be available.
136
137
1384.2 KVM_CREATE_VM
139-----------------
140
141:Capability: basic
142:Architectures: all
143:Type: system ioctl
144:Parameters: machine type identifier (KVM_VM_*)
145:Returns: a VM fd that can be used to control the new virtual machine.
146
147The new VM has no virtual cpus and no memory.
148You probably want to use 0 as machine type.
149
150In order to create user controlled virtual machines on S390, check
151KVM_CAP_S390_UCONTROL and use the flag KVM_VM_S390_UCONTROL as
152privileged user (CAP_SYS_ADMIN).
153
154To use hardware assisted virtualization on MIPS (VZ ASE) rather than
155the default trap & emulate implementation (which changes the virtual
156memory layout to fit in user mode), check KVM_CAP_MIPS_VZ and use the
157flag KVM_VM_MIPS_VZ.
158
159
160On arm64, the physical address size for a VM (IPA Size limit) is limited
161to 40bits by default. The limit can be configured if the host supports the
162extension KVM_CAP_ARM_VM_IPA_SIZE. When supported, use
163KVM_VM_TYPE_ARM_IPA_SIZE(IPA_Bits) to set the size in the machine type
164identifier, where IPA_Bits is the maximum width of any physical
165address used by the VM. The IPA_Bits is encoded in bits[7-0] of the
166machine type identifier.
167
168e.g, to configure a guest to use 48bit physical address size::
169
170    vm_fd = ioctl(dev_fd, KVM_CREATE_VM, KVM_VM_TYPE_ARM_IPA_SIZE(48));
171
172The requested size (IPA_Bits) must be:
173
174 ==   =========================================================
175  0   Implies default size, 40bits (for backward compatibility)
176  N   Implies N bits, where N is a positive integer such that,
177      32 <= N <= Host_IPA_Limit
178 ==   =========================================================
179
180Host_IPA_Limit is the maximum possible value for IPA_Bits on the host and
181is dependent on the CPU capability and the kernel configuration. The limit can
182be retrieved using KVM_CAP_ARM_VM_IPA_SIZE of the KVM_CHECK_EXTENSION
183ioctl() at run-time.
184
185Creation of the VM will fail if the requested IPA size (whether it is
186implicit or explicit) is unsupported on the host.
187
188Please note that configuring the IPA size does not affect the capability
189exposed by the guest CPUs in ID_AA64MMFR0_EL1[PARange]. It only affects
190size of the address translated by the stage2 level (guest physical to
191host physical address translations).
192
193
1944.3 KVM_GET_MSR_INDEX_LIST, KVM_GET_MSR_FEATURE_INDEX_LIST
195----------------------------------------------------------
196
197:Capability: basic, KVM_CAP_GET_MSR_FEATURES for KVM_GET_MSR_FEATURE_INDEX_LIST
198:Architectures: x86
199:Type: system ioctl
200:Parameters: struct kvm_msr_list (in/out)
201:Returns: 0 on success; -1 on error
202
203Errors:
204
205  ======     ============================================================
206  EFAULT     the msr index list cannot be read from or written to
207  E2BIG      the msr index list is to be to fit in the array specified by
208             the user.
209  ======     ============================================================
210
211::
212
213  struct kvm_msr_list {
214	__u32 nmsrs; /* number of msrs in entries */
215	__u32 indices[0];
216  };
217
218The user fills in the size of the indices array in nmsrs, and in return
219kvm adjusts nmsrs to reflect the actual number of msrs and fills in the
220indices array with their numbers.
221
222KVM_GET_MSR_INDEX_LIST returns the guest msrs that are supported.  The list
223varies by kvm version and host processor, but does not change otherwise.
224
225Note: if kvm indicates supports MCE (KVM_CAP_MCE), then the MCE bank MSRs are
226not returned in the MSR list, as different vcpus can have a different number
227of banks, as set via the KVM_X86_SETUP_MCE ioctl.
228
229KVM_GET_MSR_FEATURE_INDEX_LIST returns the list of MSRs that can be passed
230to the KVM_GET_MSRS system ioctl.  This lets userspace probe host capabilities
231and processor features that are exposed via MSRs (e.g., VMX capabilities).
232This list also varies by kvm version and host processor, but does not change
233otherwise.
234
235
2364.4 KVM_CHECK_EXTENSION
237-----------------------
238
239:Capability: basic, KVM_CAP_CHECK_EXTENSION_VM for vm ioctl
240:Architectures: all
241:Type: system ioctl, vm ioctl
242:Parameters: extension identifier (KVM_CAP_*)
243:Returns: 0 if unsupported; 1 (or some other positive integer) if supported
244
245The API allows the application to query about extensions to the core
246kvm API.  Userspace passes an extension identifier (an integer) and
247receives an integer that describes the extension availability.
248Generally 0 means no and 1 means yes, but some extensions may report
249additional information in the integer return value.
250
251Based on their initialization different VMs may have different capabilities.
252It is thus encouraged to use the vm ioctl to query for capabilities (available
253with KVM_CAP_CHECK_EXTENSION_VM on the vm fd)
254
2554.5 KVM_GET_VCPU_MMAP_SIZE
256--------------------------
257
258:Capability: basic
259:Architectures: all
260:Type: system ioctl
261:Parameters: none
262:Returns: size of vcpu mmap area, in bytes
263
264The KVM_RUN ioctl (cf.) communicates with userspace via a shared
265memory region.  This ioctl returns the size of that region.  See the
266KVM_RUN documentation for details.
267
268
2694.6 KVM_SET_MEMORY_REGION
270-------------------------
271
272:Capability: basic
273:Architectures: all
274:Type: vm ioctl
275:Parameters: struct kvm_memory_region (in)
276:Returns: 0 on success, -1 on error
277
278This ioctl is obsolete and has been removed.
279
280
2814.7 KVM_CREATE_VCPU
282-------------------
283
284:Capability: basic
285:Architectures: all
286:Type: vm ioctl
287:Parameters: vcpu id (apic id on x86)
288:Returns: vcpu fd on success, -1 on error
289
290This API adds a vcpu to a virtual machine. No more than max_vcpus may be added.
291The vcpu id is an integer in the range [0, max_vcpu_id).
292
293The recommended max_vcpus value can be retrieved using the KVM_CAP_NR_VCPUS of
294the KVM_CHECK_EXTENSION ioctl() at run-time.
295The maximum possible value for max_vcpus can be retrieved using the
296KVM_CAP_MAX_VCPUS of the KVM_CHECK_EXTENSION ioctl() at run-time.
297
298If the KVM_CAP_NR_VCPUS does not exist, you should assume that max_vcpus is 4
299cpus max.
300If the KVM_CAP_MAX_VCPUS does not exist, you should assume that max_vcpus is
301same as the value returned from KVM_CAP_NR_VCPUS.
302
303The maximum possible value for max_vcpu_id can be retrieved using the
304KVM_CAP_MAX_VCPU_ID of the KVM_CHECK_EXTENSION ioctl() at run-time.
305
306If the KVM_CAP_MAX_VCPU_ID does not exist, you should assume that max_vcpu_id
307is the same as the value returned from KVM_CAP_MAX_VCPUS.
308
309On powerpc using book3s_hv mode, the vcpus are mapped onto virtual
310threads in one or more virtual CPU cores.  (This is because the
311hardware requires all the hardware threads in a CPU core to be in the
312same partition.)  The KVM_CAP_PPC_SMT capability indicates the number
313of vcpus per virtual core (vcore).  The vcore id is obtained by
314dividing the vcpu id by the number of vcpus per vcore.  The vcpus in a
315given vcore will always be in the same physical core as each other
316(though that might be a different physical core from time to time).
317Userspace can control the threading (SMT) mode of the guest by its
318allocation of vcpu ids.  For example, if userspace wants
319single-threaded guest vcpus, it should make all vcpu ids be a multiple
320of the number of vcpus per vcore.
321
322For virtual cpus that have been created with S390 user controlled virtual
323machines, the resulting vcpu fd can be memory mapped at page offset
324KVM_S390_SIE_PAGE_OFFSET in order to obtain a memory map of the virtual
325cpu's hardware control block.
326
327
3284.8 KVM_GET_DIRTY_LOG (vm ioctl)
329--------------------------------
330
331:Capability: basic
332:Architectures: all
333:Type: vm ioctl
334:Parameters: struct kvm_dirty_log (in/out)
335:Returns: 0 on success, -1 on error
336
337::
338
339  /* for KVM_GET_DIRTY_LOG */
340  struct kvm_dirty_log {
341	__u32 slot;
342	__u32 padding;
343	union {
344		void __user *dirty_bitmap; /* one bit per page */
345		__u64 padding;
346	};
347  };
348
349Given a memory slot, return a bitmap containing any pages dirtied
350since the last call to this ioctl.  Bit 0 is the first page in the
351memory slot.  Ensure the entire structure is cleared to avoid padding
352issues.
353
354If KVM_CAP_MULTI_ADDRESS_SPACE is available, bits 16-31 specifies
355the address space for which you want to return the dirty bitmap.
356They must be less than the value that KVM_CHECK_EXTENSION returns for
357the KVM_CAP_MULTI_ADDRESS_SPACE capability.
358
359The bits in the dirty bitmap are cleared before the ioctl returns, unless
360KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 is enabled.  For more information,
361see the description of the capability.
362
3634.9 KVM_SET_MEMORY_ALIAS
364------------------------
365
366:Capability: basic
367:Architectures: x86
368:Type: vm ioctl
369:Parameters: struct kvm_memory_alias (in)
370:Returns: 0 (success), -1 (error)
371
372This ioctl is obsolete and has been removed.
373
374
3754.10 KVM_RUN
376------------
377
378:Capability: basic
379:Architectures: all
380:Type: vcpu ioctl
381:Parameters: none
382:Returns: 0 on success, -1 on error
383
384Errors:
385
386  =======    ==============================================================
387  EINTR      an unmasked signal is pending
388  ENOEXEC    the vcpu hasn't been initialized or the guest tried to execute
389             instructions from device memory (arm64)
390  ENOSYS     data abort outside memslots with no syndrome info and
391             KVM_CAP_ARM_NISV_TO_USER not enabled (arm64)
392  EPERM      SVE feature set but not finalized (arm64)
393  =======    ==============================================================
394
395This ioctl is used to run a guest virtual cpu.  While there are no
396explicit parameters, there is an implicit parameter block that can be
397obtained by mmap()ing the vcpu fd at offset 0, with the size given by
398KVM_GET_VCPU_MMAP_SIZE.  The parameter block is formatted as a 'struct
399kvm_run' (see below).
400
401
4024.11 KVM_GET_REGS
403-----------------
404
405:Capability: basic
406:Architectures: all except ARM, arm64
407:Type: vcpu ioctl
408:Parameters: struct kvm_regs (out)
409:Returns: 0 on success, -1 on error
410
411Reads the general purpose registers from the vcpu.
412
413::
414
415  /* x86 */
416  struct kvm_regs {
417	/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
418	__u64 rax, rbx, rcx, rdx;
419	__u64 rsi, rdi, rsp, rbp;
420	__u64 r8,  r9,  r10, r11;
421	__u64 r12, r13, r14, r15;
422	__u64 rip, rflags;
423  };
424
425  /* mips */
426  struct kvm_regs {
427	/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
428	__u64 gpr[32];
429	__u64 hi;
430	__u64 lo;
431	__u64 pc;
432  };
433
434
4354.12 KVM_SET_REGS
436-----------------
437
438:Capability: basic
439:Architectures: all except ARM, arm64
440:Type: vcpu ioctl
441:Parameters: struct kvm_regs (in)
442:Returns: 0 on success, -1 on error
443
444Writes the general purpose registers into the vcpu.
445
446See KVM_GET_REGS for the data structure.
447
448
4494.13 KVM_GET_SREGS
450------------------
451
452:Capability: basic
453:Architectures: x86, ppc
454:Type: vcpu ioctl
455:Parameters: struct kvm_sregs (out)
456:Returns: 0 on success, -1 on error
457
458Reads special registers from the vcpu.
459
460::
461
462  /* x86 */
463  struct kvm_sregs {
464	struct kvm_segment cs, ds, es, fs, gs, ss;
465	struct kvm_segment tr, ldt;
466	struct kvm_dtable gdt, idt;
467	__u64 cr0, cr2, cr3, cr4, cr8;
468	__u64 efer;
469	__u64 apic_base;
470	__u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
471  };
472
473  /* ppc -- see arch/powerpc/include/uapi/asm/kvm.h */
474
475interrupt_bitmap is a bitmap of pending external interrupts.  At most
476one bit may be set.  This interrupt has been acknowledged by the APIC
477but not yet injected into the cpu core.
478
479
4804.14 KVM_SET_SREGS
481------------------
482
483:Capability: basic
484:Architectures: x86, ppc
485:Type: vcpu ioctl
486:Parameters: struct kvm_sregs (in)
487:Returns: 0 on success, -1 on error
488
489Writes special registers into the vcpu.  See KVM_GET_SREGS for the
490data structures.
491
492
4934.15 KVM_TRANSLATE
494------------------
495
496:Capability: basic
497:Architectures: x86
498:Type: vcpu ioctl
499:Parameters: struct kvm_translation (in/out)
500:Returns: 0 on success, -1 on error
501
502Translates a virtual address according to the vcpu's current address
503translation mode.
504
505::
506
507  struct kvm_translation {
508	/* in */
509	__u64 linear_address;
510
511	/* out */
512	__u64 physical_address;
513	__u8  valid;
514	__u8  writeable;
515	__u8  usermode;
516	__u8  pad[5];
517  };
518
519
5204.16 KVM_INTERRUPT
521------------------
522
523:Capability: basic
524:Architectures: x86, ppc, mips
525:Type: vcpu ioctl
526:Parameters: struct kvm_interrupt (in)
527:Returns: 0 on success, negative on failure.
528
529Queues a hardware interrupt vector to be injected.
530
531::
532
533  /* for KVM_INTERRUPT */
534  struct kvm_interrupt {
535	/* in */
536	__u32 irq;
537  };
538
539X86:
540^^^^
541
542:Returns:
543
544	========= ===================================
545	  0       on success,
546	 -EEXIST  if an interrupt is already enqueued
547	 -EINVAL  the irq number is invalid
548	 -ENXIO   if the PIC is in the kernel
549	 -EFAULT  if the pointer is invalid
550	========= ===================================
551
552Note 'irq' is an interrupt vector, not an interrupt pin or line. This
553ioctl is useful if the in-kernel PIC is not used.
554
555PPC:
556^^^^
557
558Queues an external interrupt to be injected. This ioctl is overleaded
559with 3 different irq values:
560
561a) KVM_INTERRUPT_SET
562
563   This injects an edge type external interrupt into the guest once it's ready
564   to receive interrupts. When injected, the interrupt is done.
565
566b) KVM_INTERRUPT_UNSET
567
568   This unsets any pending interrupt.
569
570   Only available with KVM_CAP_PPC_UNSET_IRQ.
571
572c) KVM_INTERRUPT_SET_LEVEL
573
574   This injects a level type external interrupt into the guest context. The
575   interrupt stays pending until a specific ioctl with KVM_INTERRUPT_UNSET
576   is triggered.
577
578   Only available with KVM_CAP_PPC_IRQ_LEVEL.
579
580Note that any value for 'irq' other than the ones stated above is invalid
581and incurs unexpected behavior.
582
583This is an asynchronous vcpu ioctl and can be invoked from any thread.
584
585MIPS:
586^^^^^
587
588Queues an external interrupt to be injected into the virtual CPU. A negative
589interrupt number dequeues the interrupt.
590
591This is an asynchronous vcpu ioctl and can be invoked from any thread.
592
593
5944.17 KVM_DEBUG_GUEST
595--------------------
596
597:Capability: basic
598:Architectures: none
599:Type: vcpu ioctl
600:Parameters: none)
601:Returns: -1 on error
602
603Support for this has been removed.  Use KVM_SET_GUEST_DEBUG instead.
604
605
6064.18 KVM_GET_MSRS
607-----------------
608
609:Capability: basic (vcpu), KVM_CAP_GET_MSR_FEATURES (system)
610:Architectures: x86
611:Type: system ioctl, vcpu ioctl
612:Parameters: struct kvm_msrs (in/out)
613:Returns: number of msrs successfully returned;
614          -1 on error
615
616When used as a system ioctl:
617Reads the values of MSR-based features that are available for the VM.  This
618is similar to KVM_GET_SUPPORTED_CPUID, but it returns MSR indices and values.
619The list of msr-based features can be obtained using KVM_GET_MSR_FEATURE_INDEX_LIST
620in a system ioctl.
621
622When used as a vcpu ioctl:
623Reads model-specific registers from the vcpu.  Supported msr indices can
624be obtained using KVM_GET_MSR_INDEX_LIST in a system ioctl.
625
626::
627
628  struct kvm_msrs {
629	__u32 nmsrs; /* number of msrs in entries */
630	__u32 pad;
631
632	struct kvm_msr_entry entries[0];
633  };
634
635  struct kvm_msr_entry {
636	__u32 index;
637	__u32 reserved;
638	__u64 data;
639  };
640
641Application code should set the 'nmsrs' member (which indicates the
642size of the entries array) and the 'index' member of each array entry.
643kvm will fill in the 'data' member.
644
645
6464.19 KVM_SET_MSRS
647-----------------
648
649:Capability: basic
650:Architectures: x86
651:Type: vcpu ioctl
652:Parameters: struct kvm_msrs (in)
653:Returns: number of msrs successfully set (see below), -1 on error
654
655Writes model-specific registers to the vcpu.  See KVM_GET_MSRS for the
656data structures.
657
658Application code should set the 'nmsrs' member (which indicates the
659size of the entries array), and the 'index' and 'data' members of each
660array entry.
661
662It tries to set the MSRs in array entries[] one by one. If setting an MSR
663fails, e.g., due to setting reserved bits, the MSR isn't supported/emulated
664by KVM, etc..., it stops processing the MSR list and returns the number of
665MSRs that have been set successfully.
666
667
6684.20 KVM_SET_CPUID
669------------------
670
671:Capability: basic
672:Architectures: x86
673:Type: vcpu ioctl
674:Parameters: struct kvm_cpuid (in)
675:Returns: 0 on success, -1 on error
676
677Defines the vcpu responses to the cpuid instruction.  Applications
678should use the KVM_SET_CPUID2 ioctl if available.
679
680Note, when this IOCTL fails, KVM gives no guarantees that previous valid CPUID
681configuration (if there is) is not corrupted. Userspace can get a copy of the
682resulting CPUID configuration through KVM_GET_CPUID2 in case.
683
684::
685
686  struct kvm_cpuid_entry {
687	__u32 function;
688	__u32 eax;
689	__u32 ebx;
690	__u32 ecx;
691	__u32 edx;
692	__u32 padding;
693  };
694
695  /* for KVM_SET_CPUID */
696  struct kvm_cpuid {
697	__u32 nent;
698	__u32 padding;
699	struct kvm_cpuid_entry entries[0];
700  };
701
702
7034.21 KVM_SET_SIGNAL_MASK
704------------------------
705
706:Capability: basic
707:Architectures: all
708:Type: vcpu ioctl
709:Parameters: struct kvm_signal_mask (in)
710:Returns: 0 on success, -1 on error
711
712Defines which signals are blocked during execution of KVM_RUN.  This
713signal mask temporarily overrides the threads signal mask.  Any
714unblocked signal received (except SIGKILL and SIGSTOP, which retain
715their traditional behaviour) will cause KVM_RUN to return with -EINTR.
716
717Note the signal will only be delivered if not blocked by the original
718signal mask.
719
720::
721
722  /* for KVM_SET_SIGNAL_MASK */
723  struct kvm_signal_mask {
724	__u32 len;
725	__u8  sigset[0];
726  };
727
728
7294.22 KVM_GET_FPU
730----------------
731
732:Capability: basic
733:Architectures: x86
734:Type: vcpu ioctl
735:Parameters: struct kvm_fpu (out)
736:Returns: 0 on success, -1 on error
737
738Reads the floating point state from the vcpu.
739
740::
741
742  /* for KVM_GET_FPU and KVM_SET_FPU */
743  struct kvm_fpu {
744	__u8  fpr[8][16];
745	__u16 fcw;
746	__u16 fsw;
747	__u8  ftwx;  /* in fxsave format */
748	__u8  pad1;
749	__u16 last_opcode;
750	__u64 last_ip;
751	__u64 last_dp;
752	__u8  xmm[16][16];
753	__u32 mxcsr;
754	__u32 pad2;
755  };
756
757
7584.23 KVM_SET_FPU
759----------------
760
761:Capability: basic
762:Architectures: x86
763:Type: vcpu ioctl
764:Parameters: struct kvm_fpu (in)
765:Returns: 0 on success, -1 on error
766
767Writes the floating point state to the vcpu.
768
769::
770
771  /* for KVM_GET_FPU and KVM_SET_FPU */
772  struct kvm_fpu {
773	__u8  fpr[8][16];
774	__u16 fcw;
775	__u16 fsw;
776	__u8  ftwx;  /* in fxsave format */
777	__u8  pad1;
778	__u16 last_opcode;
779	__u64 last_ip;
780	__u64 last_dp;
781	__u8  xmm[16][16];
782	__u32 mxcsr;
783	__u32 pad2;
784  };
785
786
7874.24 KVM_CREATE_IRQCHIP
788-----------------------
789
790:Capability: KVM_CAP_IRQCHIP, KVM_CAP_S390_IRQCHIP (s390)
791:Architectures: x86, ARM, arm64, s390
792:Type: vm ioctl
793:Parameters: none
794:Returns: 0 on success, -1 on error
795
796Creates an interrupt controller model in the kernel.
797On x86, creates a virtual ioapic, a virtual PIC (two PICs, nested), and sets up
798future vcpus to have a local APIC.  IRQ routing for GSIs 0-15 is set to both
799PIC and IOAPIC; GSI 16-23 only go to the IOAPIC.
800On ARM/arm64, a GICv2 is created. Any other GIC versions require the usage of
801KVM_CREATE_DEVICE, which also supports creating a GICv2.  Using
802KVM_CREATE_DEVICE is preferred over KVM_CREATE_IRQCHIP for GICv2.
803On s390, a dummy irq routing table is created.
804
805Note that on s390 the KVM_CAP_S390_IRQCHIP vm capability needs to be enabled
806before KVM_CREATE_IRQCHIP can be used.
807
808
8094.25 KVM_IRQ_LINE
810-----------------
811
812:Capability: KVM_CAP_IRQCHIP
813:Architectures: x86, arm, arm64
814:Type: vm ioctl
815:Parameters: struct kvm_irq_level
816:Returns: 0 on success, -1 on error
817
818Sets the level of a GSI input to the interrupt controller model in the kernel.
819On some architectures it is required that an interrupt controller model has
820been previously created with KVM_CREATE_IRQCHIP.  Note that edge-triggered
821interrupts require the level to be set to 1 and then back to 0.
822
823On real hardware, interrupt pins can be active-low or active-high.  This
824does not matter for the level field of struct kvm_irq_level: 1 always
825means active (asserted), 0 means inactive (deasserted).
826
827x86 allows the operating system to program the interrupt polarity
828(active-low/active-high) for level-triggered interrupts, and KVM used
829to consider the polarity.  However, due to bitrot in the handling of
830active-low interrupts, the above convention is now valid on x86 too.
831This is signaled by KVM_CAP_X86_IOAPIC_POLARITY_IGNORED.  Userspace
832should not present interrupts to the guest as active-low unless this
833capability is present (or unless it is not using the in-kernel irqchip,
834of course).
835
836
837ARM/arm64 can signal an interrupt either at the CPU level, or at the
838in-kernel irqchip (GIC), and for in-kernel irqchip can tell the GIC to
839use PPIs designated for specific cpus.  The irq field is interpreted
840like this::
841
842  bits:  |  31 ... 28  | 27 ... 24 | 23  ... 16 | 15 ... 0 |
843  field: | vcpu2_index | irq_type  | vcpu_index |  irq_id  |
844
845The irq_type field has the following values:
846
847- irq_type[0]:
848	       out-of-kernel GIC: irq_id 0 is IRQ, irq_id 1 is FIQ
849- irq_type[1]:
850	       in-kernel GIC: SPI, irq_id between 32 and 1019 (incl.)
851               (the vcpu_index field is ignored)
852- irq_type[2]:
853	       in-kernel GIC: PPI, irq_id between 16 and 31 (incl.)
854
855(The irq_id field thus corresponds nicely to the IRQ ID in the ARM GIC specs)
856
857In both cases, level is used to assert/deassert the line.
858
859When KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 is supported, the target vcpu is
860identified as (256 * vcpu2_index + vcpu_index). Otherwise, vcpu2_index
861must be zero.
862
863Note that on arm/arm64, the KVM_CAP_IRQCHIP capability only conditions
864injection of interrupts for the in-kernel irqchip. KVM_IRQ_LINE can always
865be used for a userspace interrupt controller.
866
867::
868
869  struct kvm_irq_level {
870	union {
871		__u32 irq;     /* GSI */
872		__s32 status;  /* not used for KVM_IRQ_LEVEL */
873	};
874	__u32 level;           /* 0 or 1 */
875  };
876
877
8784.26 KVM_GET_IRQCHIP
879--------------------
880
881:Capability: KVM_CAP_IRQCHIP
882:Architectures: x86
883:Type: vm ioctl
884:Parameters: struct kvm_irqchip (in/out)
885:Returns: 0 on success, -1 on error
886
887Reads the state of a kernel interrupt controller created with
888KVM_CREATE_IRQCHIP into a buffer provided by the caller.
889
890::
891
892  struct kvm_irqchip {
893	__u32 chip_id;  /* 0 = PIC1, 1 = PIC2, 2 = IOAPIC */
894	__u32 pad;
895        union {
896		char dummy[512];  /* reserving space */
897		struct kvm_pic_state pic;
898		struct kvm_ioapic_state ioapic;
899	} chip;
900  };
901
902
9034.27 KVM_SET_IRQCHIP
904--------------------
905
906:Capability: KVM_CAP_IRQCHIP
907:Architectures: x86
908:Type: vm ioctl
909:Parameters: struct kvm_irqchip (in)
910:Returns: 0 on success, -1 on error
911
912Sets the state of a kernel interrupt controller created with
913KVM_CREATE_IRQCHIP from a buffer provided by the caller.
914
915::
916
917  struct kvm_irqchip {
918	__u32 chip_id;  /* 0 = PIC1, 1 = PIC2, 2 = IOAPIC */
919	__u32 pad;
920        union {
921		char dummy[512];  /* reserving space */
922		struct kvm_pic_state pic;
923		struct kvm_ioapic_state ioapic;
924	} chip;
925  };
926
927
9284.28 KVM_XEN_HVM_CONFIG
929-----------------------
930
931:Capability: KVM_CAP_XEN_HVM
932:Architectures: x86
933:Type: vm ioctl
934:Parameters: struct kvm_xen_hvm_config (in)
935:Returns: 0 on success, -1 on error
936
937Sets the MSR that the Xen HVM guest uses to initialize its hypercall
938page, and provides the starting address and size of the hypercall
939blobs in userspace.  When the guest writes the MSR, kvm copies one
940page of a blob (32- or 64-bit, depending on the vcpu mode) to guest
941memory.
942
943::
944
945  struct kvm_xen_hvm_config {
946	__u32 flags;
947	__u32 msr;
948	__u64 blob_addr_32;
949	__u64 blob_addr_64;
950	__u8 blob_size_32;
951	__u8 blob_size_64;
952	__u8 pad2[30];
953  };
954
955
9564.29 KVM_GET_CLOCK
957------------------
958
959:Capability: KVM_CAP_ADJUST_CLOCK
960:Architectures: x86
961:Type: vm ioctl
962:Parameters: struct kvm_clock_data (out)
963:Returns: 0 on success, -1 on error
964
965Gets the current timestamp of kvmclock as seen by the current guest. In
966conjunction with KVM_SET_CLOCK, it is used to ensure monotonicity on scenarios
967such as migration.
968
969When KVM_CAP_ADJUST_CLOCK is passed to KVM_CHECK_EXTENSION, it returns the
970set of bits that KVM can return in struct kvm_clock_data's flag member.
971
972The only flag defined now is KVM_CLOCK_TSC_STABLE.  If set, the returned
973value is the exact kvmclock value seen by all VCPUs at the instant
974when KVM_GET_CLOCK was called.  If clear, the returned value is simply
975CLOCK_MONOTONIC plus a constant offset; the offset can be modified
976with KVM_SET_CLOCK.  KVM will try to make all VCPUs follow this clock,
977but the exact value read by each VCPU could differ, because the host
978TSC is not stable.
979
980::
981
982  struct kvm_clock_data {
983	__u64 clock;  /* kvmclock current value */
984	__u32 flags;
985	__u32 pad[9];
986  };
987
988
9894.30 KVM_SET_CLOCK
990------------------
991
992:Capability: KVM_CAP_ADJUST_CLOCK
993:Architectures: x86
994:Type: vm ioctl
995:Parameters: struct kvm_clock_data (in)
996:Returns: 0 on success, -1 on error
997
998Sets the current timestamp of kvmclock to the value specified in its parameter.
999In conjunction with KVM_GET_CLOCK, it is used to ensure monotonicity on scenarios
1000such as migration.
1001
1002::
1003
1004  struct kvm_clock_data {
1005	__u64 clock;  /* kvmclock current value */
1006	__u32 flags;
1007	__u32 pad[9];
1008  };
1009
1010
10114.31 KVM_GET_VCPU_EVENTS
1012------------------------
1013
1014:Capability: KVM_CAP_VCPU_EVENTS
1015:Extended by: KVM_CAP_INTR_SHADOW
1016:Architectures: x86, arm, arm64
1017:Type: vcpu ioctl
1018:Parameters: struct kvm_vcpu_event (out)
1019:Returns: 0 on success, -1 on error
1020
1021X86:
1022^^^^
1023
1024Gets currently pending exceptions, interrupts, and NMIs as well as related
1025states of the vcpu.
1026
1027::
1028
1029  struct kvm_vcpu_events {
1030	struct {
1031		__u8 injected;
1032		__u8 nr;
1033		__u8 has_error_code;
1034		__u8 pending;
1035		__u32 error_code;
1036	} exception;
1037	struct {
1038		__u8 injected;
1039		__u8 nr;
1040		__u8 soft;
1041		__u8 shadow;
1042	} interrupt;
1043	struct {
1044		__u8 injected;
1045		__u8 pending;
1046		__u8 masked;
1047		__u8 pad;
1048	} nmi;
1049	__u32 sipi_vector;
1050	__u32 flags;
1051	struct {
1052		__u8 smm;
1053		__u8 pending;
1054		__u8 smm_inside_nmi;
1055		__u8 latched_init;
1056	} smi;
1057	__u8 reserved[27];
1058	__u8 exception_has_payload;
1059	__u64 exception_payload;
1060  };
1061
1062The following bits are defined in the flags field:
1063
1064- KVM_VCPUEVENT_VALID_SHADOW may be set to signal that
1065  interrupt.shadow contains a valid state.
1066
1067- KVM_VCPUEVENT_VALID_SMM may be set to signal that smi contains a
1068  valid state.
1069
1070- KVM_VCPUEVENT_VALID_PAYLOAD may be set to signal that the
1071  exception_has_payload, exception_payload, and exception.pending
1072  fields contain a valid state. This bit will be set whenever
1073  KVM_CAP_EXCEPTION_PAYLOAD is enabled.
1074
1075ARM/ARM64:
1076^^^^^^^^^^
1077
1078If the guest accesses a device that is being emulated by the host kernel in
1079such a way that a real device would generate a physical SError, KVM may make
1080a virtual SError pending for that VCPU. This system error interrupt remains
1081pending until the guest takes the exception by unmasking PSTATE.A.
1082
1083Running the VCPU may cause it to take a pending SError, or make an access that
1084causes an SError to become pending. The event's description is only valid while
1085the VPCU is not running.
1086
1087This API provides a way to read and write the pending 'event' state that is not
1088visible to the guest. To save, restore or migrate a VCPU the struct representing
1089the state can be read then written using this GET/SET API, along with the other
1090guest-visible registers. It is not possible to 'cancel' an SError that has been
1091made pending.
1092
1093A device being emulated in user-space may also wish to generate an SError. To do
1094this the events structure can be populated by user-space. The current state
1095should be read first, to ensure no existing SError is pending. If an existing
1096SError is pending, the architecture's 'Multiple SError interrupts' rules should
1097be followed. (2.5.3 of DDI0587.a "ARM Reliability, Availability, and
1098Serviceability (RAS) Specification").
1099
1100SError exceptions always have an ESR value. Some CPUs have the ability to
1101specify what the virtual SError's ESR value should be. These systems will
1102advertise KVM_CAP_ARM_INJECT_SERROR_ESR. In this case exception.has_esr will
1103always have a non-zero value when read, and the agent making an SError pending
1104should specify the ISS field in the lower 24 bits of exception.serror_esr. If
1105the system supports KVM_CAP_ARM_INJECT_SERROR_ESR, but user-space sets the events
1106with exception.has_esr as zero, KVM will choose an ESR.
1107
1108Specifying exception.has_esr on a system that does not support it will return
1109-EINVAL. Setting anything other than the lower 24bits of exception.serror_esr
1110will return -EINVAL.
1111
1112It is not possible to read back a pending external abort (injected via
1113KVM_SET_VCPU_EVENTS or otherwise) because such an exception is always delivered
1114directly to the virtual CPU).
1115
1116::
1117
1118  struct kvm_vcpu_events {
1119	struct {
1120		__u8 serror_pending;
1121		__u8 serror_has_esr;
1122		__u8 ext_dabt_pending;
1123		/* Align it to 8 bytes */
1124		__u8 pad[5];
1125		__u64 serror_esr;
1126	} exception;
1127	__u32 reserved[12];
1128  };
1129
11304.32 KVM_SET_VCPU_EVENTS
1131------------------------
1132
1133:Capability: KVM_CAP_VCPU_EVENTS
1134:Extended by: KVM_CAP_INTR_SHADOW
1135:Architectures: x86, arm, arm64
1136:Type: vcpu ioctl
1137:Parameters: struct kvm_vcpu_event (in)
1138:Returns: 0 on success, -1 on error
1139
1140X86:
1141^^^^
1142
1143Set pending exceptions, interrupts, and NMIs as well as related states of the
1144vcpu.
1145
1146See KVM_GET_VCPU_EVENTS for the data structure.
1147
1148Fields that may be modified asynchronously by running VCPUs can be excluded
1149from the update. These fields are nmi.pending, sipi_vector, smi.smm,
1150smi.pending. Keep the corresponding bits in the flags field cleared to
1151suppress overwriting the current in-kernel state. The bits are:
1152
1153===============================  ==================================
1154KVM_VCPUEVENT_VALID_NMI_PENDING  transfer nmi.pending to the kernel
1155KVM_VCPUEVENT_VALID_SIPI_VECTOR  transfer sipi_vector
1156KVM_VCPUEVENT_VALID_SMM          transfer the smi sub-struct.
1157===============================  ==================================
1158
1159If KVM_CAP_INTR_SHADOW is available, KVM_VCPUEVENT_VALID_SHADOW can be set in
1160the flags field to signal that interrupt.shadow contains a valid state and
1161shall be written into the VCPU.
1162
1163KVM_VCPUEVENT_VALID_SMM can only be set if KVM_CAP_X86_SMM is available.
1164
1165If KVM_CAP_EXCEPTION_PAYLOAD is enabled, KVM_VCPUEVENT_VALID_PAYLOAD
1166can be set in the flags field to signal that the
1167exception_has_payload, exception_payload, and exception.pending fields
1168contain a valid state and shall be written into the VCPU.
1169
1170ARM/ARM64:
1171^^^^^^^^^^
1172
1173User space may need to inject several types of events to the guest.
1174
1175Set the pending SError exception state for this VCPU. It is not possible to
1176'cancel' an Serror that has been made pending.
1177
1178If the guest performed an access to I/O memory which could not be handled by
1179userspace, for example because of missing instruction syndrome decode
1180information or because there is no device mapped at the accessed IPA, then
1181userspace can ask the kernel to inject an external abort using the address
1182from the exiting fault on the VCPU. It is a programming error to set
1183ext_dabt_pending after an exit which was not either KVM_EXIT_MMIO or
1184KVM_EXIT_ARM_NISV. This feature is only available if the system supports
1185KVM_CAP_ARM_INJECT_EXT_DABT. This is a helper which provides commonality in
1186how userspace reports accesses for the above cases to guests, across different
1187userspace implementations. Nevertheless, userspace can still emulate all Arm
1188exceptions by manipulating individual registers using the KVM_SET_ONE_REG API.
1189
1190See KVM_GET_VCPU_EVENTS for the data structure.
1191
1192
11934.33 KVM_GET_DEBUGREGS
1194----------------------
1195
1196:Capability: KVM_CAP_DEBUGREGS
1197:Architectures: x86
1198:Type: vm ioctl
1199:Parameters: struct kvm_debugregs (out)
1200:Returns: 0 on success, -1 on error
1201
1202Reads debug registers from the vcpu.
1203
1204::
1205
1206  struct kvm_debugregs {
1207	__u64 db[4];
1208	__u64 dr6;
1209	__u64 dr7;
1210	__u64 flags;
1211	__u64 reserved[9];
1212  };
1213
1214
12154.34 KVM_SET_DEBUGREGS
1216----------------------
1217
1218:Capability: KVM_CAP_DEBUGREGS
1219:Architectures: x86
1220:Type: vm ioctl
1221:Parameters: struct kvm_debugregs (in)
1222:Returns: 0 on success, -1 on error
1223
1224Writes debug registers into the vcpu.
1225
1226See KVM_GET_DEBUGREGS for the data structure. The flags field is unused
1227yet and must be cleared on entry.
1228
1229
12304.35 KVM_SET_USER_MEMORY_REGION
1231-------------------------------
1232
1233:Capability: KVM_CAP_USER_MEMORY
1234:Architectures: all
1235:Type: vm ioctl
1236:Parameters: struct kvm_userspace_memory_region (in)
1237:Returns: 0 on success, -1 on error
1238
1239::
1240
1241  struct kvm_userspace_memory_region {
1242	__u32 slot;
1243	__u32 flags;
1244	__u64 guest_phys_addr;
1245	__u64 memory_size; /* bytes */
1246	__u64 userspace_addr; /* start of the userspace allocated memory */
1247  };
1248
1249  /* for kvm_memory_region::flags */
1250  #define KVM_MEM_LOG_DIRTY_PAGES	(1UL << 0)
1251  #define KVM_MEM_READONLY	(1UL << 1)
1252
1253This ioctl allows the user to create, modify or delete a guest physical
1254memory slot.  Bits 0-15 of "slot" specify the slot id and this value
1255should be less than the maximum number of user memory slots supported per
1256VM.  The maximum allowed slots can be queried using KVM_CAP_NR_MEMSLOTS.
1257Slots may not overlap in guest physical address space.
1258
1259If KVM_CAP_MULTI_ADDRESS_SPACE is available, bits 16-31 of "slot"
1260specifies the address space which is being modified.  They must be
1261less than the value that KVM_CHECK_EXTENSION returns for the
1262KVM_CAP_MULTI_ADDRESS_SPACE capability.  Slots in separate address spaces
1263are unrelated; the restriction on overlapping slots only applies within
1264each address space.
1265
1266Deleting a slot is done by passing zero for memory_size.  When changing
1267an existing slot, it may be moved in the guest physical memory space,
1268or its flags may be modified, but it may not be resized.
1269
1270Memory for the region is taken starting at the address denoted by the
1271field userspace_addr, which must point at user addressable memory for
1272the entire memory slot size.  Any object may back this memory, including
1273anonymous memory, ordinary files, and hugetlbfs.
1274
1275On architectures that support a form of address tagging, userspace_addr must
1276be an untagged address.
1277
1278It is recommended that the lower 21 bits of guest_phys_addr and userspace_addr
1279be identical.  This allows large pages in the guest to be backed by large
1280pages in the host.
1281
1282The flags field supports two flags: KVM_MEM_LOG_DIRTY_PAGES and
1283KVM_MEM_READONLY.  The former can be set to instruct KVM to keep track of
1284writes to memory within the slot.  See KVM_GET_DIRTY_LOG ioctl to know how to
1285use it.  The latter can be set, if KVM_CAP_READONLY_MEM capability allows it,
1286to make a new slot read-only.  In this case, writes to this memory will be
1287posted to userspace as KVM_EXIT_MMIO exits.
1288
1289When the KVM_CAP_SYNC_MMU capability is available, changes in the backing of
1290the memory region are automatically reflected into the guest.  For example, an
1291mmap() that affects the region will be made visible immediately.  Another
1292example is madvise(MADV_DROP).
1293
1294It is recommended to use this API instead of the KVM_SET_MEMORY_REGION ioctl.
1295The KVM_SET_MEMORY_REGION does not allow fine grained control over memory
1296allocation and is deprecated.
1297
1298
12994.36 KVM_SET_TSS_ADDR
1300---------------------
1301
1302:Capability: KVM_CAP_SET_TSS_ADDR
1303:Architectures: x86
1304:Type: vm ioctl
1305:Parameters: unsigned long tss_address (in)
1306:Returns: 0 on success, -1 on error
1307
1308This ioctl defines the physical address of a three-page region in the guest
1309physical address space.  The region must be within the first 4GB of the
1310guest physical address space and must not conflict with any memory slot
1311or any mmio address.  The guest may malfunction if it accesses this memory
1312region.
1313
1314This ioctl is required on Intel-based hosts.  This is needed on Intel hardware
1315because of a quirk in the virtualization implementation (see the internals
1316documentation when it pops into existence).
1317
1318
13194.37 KVM_ENABLE_CAP
1320-------------------
1321
1322:Capability: KVM_CAP_ENABLE_CAP
1323:Architectures: mips, ppc, s390
1324:Type: vcpu ioctl
1325:Parameters: struct kvm_enable_cap (in)
1326:Returns: 0 on success; -1 on error
1327
1328:Capability: KVM_CAP_ENABLE_CAP_VM
1329:Architectures: all
1330:Type: vm ioctl
1331:Parameters: struct kvm_enable_cap (in)
1332:Returns: 0 on success; -1 on error
1333
1334.. note::
1335
1336   Not all extensions are enabled by default. Using this ioctl the application
1337   can enable an extension, making it available to the guest.
1338
1339On systems that do not support this ioctl, it always fails. On systems that
1340do support it, it only works for extensions that are supported for enablement.
1341
1342To check if a capability can be enabled, the KVM_CHECK_EXTENSION ioctl should
1343be used.
1344
1345::
1346
1347  struct kvm_enable_cap {
1348       /* in */
1349       __u32 cap;
1350
1351The capability that is supposed to get enabled.
1352
1353::
1354
1355       __u32 flags;
1356
1357A bitfield indicating future enhancements. Has to be 0 for now.
1358
1359::
1360
1361       __u64 args[4];
1362
1363Arguments for enabling a feature. If a feature needs initial values to
1364function properly, this is the place to put them.
1365
1366::
1367
1368       __u8  pad[64];
1369  };
1370
1371The vcpu ioctl should be used for vcpu-specific capabilities, the vm ioctl
1372for vm-wide capabilities.
1373
13744.38 KVM_GET_MP_STATE
1375---------------------
1376
1377:Capability: KVM_CAP_MP_STATE
1378:Architectures: x86, s390, arm, arm64
1379:Type: vcpu ioctl
1380:Parameters: struct kvm_mp_state (out)
1381:Returns: 0 on success; -1 on error
1382
1383::
1384
1385  struct kvm_mp_state {
1386	__u32 mp_state;
1387  };
1388
1389Returns the vcpu's current "multiprocessing state" (though also valid on
1390uniprocessor guests).
1391
1392Possible values are:
1393
1394   ==========================    ===============================================
1395   KVM_MP_STATE_RUNNABLE         the vcpu is currently running [x86,arm/arm64]
1396   KVM_MP_STATE_UNINITIALIZED    the vcpu is an application processor (AP)
1397                                 which has not yet received an INIT signal [x86]
1398   KVM_MP_STATE_INIT_RECEIVED    the vcpu has received an INIT signal, and is
1399                                 now ready for a SIPI [x86]
1400   KVM_MP_STATE_HALTED           the vcpu has executed a HLT instruction and
1401                                 is waiting for an interrupt [x86]
1402   KVM_MP_STATE_SIPI_RECEIVED    the vcpu has just received a SIPI (vector
1403                                 accessible via KVM_GET_VCPU_EVENTS) [x86]
1404   KVM_MP_STATE_STOPPED          the vcpu is stopped [s390,arm/arm64]
1405   KVM_MP_STATE_CHECK_STOP       the vcpu is in a special error state [s390]
1406   KVM_MP_STATE_OPERATING        the vcpu is operating (running or halted)
1407                                 [s390]
1408   KVM_MP_STATE_LOAD             the vcpu is in a special load/startup state
1409                                 [s390]
1410   ==========================    ===============================================
1411
1412On x86, this ioctl is only useful after KVM_CREATE_IRQCHIP. Without an
1413in-kernel irqchip, the multiprocessing state must be maintained by userspace on
1414these architectures.
1415
1416For arm/arm64:
1417^^^^^^^^^^^^^^
1418
1419The only states that are valid are KVM_MP_STATE_STOPPED and
1420KVM_MP_STATE_RUNNABLE which reflect if the vcpu is paused or not.
1421
14224.39 KVM_SET_MP_STATE
1423---------------------
1424
1425:Capability: KVM_CAP_MP_STATE
1426:Architectures: x86, s390, arm, arm64
1427:Type: vcpu ioctl
1428:Parameters: struct kvm_mp_state (in)
1429:Returns: 0 on success; -1 on error
1430
1431Sets the vcpu's current "multiprocessing state"; see KVM_GET_MP_STATE for
1432arguments.
1433
1434On x86, this ioctl is only useful after KVM_CREATE_IRQCHIP. Without an
1435in-kernel irqchip, the multiprocessing state must be maintained by userspace on
1436these architectures.
1437
1438For arm/arm64:
1439^^^^^^^^^^^^^^
1440
1441The only states that are valid are KVM_MP_STATE_STOPPED and
1442KVM_MP_STATE_RUNNABLE which reflect if the vcpu should be paused or not.
1443
14444.40 KVM_SET_IDENTITY_MAP_ADDR
1445------------------------------
1446
1447:Capability: KVM_CAP_SET_IDENTITY_MAP_ADDR
1448:Architectures: x86
1449:Type: vm ioctl
1450:Parameters: unsigned long identity (in)
1451:Returns: 0 on success, -1 on error
1452
1453This ioctl defines the physical address of a one-page region in the guest
1454physical address space.  The region must be within the first 4GB of the
1455guest physical address space and must not conflict with any memory slot
1456or any mmio address.  The guest may malfunction if it accesses this memory
1457region.
1458
1459Setting the address to 0 will result in resetting the address to its default
1460(0xfffbc000).
1461
1462This ioctl is required on Intel-based hosts.  This is needed on Intel hardware
1463because of a quirk in the virtualization implementation (see the internals
1464documentation when it pops into existence).
1465
1466Fails if any VCPU has already been created.
1467
14684.41 KVM_SET_BOOT_CPU_ID
1469------------------------
1470
1471:Capability: KVM_CAP_SET_BOOT_CPU_ID
1472:Architectures: x86
1473:Type: vm ioctl
1474:Parameters: unsigned long vcpu_id
1475:Returns: 0 on success, -1 on error
1476
1477Define which vcpu is the Bootstrap Processor (BSP).  Values are the same
1478as the vcpu id in KVM_CREATE_VCPU.  If this ioctl is not called, the default
1479is vcpu 0.
1480
1481
14824.42 KVM_GET_XSAVE
1483------------------
1484
1485:Capability: KVM_CAP_XSAVE
1486:Architectures: x86
1487:Type: vcpu ioctl
1488:Parameters: struct kvm_xsave (out)
1489:Returns: 0 on success, -1 on error
1490
1491
1492::
1493
1494  struct kvm_xsave {
1495	__u32 region[1024];
1496  };
1497
1498This ioctl would copy current vcpu's xsave struct to the userspace.
1499
1500
15014.43 KVM_SET_XSAVE
1502------------------
1503
1504:Capability: KVM_CAP_XSAVE
1505:Architectures: x86
1506:Type: vcpu ioctl
1507:Parameters: struct kvm_xsave (in)
1508:Returns: 0 on success, -1 on error
1509
1510::
1511
1512
1513  struct kvm_xsave {
1514	__u32 region[1024];
1515  };
1516
1517This ioctl would copy userspace's xsave struct to the kernel.
1518
1519
15204.44 KVM_GET_XCRS
1521-----------------
1522
1523:Capability: KVM_CAP_XCRS
1524:Architectures: x86
1525:Type: vcpu ioctl
1526:Parameters: struct kvm_xcrs (out)
1527:Returns: 0 on success, -1 on error
1528
1529::
1530
1531  struct kvm_xcr {
1532	__u32 xcr;
1533	__u32 reserved;
1534	__u64 value;
1535  };
1536
1537  struct kvm_xcrs {
1538	__u32 nr_xcrs;
1539	__u32 flags;
1540	struct kvm_xcr xcrs[KVM_MAX_XCRS];
1541	__u64 padding[16];
1542  };
1543
1544This ioctl would copy current vcpu's xcrs to the userspace.
1545
1546
15474.45 KVM_SET_XCRS
1548-----------------
1549
1550:Capability: KVM_CAP_XCRS
1551:Architectures: x86
1552:Type: vcpu ioctl
1553:Parameters: struct kvm_xcrs (in)
1554:Returns: 0 on success, -1 on error
1555
1556::
1557
1558  struct kvm_xcr {
1559	__u32 xcr;
1560	__u32 reserved;
1561	__u64 value;
1562  };
1563
1564  struct kvm_xcrs {
1565	__u32 nr_xcrs;
1566	__u32 flags;
1567	struct kvm_xcr xcrs[KVM_MAX_XCRS];
1568	__u64 padding[16];
1569  };
1570
1571This ioctl would set vcpu's xcr to the value userspace specified.
1572
1573
15744.46 KVM_GET_SUPPORTED_CPUID
1575----------------------------
1576
1577:Capability: KVM_CAP_EXT_CPUID
1578:Architectures: x86
1579:Type: system ioctl
1580:Parameters: struct kvm_cpuid2 (in/out)
1581:Returns: 0 on success, -1 on error
1582
1583::
1584
1585  struct kvm_cpuid2 {
1586	__u32 nent;
1587	__u32 padding;
1588	struct kvm_cpuid_entry2 entries[0];
1589  };
1590
1591  #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX		BIT(0)
1592  #define KVM_CPUID_FLAG_STATEFUL_FUNC		BIT(1) /* deprecated */
1593  #define KVM_CPUID_FLAG_STATE_READ_NEXT		BIT(2) /* deprecated */
1594
1595  struct kvm_cpuid_entry2 {
1596	__u32 function;
1597	__u32 index;
1598	__u32 flags;
1599	__u32 eax;
1600	__u32 ebx;
1601	__u32 ecx;
1602	__u32 edx;
1603	__u32 padding[3];
1604  };
1605
1606This ioctl returns x86 cpuid features which are supported by both the
1607hardware and kvm in its default configuration.  Userspace can use the
1608information returned by this ioctl to construct cpuid information (for
1609KVM_SET_CPUID2) that is consistent with hardware, kernel, and
1610userspace capabilities, and with user requirements (for example, the
1611user may wish to constrain cpuid to emulate older hardware, or for
1612feature consistency across a cluster).
1613
1614Note that certain capabilities, such as KVM_CAP_X86_DISABLE_EXITS, may
1615expose cpuid features (e.g. MONITOR) which are not supported by kvm in
1616its default configuration. If userspace enables such capabilities, it
1617is responsible for modifying the results of this ioctl appropriately.
1618
1619Userspace invokes KVM_GET_SUPPORTED_CPUID by passing a kvm_cpuid2 structure
1620with the 'nent' field indicating the number of entries in the variable-size
1621array 'entries'.  If the number of entries is too low to describe the cpu
1622capabilities, an error (E2BIG) is returned.  If the number is too high,
1623the 'nent' field is adjusted and an error (ENOMEM) is returned.  If the
1624number is just right, the 'nent' field is adjusted to the number of valid
1625entries in the 'entries' array, which is then filled.
1626
1627The entries returned are the host cpuid as returned by the cpuid instruction,
1628with unknown or unsupported features masked out.  Some features (for example,
1629x2apic), may not be present in the host cpu, but are exposed by kvm if it can
1630emulate them efficiently. The fields in each entry are defined as follows:
1631
1632  function:
1633         the eax value used to obtain the entry
1634
1635  index:
1636         the ecx value used to obtain the entry (for entries that are
1637         affected by ecx)
1638
1639  flags:
1640     an OR of zero or more of the following:
1641
1642        KVM_CPUID_FLAG_SIGNIFCANT_INDEX:
1643           if the index field is valid
1644
1645   eax, ebx, ecx, edx:
1646         the values returned by the cpuid instruction for
1647         this function/index combination
1648
1649The TSC deadline timer feature (CPUID leaf 1, ecx[24]) is always returned
1650as false, since the feature depends on KVM_CREATE_IRQCHIP for local APIC
1651support.  Instead it is reported via::
1652
1653  ioctl(KVM_CHECK_EXTENSION, KVM_CAP_TSC_DEADLINE_TIMER)
1654
1655if that returns true and you use KVM_CREATE_IRQCHIP, or if you emulate the
1656feature in userspace, then you can enable the feature for KVM_SET_CPUID2.
1657
1658
16594.47 KVM_PPC_GET_PVINFO
1660-----------------------
1661
1662:Capability: KVM_CAP_PPC_GET_PVINFO
1663:Architectures: ppc
1664:Type: vm ioctl
1665:Parameters: struct kvm_ppc_pvinfo (out)
1666:Returns: 0 on success, !0 on error
1667
1668::
1669
1670  struct kvm_ppc_pvinfo {
1671	__u32 flags;
1672	__u32 hcall[4];
1673	__u8  pad[108];
1674  };
1675
1676This ioctl fetches PV specific information that need to be passed to the guest
1677using the device tree or other means from vm context.
1678
1679The hcall array defines 4 instructions that make up a hypercall.
1680
1681If any additional field gets added to this structure later on, a bit for that
1682additional piece of information will be set in the flags bitmap.
1683
1684The flags bitmap is defined as::
1685
1686   /* the host supports the ePAPR idle hcall
1687   #define KVM_PPC_PVINFO_FLAGS_EV_IDLE   (1<<0)
1688
16894.52 KVM_SET_GSI_ROUTING
1690------------------------
1691
1692:Capability: KVM_CAP_IRQ_ROUTING
1693:Architectures: x86 s390 arm arm64
1694:Type: vm ioctl
1695:Parameters: struct kvm_irq_routing (in)
1696:Returns: 0 on success, -1 on error
1697
1698Sets the GSI routing table entries, overwriting any previously set entries.
1699
1700On arm/arm64, GSI routing has the following limitation:
1701
1702- GSI routing does not apply to KVM_IRQ_LINE but only to KVM_IRQFD.
1703
1704::
1705
1706  struct kvm_irq_routing {
1707	__u32 nr;
1708	__u32 flags;
1709	struct kvm_irq_routing_entry entries[0];
1710  };
1711
1712No flags are specified so far, the corresponding field must be set to zero.
1713
1714::
1715
1716  struct kvm_irq_routing_entry {
1717	__u32 gsi;
1718	__u32 type;
1719	__u32 flags;
1720	__u32 pad;
1721	union {
1722		struct kvm_irq_routing_irqchip irqchip;
1723		struct kvm_irq_routing_msi msi;
1724		struct kvm_irq_routing_s390_adapter adapter;
1725		struct kvm_irq_routing_hv_sint hv_sint;
1726		__u32 pad[8];
1727	} u;
1728  };
1729
1730  /* gsi routing entry types */
1731  #define KVM_IRQ_ROUTING_IRQCHIP 1
1732  #define KVM_IRQ_ROUTING_MSI 2
1733  #define KVM_IRQ_ROUTING_S390_ADAPTER 3
1734  #define KVM_IRQ_ROUTING_HV_SINT 4
1735
1736flags:
1737
1738- KVM_MSI_VALID_DEVID: used along with KVM_IRQ_ROUTING_MSI routing entry
1739  type, specifies that the devid field contains a valid value.  The per-VM
1740  KVM_CAP_MSI_DEVID capability advertises the requirement to provide
1741  the device ID.  If this capability is not available, userspace should
1742  never set the KVM_MSI_VALID_DEVID flag as the ioctl might fail.
1743- zero otherwise
1744
1745::
1746
1747  struct kvm_irq_routing_irqchip {
1748	__u32 irqchip;
1749	__u32 pin;
1750  };
1751
1752  struct kvm_irq_routing_msi {
1753	__u32 address_lo;
1754	__u32 address_hi;
1755	__u32 data;
1756	union {
1757		__u32 pad;
1758		__u32 devid;
1759	};
1760  };
1761
1762If KVM_MSI_VALID_DEVID is set, devid contains a unique device identifier
1763for the device that wrote the MSI message.  For PCI, this is usually a
1764BFD identifier in the lower 16 bits.
1765
1766On x86, address_hi is ignored unless the KVM_X2APIC_API_USE_32BIT_IDS
1767feature of KVM_CAP_X2APIC_API capability is enabled.  If it is enabled,
1768address_hi bits 31-8 provide bits 31-8 of the destination id.  Bits 7-0 of
1769address_hi must be zero.
1770
1771::
1772
1773  struct kvm_irq_routing_s390_adapter {
1774	__u64 ind_addr;
1775	__u64 summary_addr;
1776	__u64 ind_offset;
1777	__u32 summary_offset;
1778	__u32 adapter_id;
1779  };
1780
1781  struct kvm_irq_routing_hv_sint {
1782	__u32 vcpu;
1783	__u32 sint;
1784  };
1785
1786
17874.55 KVM_SET_TSC_KHZ
1788--------------------
1789
1790:Capability: KVM_CAP_TSC_CONTROL
1791:Architectures: x86
1792:Type: vcpu ioctl
1793:Parameters: virtual tsc_khz
1794:Returns: 0 on success, -1 on error
1795
1796Specifies the tsc frequency for the virtual machine. The unit of the
1797frequency is KHz.
1798
1799
18004.56 KVM_GET_TSC_KHZ
1801--------------------
1802
1803:Capability: KVM_CAP_GET_TSC_KHZ
1804:Architectures: x86
1805:Type: vcpu ioctl
1806:Parameters: none
1807:Returns: virtual tsc-khz on success, negative value on error
1808
1809Returns the tsc frequency of the guest. The unit of the return value is
1810KHz. If the host has unstable tsc this ioctl returns -EIO instead as an
1811error.
1812
1813
18144.57 KVM_GET_LAPIC
1815------------------
1816
1817:Capability: KVM_CAP_IRQCHIP
1818:Architectures: x86
1819:Type: vcpu ioctl
1820:Parameters: struct kvm_lapic_state (out)
1821:Returns: 0 on success, -1 on error
1822
1823::
1824
1825  #define KVM_APIC_REG_SIZE 0x400
1826  struct kvm_lapic_state {
1827	char regs[KVM_APIC_REG_SIZE];
1828  };
1829
1830Reads the Local APIC registers and copies them into the input argument.  The
1831data format and layout are the same as documented in the architecture manual.
1832
1833If KVM_X2APIC_API_USE_32BIT_IDS feature of KVM_CAP_X2APIC_API is
1834enabled, then the format of APIC_ID register depends on the APIC mode
1835(reported by MSR_IA32_APICBASE) of its VCPU.  x2APIC stores APIC ID in
1836the APIC_ID register (bytes 32-35).  xAPIC only allows an 8-bit APIC ID
1837which is stored in bits 31-24 of the APIC register, or equivalently in
1838byte 35 of struct kvm_lapic_state's regs field.  KVM_GET_LAPIC must then
1839be called after MSR_IA32_APICBASE has been set with KVM_SET_MSR.
1840
1841If KVM_X2APIC_API_USE_32BIT_IDS feature is disabled, struct kvm_lapic_state
1842always uses xAPIC format.
1843
1844
18454.58 KVM_SET_LAPIC
1846------------------
1847
1848:Capability: KVM_CAP_IRQCHIP
1849:Architectures: x86
1850:Type: vcpu ioctl
1851:Parameters: struct kvm_lapic_state (in)
1852:Returns: 0 on success, -1 on error
1853
1854::
1855
1856  #define KVM_APIC_REG_SIZE 0x400
1857  struct kvm_lapic_state {
1858	char regs[KVM_APIC_REG_SIZE];
1859  };
1860
1861Copies the input argument into the Local APIC registers.  The data format
1862and layout are the same as documented in the architecture manual.
1863
1864The format of the APIC ID register (bytes 32-35 of struct kvm_lapic_state's
1865regs field) depends on the state of the KVM_CAP_X2APIC_API capability.
1866See the note in KVM_GET_LAPIC.
1867
1868
18694.59 KVM_IOEVENTFD
1870------------------
1871
1872:Capability: KVM_CAP_IOEVENTFD
1873:Architectures: all
1874:Type: vm ioctl
1875:Parameters: struct kvm_ioeventfd (in)
1876:Returns: 0 on success, !0 on error
1877
1878This ioctl attaches or detaches an ioeventfd to a legal pio/mmio address
1879within the guest.  A guest write in the registered address will signal the
1880provided event instead of triggering an exit.
1881
1882::
1883
1884  struct kvm_ioeventfd {
1885	__u64 datamatch;
1886	__u64 addr;        /* legal pio/mmio address */
1887	__u32 len;         /* 0, 1, 2, 4, or 8 bytes    */
1888	__s32 fd;
1889	__u32 flags;
1890	__u8  pad[36];
1891  };
1892
1893For the special case of virtio-ccw devices on s390, the ioevent is matched
1894to a subchannel/virtqueue tuple instead.
1895
1896The following flags are defined::
1897
1898  #define KVM_IOEVENTFD_FLAG_DATAMATCH (1 << kvm_ioeventfd_flag_nr_datamatch)
1899  #define KVM_IOEVENTFD_FLAG_PIO       (1 << kvm_ioeventfd_flag_nr_pio)
1900  #define KVM_IOEVENTFD_FLAG_DEASSIGN  (1 << kvm_ioeventfd_flag_nr_deassign)
1901  #define KVM_IOEVENTFD_FLAG_VIRTIO_CCW_NOTIFY \
1902	(1 << kvm_ioeventfd_flag_nr_virtio_ccw_notify)
1903
1904If datamatch flag is set, the event will be signaled only if the written value
1905to the registered address is equal to datamatch in struct kvm_ioeventfd.
1906
1907For virtio-ccw devices, addr contains the subchannel id and datamatch the
1908virtqueue index.
1909
1910With KVM_CAP_IOEVENTFD_ANY_LENGTH, a zero length ioeventfd is allowed, and
1911the kernel will ignore the length of guest write and may get a faster vmexit.
1912The speedup may only apply to specific architectures, but the ioeventfd will
1913work anyway.
1914
19154.60 KVM_DIRTY_TLB
1916------------------
1917
1918:Capability: KVM_CAP_SW_TLB
1919:Architectures: ppc
1920:Type: vcpu ioctl
1921:Parameters: struct kvm_dirty_tlb (in)
1922:Returns: 0 on success, -1 on error
1923
1924::
1925
1926  struct kvm_dirty_tlb {
1927	__u64 bitmap;
1928	__u32 num_dirty;
1929  };
1930
1931This must be called whenever userspace has changed an entry in the shared
1932TLB, prior to calling KVM_RUN on the associated vcpu.
1933
1934The "bitmap" field is the userspace address of an array.  This array
1935consists of a number of bits, equal to the total number of TLB entries as
1936determined by the last successful call to KVM_CONFIG_TLB, rounded up to the
1937nearest multiple of 64.
1938
1939Each bit corresponds to one TLB entry, ordered the same as in the shared TLB
1940array.
1941
1942The array is little-endian: the bit 0 is the least significant bit of the
1943first byte, bit 8 is the least significant bit of the second byte, etc.
1944This avoids any complications with differing word sizes.
1945
1946The "num_dirty" field is a performance hint for KVM to determine whether it
1947should skip processing the bitmap and just invalidate everything.  It must
1948be set to the number of set bits in the bitmap.
1949
1950
19514.62 KVM_CREATE_SPAPR_TCE
1952-------------------------
1953
1954:Capability: KVM_CAP_SPAPR_TCE
1955:Architectures: powerpc
1956:Type: vm ioctl
1957:Parameters: struct kvm_create_spapr_tce (in)
1958:Returns: file descriptor for manipulating the created TCE table
1959
1960This creates a virtual TCE (translation control entry) table, which
1961is an IOMMU for PAPR-style virtual I/O.  It is used to translate
1962logical addresses used in virtual I/O into guest physical addresses,
1963and provides a scatter/gather capability for PAPR virtual I/O.
1964
1965::
1966
1967  /* for KVM_CAP_SPAPR_TCE */
1968  struct kvm_create_spapr_tce {
1969	__u64 liobn;
1970	__u32 window_size;
1971  };
1972
1973The liobn field gives the logical IO bus number for which to create a
1974TCE table.  The window_size field specifies the size of the DMA window
1975which this TCE table will translate - the table will contain one 64
1976bit TCE entry for every 4kiB of the DMA window.
1977
1978When the guest issues an H_PUT_TCE hcall on a liobn for which a TCE
1979table has been created using this ioctl(), the kernel will handle it
1980in real mode, updating the TCE table.  H_PUT_TCE calls for other
1981liobns will cause a vm exit and must be handled by userspace.
1982
1983The return value is a file descriptor which can be passed to mmap(2)
1984to map the created TCE table into userspace.  This lets userspace read
1985the entries written by kernel-handled H_PUT_TCE calls, and also lets
1986userspace update the TCE table directly which is useful in some
1987circumstances.
1988
1989
19904.63 KVM_ALLOCATE_RMA
1991---------------------
1992
1993:Capability: KVM_CAP_PPC_RMA
1994:Architectures: powerpc
1995:Type: vm ioctl
1996:Parameters: struct kvm_allocate_rma (out)
1997:Returns: file descriptor for mapping the allocated RMA
1998
1999This allocates a Real Mode Area (RMA) from the pool allocated at boot
2000time by the kernel.  An RMA is a physically-contiguous, aligned region
2001of memory used on older POWER processors to provide the memory which
2002will be accessed by real-mode (MMU off) accesses in a KVM guest.
2003POWER processors support a set of sizes for the RMA that usually
2004includes 64MB, 128MB, 256MB and some larger powers of two.
2005
2006::
2007
2008  /* for KVM_ALLOCATE_RMA */
2009  struct kvm_allocate_rma {
2010	__u64 rma_size;
2011  };
2012
2013The return value is a file descriptor which can be passed to mmap(2)
2014to map the allocated RMA into userspace.  The mapped area can then be
2015passed to the KVM_SET_USER_MEMORY_REGION ioctl to establish it as the
2016RMA for a virtual machine.  The size of the RMA in bytes (which is
2017fixed at host kernel boot time) is returned in the rma_size field of
2018the argument structure.
2019
2020The KVM_CAP_PPC_RMA capability is 1 or 2 if the KVM_ALLOCATE_RMA ioctl
2021is supported; 2 if the processor requires all virtual machines to have
2022an RMA, or 1 if the processor can use an RMA but doesn't require it,
2023because it supports the Virtual RMA (VRMA) facility.
2024
2025
20264.64 KVM_NMI
2027------------
2028
2029:Capability: KVM_CAP_USER_NMI
2030:Architectures: x86
2031:Type: vcpu ioctl
2032:Parameters: none
2033:Returns: 0 on success, -1 on error
2034
2035Queues an NMI on the thread's vcpu.  Note this is well defined only
2036when KVM_CREATE_IRQCHIP has not been called, since this is an interface
2037between the virtual cpu core and virtual local APIC.  After KVM_CREATE_IRQCHIP
2038has been called, this interface is completely emulated within the kernel.
2039
2040To use this to emulate the LINT1 input with KVM_CREATE_IRQCHIP, use the
2041following algorithm:
2042
2043  - pause the vcpu
2044  - read the local APIC's state (KVM_GET_LAPIC)
2045  - check whether changing LINT1 will queue an NMI (see the LVT entry for LINT1)
2046  - if so, issue KVM_NMI
2047  - resume the vcpu
2048
2049Some guests configure the LINT1 NMI input to cause a panic, aiding in
2050debugging.
2051
2052
20534.65 KVM_S390_UCAS_MAP
2054----------------------
2055
2056:Capability: KVM_CAP_S390_UCONTROL
2057:Architectures: s390
2058:Type: vcpu ioctl
2059:Parameters: struct kvm_s390_ucas_mapping (in)
2060:Returns: 0 in case of success
2061
2062The parameter is defined like this::
2063
2064	struct kvm_s390_ucas_mapping {
2065		__u64 user_addr;
2066		__u64 vcpu_addr;
2067		__u64 length;
2068	};
2069
2070This ioctl maps the memory at "user_addr" with the length "length" to
2071the vcpu's address space starting at "vcpu_addr". All parameters need to
2072be aligned by 1 megabyte.
2073
2074
20754.66 KVM_S390_UCAS_UNMAP
2076------------------------
2077
2078:Capability: KVM_CAP_S390_UCONTROL
2079:Architectures: s390
2080:Type: vcpu ioctl
2081:Parameters: struct kvm_s390_ucas_mapping (in)
2082:Returns: 0 in case of success
2083
2084The parameter is defined like this::
2085
2086	struct kvm_s390_ucas_mapping {
2087		__u64 user_addr;
2088		__u64 vcpu_addr;
2089		__u64 length;
2090	};
2091
2092This ioctl unmaps the memory in the vcpu's address space starting at
2093"vcpu_addr" with the length "length". The field "user_addr" is ignored.
2094All parameters need to be aligned by 1 megabyte.
2095
2096
20974.67 KVM_S390_VCPU_FAULT
2098------------------------
2099
2100:Capability: KVM_CAP_S390_UCONTROL
2101:Architectures: s390
2102:Type: vcpu ioctl
2103:Parameters: vcpu absolute address (in)
2104:Returns: 0 in case of success
2105
2106This call creates a page table entry on the virtual cpu's address space
2107(for user controlled virtual machines) or the virtual machine's address
2108space (for regular virtual machines). This only works for minor faults,
2109thus it's recommended to access subject memory page via the user page
2110table upfront. This is useful to handle validity intercepts for user
2111controlled virtual machines to fault in the virtual cpu's lowcore pages
2112prior to calling the KVM_RUN ioctl.
2113
2114
21154.68 KVM_SET_ONE_REG
2116--------------------
2117
2118:Capability: KVM_CAP_ONE_REG
2119:Architectures: all
2120:Type: vcpu ioctl
2121:Parameters: struct kvm_one_reg (in)
2122:Returns: 0 on success, negative value on failure
2123
2124Errors:
2125
2126  ======   ============================================================
2127  ENOENT   no such register
2128  EINVAL   invalid register ID, or no such register or used with VMs in
2129           protected virtualization mode on s390
2130  EPERM    (arm64) register access not allowed before vcpu finalization
2131  ======   ============================================================
2132
2133(These error codes are indicative only: do not rely on a specific error
2134code being returned in a specific situation.)
2135
2136::
2137
2138  struct kvm_one_reg {
2139       __u64 id;
2140       __u64 addr;
2141 };
2142
2143Using this ioctl, a single vcpu register can be set to a specific value
2144defined by user space with the passed in struct kvm_one_reg, where id
2145refers to the register identifier as described below and addr is a pointer
2146to a variable with the respective size. There can be architecture agnostic
2147and architecture specific registers. Each have their own range of operation
2148and their own constants and width. To keep track of the implemented
2149registers, find a list below:
2150
2151  ======= =============================== ============
2152  Arch              Register              Width (bits)
2153  ======= =============================== ============
2154  PPC     KVM_REG_PPC_HIOR                64
2155  PPC     KVM_REG_PPC_IAC1                64
2156  PPC     KVM_REG_PPC_IAC2                64
2157  PPC     KVM_REG_PPC_IAC3                64
2158  PPC     KVM_REG_PPC_IAC4                64
2159  PPC     KVM_REG_PPC_DAC1                64
2160  PPC     KVM_REG_PPC_DAC2                64
2161  PPC     KVM_REG_PPC_DABR                64
2162  PPC     KVM_REG_PPC_DSCR                64
2163  PPC     KVM_REG_PPC_PURR                64
2164  PPC     KVM_REG_PPC_SPURR               64
2165  PPC     KVM_REG_PPC_DAR                 64
2166  PPC     KVM_REG_PPC_DSISR               32
2167  PPC     KVM_REG_PPC_AMR                 64
2168  PPC     KVM_REG_PPC_UAMOR               64
2169  PPC     KVM_REG_PPC_MMCR0               64
2170  PPC     KVM_REG_PPC_MMCR1               64
2171  PPC     KVM_REG_PPC_MMCRA               64
2172  PPC     KVM_REG_PPC_MMCR2               64
2173  PPC     KVM_REG_PPC_MMCRS               64
2174  PPC     KVM_REG_PPC_MMCR3               64
2175  PPC     KVM_REG_PPC_SIAR                64
2176  PPC     KVM_REG_PPC_SDAR                64
2177  PPC     KVM_REG_PPC_SIER                64
2178  PPC     KVM_REG_PPC_SIER2               64
2179  PPC     KVM_REG_PPC_SIER3               64
2180  PPC     KVM_REG_PPC_PMC1                32
2181  PPC     KVM_REG_PPC_PMC2                32
2182  PPC     KVM_REG_PPC_PMC3                32
2183  PPC     KVM_REG_PPC_PMC4                32
2184  PPC     KVM_REG_PPC_PMC5                32
2185  PPC     KVM_REG_PPC_PMC6                32
2186  PPC     KVM_REG_PPC_PMC7                32
2187  PPC     KVM_REG_PPC_PMC8                32
2188  PPC     KVM_REG_PPC_FPR0                64
2189  ...
2190  PPC     KVM_REG_PPC_FPR31               64
2191  PPC     KVM_REG_PPC_VR0                 128
2192  ...
2193  PPC     KVM_REG_PPC_VR31                128
2194  PPC     KVM_REG_PPC_VSR0                128
2195  ...
2196  PPC     KVM_REG_PPC_VSR31               128
2197  PPC     KVM_REG_PPC_FPSCR               64
2198  PPC     KVM_REG_PPC_VSCR                32
2199  PPC     KVM_REG_PPC_VPA_ADDR            64
2200  PPC     KVM_REG_PPC_VPA_SLB             128
2201  PPC     KVM_REG_PPC_VPA_DTL             128
2202  PPC     KVM_REG_PPC_EPCR                32
2203  PPC     KVM_REG_PPC_EPR                 32
2204  PPC     KVM_REG_PPC_TCR                 32
2205  PPC     KVM_REG_PPC_TSR                 32
2206  PPC     KVM_REG_PPC_OR_TSR              32
2207  PPC     KVM_REG_PPC_CLEAR_TSR           32
2208  PPC     KVM_REG_PPC_MAS0                32
2209  PPC     KVM_REG_PPC_MAS1                32
2210  PPC     KVM_REG_PPC_MAS2                64
2211  PPC     KVM_REG_PPC_MAS7_3              64
2212  PPC     KVM_REG_PPC_MAS4                32
2213  PPC     KVM_REG_PPC_MAS6                32
2214  PPC     KVM_REG_PPC_MMUCFG              32
2215  PPC     KVM_REG_PPC_TLB0CFG             32
2216  PPC     KVM_REG_PPC_TLB1CFG             32
2217  PPC     KVM_REG_PPC_TLB2CFG             32
2218  PPC     KVM_REG_PPC_TLB3CFG             32
2219  PPC     KVM_REG_PPC_TLB0PS              32
2220  PPC     KVM_REG_PPC_TLB1PS              32
2221  PPC     KVM_REG_PPC_TLB2PS              32
2222  PPC     KVM_REG_PPC_TLB3PS              32
2223  PPC     KVM_REG_PPC_EPTCFG              32
2224  PPC     KVM_REG_PPC_ICP_STATE           64
2225  PPC     KVM_REG_PPC_VP_STATE            128
2226  PPC     KVM_REG_PPC_TB_OFFSET           64
2227  PPC     KVM_REG_PPC_SPMC1               32
2228  PPC     KVM_REG_PPC_SPMC2               32
2229  PPC     KVM_REG_PPC_IAMR                64
2230  PPC     KVM_REG_PPC_TFHAR               64
2231  PPC     KVM_REG_PPC_TFIAR               64
2232  PPC     KVM_REG_PPC_TEXASR              64
2233  PPC     KVM_REG_PPC_FSCR                64
2234  PPC     KVM_REG_PPC_PSPB                32
2235  PPC     KVM_REG_PPC_EBBHR               64
2236  PPC     KVM_REG_PPC_EBBRR               64
2237  PPC     KVM_REG_PPC_BESCR               64
2238  PPC     KVM_REG_PPC_TAR                 64
2239  PPC     KVM_REG_PPC_DPDES               64
2240  PPC     KVM_REG_PPC_DAWR                64
2241  PPC     KVM_REG_PPC_DAWRX               64
2242  PPC     KVM_REG_PPC_CIABR               64
2243  PPC     KVM_REG_PPC_IC                  64
2244  PPC     KVM_REG_PPC_VTB                 64
2245  PPC     KVM_REG_PPC_CSIGR               64
2246  PPC     KVM_REG_PPC_TACR                64
2247  PPC     KVM_REG_PPC_TCSCR               64
2248  PPC     KVM_REG_PPC_PID                 64
2249  PPC     KVM_REG_PPC_ACOP                64
2250  PPC     KVM_REG_PPC_VRSAVE              32
2251  PPC     KVM_REG_PPC_LPCR                32
2252  PPC     KVM_REG_PPC_LPCR_64             64
2253  PPC     KVM_REG_PPC_PPR                 64
2254  PPC     KVM_REG_PPC_ARCH_COMPAT         32
2255  PPC     KVM_REG_PPC_DABRX               32
2256  PPC     KVM_REG_PPC_WORT                64
2257  PPC	  KVM_REG_PPC_SPRG9               64
2258  PPC	  KVM_REG_PPC_DBSR                32
2259  PPC     KVM_REG_PPC_TIDR                64
2260  PPC     KVM_REG_PPC_PSSCR               64
2261  PPC     KVM_REG_PPC_DEC_EXPIRY          64
2262  PPC     KVM_REG_PPC_PTCR                64
2263  PPC     KVM_REG_PPC_TM_GPR0             64
2264  ...
2265  PPC     KVM_REG_PPC_TM_GPR31            64
2266  PPC     KVM_REG_PPC_TM_VSR0             128
2267  ...
2268  PPC     KVM_REG_PPC_TM_VSR63            128
2269  PPC     KVM_REG_PPC_TM_CR               64
2270  PPC     KVM_REG_PPC_TM_LR               64
2271  PPC     KVM_REG_PPC_TM_CTR              64
2272  PPC     KVM_REG_PPC_TM_FPSCR            64
2273  PPC     KVM_REG_PPC_TM_AMR              64
2274  PPC     KVM_REG_PPC_TM_PPR              64
2275  PPC     KVM_REG_PPC_TM_VRSAVE           64
2276  PPC     KVM_REG_PPC_TM_VSCR             32
2277  PPC     KVM_REG_PPC_TM_DSCR             64
2278  PPC     KVM_REG_PPC_TM_TAR              64
2279  PPC     KVM_REG_PPC_TM_XER              64
2280
2281  MIPS    KVM_REG_MIPS_R0                 64
2282  ...
2283  MIPS    KVM_REG_MIPS_R31                64
2284  MIPS    KVM_REG_MIPS_HI                 64
2285  MIPS    KVM_REG_MIPS_LO                 64
2286  MIPS    KVM_REG_MIPS_PC                 64
2287  MIPS    KVM_REG_MIPS_CP0_INDEX          32
2288  MIPS    KVM_REG_MIPS_CP0_ENTRYLO0       64
2289  MIPS    KVM_REG_MIPS_CP0_ENTRYLO1       64
2290  MIPS    KVM_REG_MIPS_CP0_CONTEXT        64
2291  MIPS    KVM_REG_MIPS_CP0_CONTEXTCONFIG  32
2292  MIPS    KVM_REG_MIPS_CP0_USERLOCAL      64
2293  MIPS    KVM_REG_MIPS_CP0_XCONTEXTCONFIG 64
2294  MIPS    KVM_REG_MIPS_CP0_PAGEMASK       32
2295  MIPS    KVM_REG_MIPS_CP0_PAGEGRAIN      32
2296  MIPS    KVM_REG_MIPS_CP0_SEGCTL0        64
2297  MIPS    KVM_REG_MIPS_CP0_SEGCTL1        64
2298  MIPS    KVM_REG_MIPS_CP0_SEGCTL2        64
2299  MIPS    KVM_REG_MIPS_CP0_PWBASE         64
2300  MIPS    KVM_REG_MIPS_CP0_PWFIELD        64
2301  MIPS    KVM_REG_MIPS_CP0_PWSIZE         64
2302  MIPS    KVM_REG_MIPS_CP0_WIRED          32
2303  MIPS    KVM_REG_MIPS_CP0_PWCTL          32
2304  MIPS    KVM_REG_MIPS_CP0_HWRENA         32
2305  MIPS    KVM_REG_MIPS_CP0_BADVADDR       64
2306  MIPS    KVM_REG_MIPS_CP0_BADINSTR       32
2307  MIPS    KVM_REG_MIPS_CP0_BADINSTRP      32
2308  MIPS    KVM_REG_MIPS_CP0_COUNT          32
2309  MIPS    KVM_REG_MIPS_CP0_ENTRYHI        64
2310  MIPS    KVM_REG_MIPS_CP0_COMPARE        32
2311  MIPS    KVM_REG_MIPS_CP0_STATUS         32
2312  MIPS    KVM_REG_MIPS_CP0_INTCTL         32
2313  MIPS    KVM_REG_MIPS_CP0_CAUSE          32
2314  MIPS    KVM_REG_MIPS_CP0_EPC            64
2315  MIPS    KVM_REG_MIPS_CP0_PRID           32
2316  MIPS    KVM_REG_MIPS_CP0_EBASE          64
2317  MIPS    KVM_REG_MIPS_CP0_CONFIG         32
2318  MIPS    KVM_REG_MIPS_CP0_CONFIG1        32
2319  MIPS    KVM_REG_MIPS_CP0_CONFIG2        32
2320  MIPS    KVM_REG_MIPS_CP0_CONFIG3        32
2321  MIPS    KVM_REG_MIPS_CP0_CONFIG4        32
2322  MIPS    KVM_REG_MIPS_CP0_CONFIG5        32
2323  MIPS    KVM_REG_MIPS_CP0_CONFIG7        32
2324  MIPS    KVM_REG_MIPS_CP0_XCONTEXT       64
2325  MIPS    KVM_REG_MIPS_CP0_ERROREPC       64
2326  MIPS    KVM_REG_MIPS_CP0_KSCRATCH1      64
2327  MIPS    KVM_REG_MIPS_CP0_KSCRATCH2      64
2328  MIPS    KVM_REG_MIPS_CP0_KSCRATCH3      64
2329  MIPS    KVM_REG_MIPS_CP0_KSCRATCH4      64
2330  MIPS    KVM_REG_MIPS_CP0_KSCRATCH5      64
2331  MIPS    KVM_REG_MIPS_CP0_KSCRATCH6      64
2332  MIPS    KVM_REG_MIPS_CP0_MAAR(0..63)    64
2333  MIPS    KVM_REG_MIPS_COUNT_CTL          64
2334  MIPS    KVM_REG_MIPS_COUNT_RESUME       64
2335  MIPS    KVM_REG_MIPS_COUNT_HZ           64
2336  MIPS    KVM_REG_MIPS_FPR_32(0..31)      32
2337  MIPS    KVM_REG_MIPS_FPR_64(0..31)      64
2338  MIPS    KVM_REG_MIPS_VEC_128(0..31)     128
2339  MIPS    KVM_REG_MIPS_FCR_IR             32
2340  MIPS    KVM_REG_MIPS_FCR_CSR            32
2341  MIPS    KVM_REG_MIPS_MSA_IR             32
2342  MIPS    KVM_REG_MIPS_MSA_CSR            32
2343  ======= =============================== ============
2344
2345ARM registers are mapped using the lower 32 bits.  The upper 16 of that
2346is the register group type, or coprocessor number:
2347
2348ARM core registers have the following id bit patterns::
2349
2350  0x4020 0000 0010 <index into the kvm_regs struct:16>
2351
2352ARM 32-bit CP15 registers have the following id bit patterns::
2353
2354  0x4020 0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3>
2355
2356ARM 64-bit CP15 registers have the following id bit patterns::
2357
2358  0x4030 0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3>
2359
2360ARM CCSIDR registers are demultiplexed by CSSELR value::
2361
2362  0x4020 0000 0011 00 <csselr:8>
2363
2364ARM 32-bit VFP control registers have the following id bit patterns::
2365
2366  0x4020 0000 0012 1 <regno:12>
2367
2368ARM 64-bit FP registers have the following id bit patterns::
2369
2370  0x4030 0000 0012 0 <regno:12>
2371
2372ARM firmware pseudo-registers have the following bit pattern::
2373
2374  0x4030 0000 0014 <regno:16>
2375
2376
2377arm64 registers are mapped using the lower 32 bits. The upper 16 of
2378that is the register group type, or coprocessor number:
2379
2380arm64 core/FP-SIMD registers have the following id bit patterns. Note
2381that the size of the access is variable, as the kvm_regs structure
2382contains elements ranging from 32 to 128 bits. The index is a 32bit
2383value in the kvm_regs structure seen as a 32bit array::
2384
2385  0x60x0 0000 0010 <index into the kvm_regs struct:16>
2386
2387Specifically:
2388
2389======================= ========= ===== =======================================
2390    Encoding            Register  Bits  kvm_regs member
2391======================= ========= ===== =======================================
2392  0x6030 0000 0010 0000 X0          64  regs.regs[0]
2393  0x6030 0000 0010 0002 X1          64  regs.regs[1]
2394  ...
2395  0x6030 0000 0010 003c X30         64  regs.regs[30]
2396  0x6030 0000 0010 003e SP          64  regs.sp
2397  0x6030 0000 0010 0040 PC          64  regs.pc
2398  0x6030 0000 0010 0042 PSTATE      64  regs.pstate
2399  0x6030 0000 0010 0044 SP_EL1      64  sp_el1
2400  0x6030 0000 0010 0046 ELR_EL1     64  elr_el1
2401  0x6030 0000 0010 0048 SPSR_EL1    64  spsr[KVM_SPSR_EL1] (alias SPSR_SVC)
2402  0x6030 0000 0010 004a SPSR_ABT    64  spsr[KVM_SPSR_ABT]
2403  0x6030 0000 0010 004c SPSR_UND    64  spsr[KVM_SPSR_UND]
2404  0x6030 0000 0010 004e SPSR_IRQ    64  spsr[KVM_SPSR_IRQ]
2405  0x6060 0000 0010 0050 SPSR_FIQ    64  spsr[KVM_SPSR_FIQ]
2406  0x6040 0000 0010 0054 V0         128  fp_regs.vregs[0]    [1]_
2407  0x6040 0000 0010 0058 V1         128  fp_regs.vregs[1]    [1]_
2408  ...
2409  0x6040 0000 0010 00d0 V31        128  fp_regs.vregs[31]   [1]_
2410  0x6020 0000 0010 00d4 FPSR        32  fp_regs.fpsr
2411  0x6020 0000 0010 00d5 FPCR        32  fp_regs.fpcr
2412======================= ========= ===== =======================================
2413
2414.. [1] These encodings are not accepted for SVE-enabled vcpus.  See
2415       KVM_ARM_VCPU_INIT.
2416
2417       The equivalent register content can be accessed via bits [127:0] of
2418       the corresponding SVE Zn registers instead for vcpus that have SVE
2419       enabled (see below).
2420
2421arm64 CCSIDR registers are demultiplexed by CSSELR value::
2422
2423  0x6020 0000 0011 00 <csselr:8>
2424
2425arm64 system registers have the following id bit patterns::
2426
2427  0x6030 0000 0013 <op0:2> <op1:3> <crn:4> <crm:4> <op2:3>
2428
2429.. warning::
2430
2431     Two system register IDs do not follow the specified pattern.  These
2432     are KVM_REG_ARM_TIMER_CVAL and KVM_REG_ARM_TIMER_CNT, which map to
2433     system registers CNTV_CVAL_EL0 and CNTVCT_EL0 respectively.  These
2434     two had their values accidentally swapped, which means TIMER_CVAL is
2435     derived from the register encoding for CNTVCT_EL0 and TIMER_CNT is
2436     derived from the register encoding for CNTV_CVAL_EL0.  As this is
2437     API, it must remain this way.
2438
2439arm64 firmware pseudo-registers have the following bit pattern::
2440
2441  0x6030 0000 0014 <regno:16>
2442
2443arm64 SVE registers have the following bit patterns::
2444
2445  0x6080 0000 0015 00 <n:5> <slice:5>   Zn bits[2048*slice + 2047 : 2048*slice]
2446  0x6050 0000 0015 04 <n:4> <slice:5>   Pn bits[256*slice + 255 : 256*slice]
2447  0x6050 0000 0015 060 <slice:5>        FFR bits[256*slice + 255 : 256*slice]
2448  0x6060 0000 0015 ffff                 KVM_REG_ARM64_SVE_VLS pseudo-register
2449
2450Access to register IDs where 2048 * slice >= 128 * max_vq will fail with
2451ENOENT.  max_vq is the vcpu's maximum supported vector length in 128-bit
2452quadwords: see [2]_ below.
2453
2454These registers are only accessible on vcpus for which SVE is enabled.
2455See KVM_ARM_VCPU_INIT for details.
2456
2457In addition, except for KVM_REG_ARM64_SVE_VLS, these registers are not
2458accessible until the vcpu's SVE configuration has been finalized
2459using KVM_ARM_VCPU_FINALIZE(KVM_ARM_VCPU_SVE).  See KVM_ARM_VCPU_INIT
2460and KVM_ARM_VCPU_FINALIZE for more information about this procedure.
2461
2462KVM_REG_ARM64_SVE_VLS is a pseudo-register that allows the set of vector
2463lengths supported by the vcpu to be discovered and configured by
2464userspace.  When transferred to or from user memory via KVM_GET_ONE_REG
2465or KVM_SET_ONE_REG, the value of this register is of type
2466__u64[KVM_ARM64_SVE_VLS_WORDS], and encodes the set of vector lengths as
2467follows::
2468
2469  __u64 vector_lengths[KVM_ARM64_SVE_VLS_WORDS];
2470
2471  if (vq >= SVE_VQ_MIN && vq <= SVE_VQ_MAX &&
2472      ((vector_lengths[(vq - KVM_ARM64_SVE_VQ_MIN) / 64] >>
2473		((vq - KVM_ARM64_SVE_VQ_MIN) % 64)) & 1))
2474	/* Vector length vq * 16 bytes supported */
2475  else
2476	/* Vector length vq * 16 bytes not supported */
2477
2478.. [2] The maximum value vq for which the above condition is true is
2479       max_vq.  This is the maximum vector length available to the guest on
2480       this vcpu, and determines which register slices are visible through
2481       this ioctl interface.
2482
2483(See Documentation/arm64/sve.rst for an explanation of the "vq"
2484nomenclature.)
2485
2486KVM_REG_ARM64_SVE_VLS is only accessible after KVM_ARM_VCPU_INIT.
2487KVM_ARM_VCPU_INIT initialises it to the best set of vector lengths that
2488the host supports.
2489
2490Userspace may subsequently modify it if desired until the vcpu's SVE
2491configuration is finalized using KVM_ARM_VCPU_FINALIZE(KVM_ARM_VCPU_SVE).
2492
2493Apart from simply removing all vector lengths from the host set that
2494exceed some value, support for arbitrarily chosen sets of vector lengths
2495is hardware-dependent and may not be available.  Attempting to configure
2496an invalid set of vector lengths via KVM_SET_ONE_REG will fail with
2497EINVAL.
2498
2499After the vcpu's SVE configuration is finalized, further attempts to
2500write this register will fail with EPERM.
2501
2502
2503MIPS registers are mapped using the lower 32 bits.  The upper 16 of that is
2504the register group type:
2505
2506MIPS core registers (see above) have the following id bit patterns::
2507
2508  0x7030 0000 0000 <reg:16>
2509
2510MIPS CP0 registers (see KVM_REG_MIPS_CP0_* above) have the following id bit
2511patterns depending on whether they're 32-bit or 64-bit registers::
2512
2513  0x7020 0000 0001 00 <reg:5> <sel:3>   (32-bit)
2514  0x7030 0000 0001 00 <reg:5> <sel:3>   (64-bit)
2515
2516Note: KVM_REG_MIPS_CP0_ENTRYLO0 and KVM_REG_MIPS_CP0_ENTRYLO1 are the MIPS64
2517versions of the EntryLo registers regardless of the word size of the host
2518hardware, host kernel, guest, and whether XPA is present in the guest, i.e.
2519with the RI and XI bits (if they exist) in bits 63 and 62 respectively, and
2520the PFNX field starting at bit 30.
2521
2522MIPS MAARs (see KVM_REG_MIPS_CP0_MAAR(*) above) have the following id bit
2523patterns::
2524
2525  0x7030 0000 0001 01 <reg:8>
2526
2527MIPS KVM control registers (see above) have the following id bit patterns::
2528
2529  0x7030 0000 0002 <reg:16>
2530
2531MIPS FPU registers (see KVM_REG_MIPS_FPR_{32,64}() above) have the following
2532id bit patterns depending on the size of the register being accessed. They are
2533always accessed according to the current guest FPU mode (Status.FR and
2534Config5.FRE), i.e. as the guest would see them, and they become unpredictable
2535if the guest FPU mode is changed. MIPS SIMD Architecture (MSA) vector
2536registers (see KVM_REG_MIPS_VEC_128() above) have similar patterns as they
2537overlap the FPU registers::
2538
2539  0x7020 0000 0003 00 <0:3> <reg:5> (32-bit FPU registers)
2540  0x7030 0000 0003 00 <0:3> <reg:5> (64-bit FPU registers)
2541  0x7040 0000 0003 00 <0:3> <reg:5> (128-bit MSA vector registers)
2542
2543MIPS FPU control registers (see KVM_REG_MIPS_FCR_{IR,CSR} above) have the
2544following id bit patterns::
2545
2546  0x7020 0000 0003 01 <0:3> <reg:5>
2547
2548MIPS MSA control registers (see KVM_REG_MIPS_MSA_{IR,CSR} above) have the
2549following id bit patterns::
2550
2551  0x7020 0000 0003 02 <0:3> <reg:5>
2552
2553
25544.69 KVM_GET_ONE_REG
2555--------------------
2556
2557:Capability: KVM_CAP_ONE_REG
2558:Architectures: all
2559:Type: vcpu ioctl
2560:Parameters: struct kvm_one_reg (in and out)
2561:Returns: 0 on success, negative value on failure
2562
2563Errors include:
2564
2565  ======== ============================================================
2566  ENOENT   no such register
2567  EINVAL   invalid register ID, or no such register or used with VMs in
2568           protected virtualization mode on s390
2569  EPERM    (arm64) register access not allowed before vcpu finalization
2570  ======== ============================================================
2571
2572(These error codes are indicative only: do not rely on a specific error
2573code being returned in a specific situation.)
2574
2575This ioctl allows to receive the value of a single register implemented
2576in a vcpu. The register to read is indicated by the "id" field of the
2577kvm_one_reg struct passed in. On success, the register value can be found
2578at the memory location pointed to by "addr".
2579
2580The list of registers accessible using this interface is identical to the
2581list in 4.68.
2582
2583
25844.70 KVM_KVMCLOCK_CTRL
2585----------------------
2586
2587:Capability: KVM_CAP_KVMCLOCK_CTRL
2588:Architectures: Any that implement pvclocks (currently x86 only)
2589:Type: vcpu ioctl
2590:Parameters: None
2591:Returns: 0 on success, -1 on error
2592
2593This ioctl sets a flag accessible to the guest indicating that the specified
2594vCPU has been paused by the host userspace.
2595
2596The host will set a flag in the pvclock structure that is checked from the
2597soft lockup watchdog.  The flag is part of the pvclock structure that is
2598shared between guest and host, specifically the second bit of the flags
2599field of the pvclock_vcpu_time_info structure.  It will be set exclusively by
2600the host and read/cleared exclusively by the guest.  The guest operation of
2601checking and clearing the flag must be an atomic operation so
2602load-link/store-conditional, or equivalent must be used.  There are two cases
2603where the guest will clear the flag: when the soft lockup watchdog timer resets
2604itself or when a soft lockup is detected.  This ioctl can be called any time
2605after pausing the vcpu, but before it is resumed.
2606
2607
26084.71 KVM_SIGNAL_MSI
2609-------------------
2610
2611:Capability: KVM_CAP_SIGNAL_MSI
2612:Architectures: x86 arm arm64
2613:Type: vm ioctl
2614:Parameters: struct kvm_msi (in)
2615:Returns: >0 on delivery, 0 if guest blocked the MSI, and -1 on error
2616
2617Directly inject a MSI message. Only valid with in-kernel irqchip that handles
2618MSI messages.
2619
2620::
2621
2622  struct kvm_msi {
2623	__u32 address_lo;
2624	__u32 address_hi;
2625	__u32 data;
2626	__u32 flags;
2627	__u32 devid;
2628	__u8  pad[12];
2629  };
2630
2631flags:
2632  KVM_MSI_VALID_DEVID: devid contains a valid value.  The per-VM
2633  KVM_CAP_MSI_DEVID capability advertises the requirement to provide
2634  the device ID.  If this capability is not available, userspace
2635  should never set the KVM_MSI_VALID_DEVID flag as the ioctl might fail.
2636
2637If KVM_MSI_VALID_DEVID is set, devid contains a unique device identifier
2638for the device that wrote the MSI message.  For PCI, this is usually a
2639BFD identifier in the lower 16 bits.
2640
2641On x86, address_hi is ignored unless the KVM_X2APIC_API_USE_32BIT_IDS
2642feature of KVM_CAP_X2APIC_API capability is enabled.  If it is enabled,
2643address_hi bits 31-8 provide bits 31-8 of the destination id.  Bits 7-0 of
2644address_hi must be zero.
2645
2646
26474.71 KVM_CREATE_PIT2
2648--------------------
2649
2650:Capability: KVM_CAP_PIT2
2651:Architectures: x86
2652:Type: vm ioctl
2653:Parameters: struct kvm_pit_config (in)
2654:Returns: 0 on success, -1 on error
2655
2656Creates an in-kernel device model for the i8254 PIT. This call is only valid
2657after enabling in-kernel irqchip support via KVM_CREATE_IRQCHIP. The following
2658parameters have to be passed::
2659
2660  struct kvm_pit_config {
2661	__u32 flags;
2662	__u32 pad[15];
2663  };
2664
2665Valid flags are::
2666
2667  #define KVM_PIT_SPEAKER_DUMMY     1 /* emulate speaker port stub */
2668
2669PIT timer interrupts may use a per-VM kernel thread for injection. If it
2670exists, this thread will have a name of the following pattern::
2671
2672  kvm-pit/<owner-process-pid>
2673
2674When running a guest with elevated priorities, the scheduling parameters of
2675this thread may have to be adjusted accordingly.
2676
2677This IOCTL replaces the obsolete KVM_CREATE_PIT.
2678
2679
26804.72 KVM_GET_PIT2
2681-----------------
2682
2683:Capability: KVM_CAP_PIT_STATE2
2684:Architectures: x86
2685:Type: vm ioctl
2686:Parameters: struct kvm_pit_state2 (out)
2687:Returns: 0 on success, -1 on error
2688
2689Retrieves the state of the in-kernel PIT model. Only valid after
2690KVM_CREATE_PIT2. The state is returned in the following structure::
2691
2692  struct kvm_pit_state2 {
2693	struct kvm_pit_channel_state channels[3];
2694	__u32 flags;
2695	__u32 reserved[9];
2696  };
2697
2698Valid flags are::
2699
2700  /* disable PIT in HPET legacy mode */
2701  #define KVM_PIT_FLAGS_HPET_LEGACY  0x00000001
2702
2703This IOCTL replaces the obsolete KVM_GET_PIT.
2704
2705
27064.73 KVM_SET_PIT2
2707-----------------
2708
2709:Capability: KVM_CAP_PIT_STATE2
2710:Architectures: x86
2711:Type: vm ioctl
2712:Parameters: struct kvm_pit_state2 (in)
2713:Returns: 0 on success, -1 on error
2714
2715Sets the state of the in-kernel PIT model. Only valid after KVM_CREATE_PIT2.
2716See KVM_GET_PIT2 for details on struct kvm_pit_state2.
2717
2718This IOCTL replaces the obsolete KVM_SET_PIT.
2719
2720
27214.74 KVM_PPC_GET_SMMU_INFO
2722--------------------------
2723
2724:Capability: KVM_CAP_PPC_GET_SMMU_INFO
2725:Architectures: powerpc
2726:Type: vm ioctl
2727:Parameters: None
2728:Returns: 0 on success, -1 on error
2729
2730This populates and returns a structure describing the features of
2731the "Server" class MMU emulation supported by KVM.
2732This can in turn be used by userspace to generate the appropriate
2733device-tree properties for the guest operating system.
2734
2735The structure contains some global information, followed by an
2736array of supported segment page sizes::
2737
2738      struct kvm_ppc_smmu_info {
2739	     __u64 flags;
2740	     __u32 slb_size;
2741	     __u32 pad;
2742	     struct kvm_ppc_one_seg_page_size sps[KVM_PPC_PAGE_SIZES_MAX_SZ];
2743      };
2744
2745The supported flags are:
2746
2747    - KVM_PPC_PAGE_SIZES_REAL:
2748        When that flag is set, guest page sizes must "fit" the backing
2749        store page sizes. When not set, any page size in the list can
2750        be used regardless of how they are backed by userspace.
2751
2752    - KVM_PPC_1T_SEGMENTS
2753        The emulated MMU supports 1T segments in addition to the
2754        standard 256M ones.
2755
2756    - KVM_PPC_NO_HASH
2757	This flag indicates that HPT guests are not supported by KVM,
2758	thus all guests must use radix MMU mode.
2759
2760The "slb_size" field indicates how many SLB entries are supported
2761
2762The "sps" array contains 8 entries indicating the supported base
2763page sizes for a segment in increasing order. Each entry is defined
2764as follow::
2765
2766   struct kvm_ppc_one_seg_page_size {
2767	__u32 page_shift;	/* Base page shift of segment (or 0) */
2768	__u32 slb_enc;		/* SLB encoding for BookS */
2769	struct kvm_ppc_one_page_size enc[KVM_PPC_PAGE_SIZES_MAX_SZ];
2770   };
2771
2772An entry with a "page_shift" of 0 is unused. Because the array is
2773organized in increasing order, a lookup can stop when encoutering
2774such an entry.
2775
2776The "slb_enc" field provides the encoding to use in the SLB for the
2777page size. The bits are in positions such as the value can directly
2778be OR'ed into the "vsid" argument of the slbmte instruction.
2779
2780The "enc" array is a list which for each of those segment base page
2781size provides the list of supported actual page sizes (which can be
2782only larger or equal to the base page size), along with the
2783corresponding encoding in the hash PTE. Similarly, the array is
27848 entries sorted by increasing sizes and an entry with a "0" shift
2785is an empty entry and a terminator::
2786
2787   struct kvm_ppc_one_page_size {
2788	__u32 page_shift;	/* Page shift (or 0) */
2789	__u32 pte_enc;		/* Encoding in the HPTE (>>12) */
2790   };
2791
2792The "pte_enc" field provides a value that can OR'ed into the hash
2793PTE's RPN field (ie, it needs to be shifted left by 12 to OR it
2794into the hash PTE second double word).
2795
27964.75 KVM_IRQFD
2797--------------
2798
2799:Capability: KVM_CAP_IRQFD
2800:Architectures: x86 s390 arm arm64
2801:Type: vm ioctl
2802:Parameters: struct kvm_irqfd (in)
2803:Returns: 0 on success, -1 on error
2804
2805Allows setting an eventfd to directly trigger a guest interrupt.
2806kvm_irqfd.fd specifies the file descriptor to use as the eventfd and
2807kvm_irqfd.gsi specifies the irqchip pin toggled by this event.  When
2808an event is triggered on the eventfd, an interrupt is injected into
2809the guest using the specified gsi pin.  The irqfd is removed using
2810the KVM_IRQFD_FLAG_DEASSIGN flag, specifying both kvm_irqfd.fd
2811and kvm_irqfd.gsi.
2812
2813With KVM_CAP_IRQFD_RESAMPLE, KVM_IRQFD supports a de-assert and notify
2814mechanism allowing emulation of level-triggered, irqfd-based
2815interrupts.  When KVM_IRQFD_FLAG_RESAMPLE is set the user must pass an
2816additional eventfd in the kvm_irqfd.resamplefd field.  When operating
2817in resample mode, posting of an interrupt through kvm_irq.fd asserts
2818the specified gsi in the irqchip.  When the irqchip is resampled, such
2819as from an EOI, the gsi is de-asserted and the user is notified via
2820kvm_irqfd.resamplefd.  It is the user's responsibility to re-queue
2821the interrupt if the device making use of it still requires service.
2822Note that closing the resamplefd is not sufficient to disable the
2823irqfd.  The KVM_IRQFD_FLAG_RESAMPLE is only necessary on assignment
2824and need not be specified with KVM_IRQFD_FLAG_DEASSIGN.
2825
2826On arm/arm64, gsi routing being supported, the following can happen:
2827
2828- in case no routing entry is associated to this gsi, injection fails
2829- in case the gsi is associated to an irqchip routing entry,
2830  irqchip.pin + 32 corresponds to the injected SPI ID.
2831- in case the gsi is associated to an MSI routing entry, the MSI
2832  message and device ID are translated into an LPI (support restricted
2833  to GICv3 ITS in-kernel emulation).
2834
28354.76 KVM_PPC_ALLOCATE_HTAB
2836--------------------------
2837
2838:Capability: KVM_CAP_PPC_ALLOC_HTAB
2839:Architectures: powerpc
2840:Type: vm ioctl
2841:Parameters: Pointer to u32 containing hash table order (in/out)
2842:Returns: 0 on success, -1 on error
2843
2844This requests the host kernel to allocate an MMU hash table for a
2845guest using the PAPR paravirtualization interface.  This only does
2846anything if the kernel is configured to use the Book 3S HV style of
2847virtualization.  Otherwise the capability doesn't exist and the ioctl
2848returns an ENOTTY error.  The rest of this description assumes Book 3S
2849HV.
2850
2851There must be no vcpus running when this ioctl is called; if there
2852are, it will do nothing and return an EBUSY error.
2853
2854The parameter is a pointer to a 32-bit unsigned integer variable
2855containing the order (log base 2) of the desired size of the hash
2856table, which must be between 18 and 46.  On successful return from the
2857ioctl, the value will not be changed by the kernel.
2858
2859If no hash table has been allocated when any vcpu is asked to run
2860(with the KVM_RUN ioctl), the host kernel will allocate a
2861default-sized hash table (16 MB).
2862
2863If this ioctl is called when a hash table has already been allocated,
2864with a different order from the existing hash table, the existing hash
2865table will be freed and a new one allocated.  If this is ioctl is
2866called when a hash table has already been allocated of the same order
2867as specified, the kernel will clear out the existing hash table (zero
2868all HPTEs).  In either case, if the guest is using the virtualized
2869real-mode area (VRMA) facility, the kernel will re-create the VMRA
2870HPTEs on the next KVM_RUN of any vcpu.
2871
28724.77 KVM_S390_INTERRUPT
2873-----------------------
2874
2875:Capability: basic
2876:Architectures: s390
2877:Type: vm ioctl, vcpu ioctl
2878:Parameters: struct kvm_s390_interrupt (in)
2879:Returns: 0 on success, -1 on error
2880
2881Allows to inject an interrupt to the guest. Interrupts can be floating
2882(vm ioctl) or per cpu (vcpu ioctl), depending on the interrupt type.
2883
2884Interrupt parameters are passed via kvm_s390_interrupt::
2885
2886  struct kvm_s390_interrupt {
2887	__u32 type;
2888	__u32 parm;
2889	__u64 parm64;
2890  };
2891
2892type can be one of the following:
2893
2894KVM_S390_SIGP_STOP (vcpu)
2895    - sigp stop; optional flags in parm
2896KVM_S390_PROGRAM_INT (vcpu)
2897    - program check; code in parm
2898KVM_S390_SIGP_SET_PREFIX (vcpu)
2899    - sigp set prefix; prefix address in parm
2900KVM_S390_RESTART (vcpu)
2901    - restart
2902KVM_S390_INT_CLOCK_COMP (vcpu)
2903    - clock comparator interrupt
2904KVM_S390_INT_CPU_TIMER (vcpu)
2905    - CPU timer interrupt
2906KVM_S390_INT_VIRTIO (vm)
2907    - virtio external interrupt; external interrupt
2908      parameters in parm and parm64
2909KVM_S390_INT_SERVICE (vm)
2910    - sclp external interrupt; sclp parameter in parm
2911KVM_S390_INT_EMERGENCY (vcpu)
2912    - sigp emergency; source cpu in parm
2913KVM_S390_INT_EXTERNAL_CALL (vcpu)
2914    - sigp external call; source cpu in parm
2915KVM_S390_INT_IO(ai,cssid,ssid,schid) (vm)
2916    - compound value to indicate an
2917      I/O interrupt (ai - adapter interrupt; cssid,ssid,schid - subchannel);
2918      I/O interruption parameters in parm (subchannel) and parm64 (intparm,
2919      interruption subclass)
2920KVM_S390_MCHK (vm, vcpu)
2921    - machine check interrupt; cr 14 bits in parm, machine check interrupt
2922      code in parm64 (note that machine checks needing further payload are not
2923      supported by this ioctl)
2924
2925This is an asynchronous vcpu ioctl and can be invoked from any thread.
2926
29274.78 KVM_PPC_GET_HTAB_FD
2928------------------------
2929
2930:Capability: KVM_CAP_PPC_HTAB_FD
2931:Architectures: powerpc
2932:Type: vm ioctl
2933:Parameters: Pointer to struct kvm_get_htab_fd (in)
2934:Returns: file descriptor number (>= 0) on success, -1 on error
2935
2936This returns a file descriptor that can be used either to read out the
2937entries in the guest's hashed page table (HPT), or to write entries to
2938initialize the HPT.  The returned fd can only be written to if the
2939KVM_GET_HTAB_WRITE bit is set in the flags field of the argument, and
2940can only be read if that bit is clear.  The argument struct looks like
2941this::
2942
2943  /* For KVM_PPC_GET_HTAB_FD */
2944  struct kvm_get_htab_fd {
2945	__u64	flags;
2946	__u64	start_index;
2947	__u64	reserved[2];
2948  };
2949
2950  /* Values for kvm_get_htab_fd.flags */
2951  #define KVM_GET_HTAB_BOLTED_ONLY	((__u64)0x1)
2952  #define KVM_GET_HTAB_WRITE		((__u64)0x2)
2953
2954The 'start_index' field gives the index in the HPT of the entry at
2955which to start reading.  It is ignored when writing.
2956
2957Reads on the fd will initially supply information about all
2958"interesting" HPT entries.  Interesting entries are those with the
2959bolted bit set, if the KVM_GET_HTAB_BOLTED_ONLY bit is set, otherwise
2960all entries.  When the end of the HPT is reached, the read() will
2961return.  If read() is called again on the fd, it will start again from
2962the beginning of the HPT, but will only return HPT entries that have
2963changed since they were last read.
2964
2965Data read or written is structured as a header (8 bytes) followed by a
2966series of valid HPT entries (16 bytes) each.  The header indicates how
2967many valid HPT entries there are and how many invalid entries follow
2968the valid entries.  The invalid entries are not represented explicitly
2969in the stream.  The header format is::
2970
2971  struct kvm_get_htab_header {
2972	__u32	index;
2973	__u16	n_valid;
2974	__u16	n_invalid;
2975  };
2976
2977Writes to the fd create HPT entries starting at the index given in the
2978header; first 'n_valid' valid entries with contents from the data
2979written, then 'n_invalid' invalid entries, invalidating any previously
2980valid entries found.
2981
29824.79 KVM_CREATE_DEVICE
2983----------------------
2984
2985:Capability: KVM_CAP_DEVICE_CTRL
2986:Type: vm ioctl
2987:Parameters: struct kvm_create_device (in/out)
2988:Returns: 0 on success, -1 on error
2989
2990Errors:
2991
2992  ======  =======================================================
2993  ENODEV  The device type is unknown or unsupported
2994  EEXIST  Device already created, and this type of device may not
2995          be instantiated multiple times
2996  ======  =======================================================
2997
2998  Other error conditions may be defined by individual device types or
2999  have their standard meanings.
3000
3001Creates an emulated device in the kernel.  The file descriptor returned
3002in fd can be used with KVM_SET/GET/HAS_DEVICE_ATTR.
3003
3004If the KVM_CREATE_DEVICE_TEST flag is set, only test whether the
3005device type is supported (not necessarily whether it can be created
3006in the current vm).
3007
3008Individual devices should not define flags.  Attributes should be used
3009for specifying any behavior that is not implied by the device type
3010number.
3011
3012::
3013
3014  struct kvm_create_device {
3015	__u32	type;	/* in: KVM_DEV_TYPE_xxx */
3016	__u32	fd;	/* out: device handle */
3017	__u32	flags;	/* in: KVM_CREATE_DEVICE_xxx */
3018  };
3019
30204.80 KVM_SET_DEVICE_ATTR/KVM_GET_DEVICE_ATTR
3021--------------------------------------------
3022
3023:Capability: KVM_CAP_DEVICE_CTRL, KVM_CAP_VM_ATTRIBUTES for vm device,
3024             KVM_CAP_VCPU_ATTRIBUTES for vcpu device
3025:Type: device ioctl, vm ioctl, vcpu ioctl
3026:Parameters: struct kvm_device_attr
3027:Returns: 0 on success, -1 on error
3028
3029Errors:
3030
3031  =====   =============================================================
3032  ENXIO   The group or attribute is unknown/unsupported for this device
3033          or hardware support is missing.
3034  EPERM   The attribute cannot (currently) be accessed this way
3035          (e.g. read-only attribute, or attribute that only makes
3036          sense when the device is in a different state)
3037  =====   =============================================================
3038
3039  Other error conditions may be defined by individual device types.
3040
3041Gets/sets a specified piece of device configuration and/or state.  The
3042semantics are device-specific.  See individual device documentation in
3043the "devices" directory.  As with ONE_REG, the size of the data
3044transferred is defined by the particular attribute.
3045
3046::
3047
3048  struct kvm_device_attr {
3049	__u32	flags;		/* no flags currently defined */
3050	__u32	group;		/* device-defined */
3051	__u64	attr;		/* group-defined */
3052	__u64	addr;		/* userspace address of attr data */
3053  };
3054
30554.81 KVM_HAS_DEVICE_ATTR
3056------------------------
3057
3058:Capability: KVM_CAP_DEVICE_CTRL, KVM_CAP_VM_ATTRIBUTES for vm device,
3059	     KVM_CAP_VCPU_ATTRIBUTES for vcpu device
3060:Type: device ioctl, vm ioctl, vcpu ioctl
3061:Parameters: struct kvm_device_attr
3062:Returns: 0 on success, -1 on error
3063
3064Errors:
3065
3066  =====   =============================================================
3067  ENXIO   The group or attribute is unknown/unsupported for this device
3068          or hardware support is missing.
3069  =====   =============================================================
3070
3071Tests whether a device supports a particular attribute.  A successful
3072return indicates the attribute is implemented.  It does not necessarily
3073indicate that the attribute can be read or written in the device's
3074current state.  "addr" is ignored.
3075
30764.82 KVM_ARM_VCPU_INIT
3077----------------------
3078
3079:Capability: basic
3080:Architectures: arm, arm64
3081:Type: vcpu ioctl
3082:Parameters: struct kvm_vcpu_init (in)
3083:Returns: 0 on success; -1 on error
3084
3085Errors:
3086
3087  ======     =================================================================
3088  EINVAL     the target is unknown, or the combination of features is invalid.
3089  ENOENT     a features bit specified is unknown.
3090  ======     =================================================================
3091
3092This tells KVM what type of CPU to present to the guest, and what
3093optional features it should have.  This will cause a reset of the cpu
3094registers to their initial values.  If this is not called, KVM_RUN will
3095return ENOEXEC for that vcpu.
3096
3097Note that because some registers reflect machine topology, all vcpus
3098should be created before this ioctl is invoked.
3099
3100Userspace can call this function multiple times for a given vcpu, including
3101after the vcpu has been run. This will reset the vcpu to its initial
3102state. All calls to this function after the initial call must use the same
3103target and same set of feature flags, otherwise EINVAL will be returned.
3104
3105Possible features:
3106
3107	- KVM_ARM_VCPU_POWER_OFF: Starts the CPU in a power-off state.
3108	  Depends on KVM_CAP_ARM_PSCI.  If not set, the CPU will be powered on
3109	  and execute guest code when KVM_RUN is called.
3110	- KVM_ARM_VCPU_EL1_32BIT: Starts the CPU in a 32bit mode.
3111	  Depends on KVM_CAP_ARM_EL1_32BIT (arm64 only).
3112	- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 (or a future revision
3113          backward compatible with v0.2) for the CPU.
3114	  Depends on KVM_CAP_ARM_PSCI_0_2.
3115	- KVM_ARM_VCPU_PMU_V3: Emulate PMUv3 for the CPU.
3116	  Depends on KVM_CAP_ARM_PMU_V3.
3117
3118	- KVM_ARM_VCPU_PTRAUTH_ADDRESS: Enables Address Pointer authentication
3119	  for arm64 only.
3120	  Depends on KVM_CAP_ARM_PTRAUTH_ADDRESS.
3121	  If KVM_CAP_ARM_PTRAUTH_ADDRESS and KVM_CAP_ARM_PTRAUTH_GENERIC are
3122	  both present, then both KVM_ARM_VCPU_PTRAUTH_ADDRESS and
3123	  KVM_ARM_VCPU_PTRAUTH_GENERIC must be requested or neither must be
3124	  requested.
3125
3126	- KVM_ARM_VCPU_PTRAUTH_GENERIC: Enables Generic Pointer authentication
3127	  for arm64 only.
3128	  Depends on KVM_CAP_ARM_PTRAUTH_GENERIC.
3129	  If KVM_CAP_ARM_PTRAUTH_ADDRESS and KVM_CAP_ARM_PTRAUTH_GENERIC are
3130	  both present, then both KVM_ARM_VCPU_PTRAUTH_ADDRESS and
3131	  KVM_ARM_VCPU_PTRAUTH_GENERIC must be requested or neither must be
3132	  requested.
3133
3134	- KVM_ARM_VCPU_SVE: Enables SVE for the CPU (arm64 only).
3135	  Depends on KVM_CAP_ARM_SVE.
3136	  Requires KVM_ARM_VCPU_FINALIZE(KVM_ARM_VCPU_SVE):
3137
3138	   * After KVM_ARM_VCPU_INIT:
3139
3140	      - KVM_REG_ARM64_SVE_VLS may be read using KVM_GET_ONE_REG: the
3141	        initial value of this pseudo-register indicates the best set of
3142	        vector lengths possible for a vcpu on this host.
3143
3144	   * Before KVM_ARM_VCPU_FINALIZE(KVM_ARM_VCPU_SVE):
3145
3146	      - KVM_RUN and KVM_GET_REG_LIST are not available;
3147
3148	      - KVM_GET_ONE_REG and KVM_SET_ONE_REG cannot be used to access
3149	        the scalable archietctural SVE registers
3150	        KVM_REG_ARM64_SVE_ZREG(), KVM_REG_ARM64_SVE_PREG() or
3151	        KVM_REG_ARM64_SVE_FFR;
3152
3153	      - KVM_REG_ARM64_SVE_VLS may optionally be written using
3154	        KVM_SET_ONE_REG, to modify the set of vector lengths available
3155	        for the vcpu.
3156
3157	   * After KVM_ARM_VCPU_FINALIZE(KVM_ARM_VCPU_SVE):
3158
3159	      - the KVM_REG_ARM64_SVE_VLS pseudo-register is immutable, and can
3160	        no longer be written using KVM_SET_ONE_REG.
3161
31624.83 KVM_ARM_PREFERRED_TARGET
3163-----------------------------
3164
3165:Capability: basic
3166:Architectures: arm, arm64
3167:Type: vm ioctl
3168:Parameters: struct kvm_vcpu_init (out)
3169:Returns: 0 on success; -1 on error
3170
3171Errors:
3172
3173  ======     ==========================================
3174  ENODEV     no preferred target available for the host
3175  ======     ==========================================
3176
3177This queries KVM for preferred CPU target type which can be emulated
3178by KVM on underlying host.
3179
3180The ioctl returns struct kvm_vcpu_init instance containing information
3181about preferred CPU target type and recommended features for it.  The
3182kvm_vcpu_init->features bitmap returned will have feature bits set if
3183the preferred target recommends setting these features, but this is
3184not mandatory.
3185
3186The information returned by this ioctl can be used to prepare an instance
3187of struct kvm_vcpu_init for KVM_ARM_VCPU_INIT ioctl which will result in
3188VCPU matching underlying host.
3189
3190
31914.84 KVM_GET_REG_LIST
3192---------------------
3193
3194:Capability: basic
3195:Architectures: arm, arm64, mips
3196:Type: vcpu ioctl
3197:Parameters: struct kvm_reg_list (in/out)
3198:Returns: 0 on success; -1 on error
3199
3200Errors:
3201
3202  =====      ==============================================================
3203  E2BIG      the reg index list is too big to fit in the array specified by
3204             the user (the number required will be written into n).
3205  =====      ==============================================================
3206
3207::
3208
3209  struct kvm_reg_list {
3210	__u64 n; /* number of registers in reg[] */
3211	__u64 reg[0];
3212  };
3213
3214This ioctl returns the guest registers that are supported for the
3215KVM_GET_ONE_REG/KVM_SET_ONE_REG calls.
3216
3217
32184.85 KVM_ARM_SET_DEVICE_ADDR (deprecated)
3219-----------------------------------------
3220
3221:Capability: KVM_CAP_ARM_SET_DEVICE_ADDR
3222:Architectures: arm, arm64
3223:Type: vm ioctl
3224:Parameters: struct kvm_arm_device_address (in)
3225:Returns: 0 on success, -1 on error
3226
3227Errors:
3228
3229  ======  ============================================
3230  ENODEV  The device id is unknown
3231  ENXIO   Device not supported on current system
3232  EEXIST  Address already set
3233  E2BIG   Address outside guest physical address space
3234  EBUSY   Address overlaps with other device range
3235  ======  ============================================
3236
3237::
3238
3239  struct kvm_arm_device_addr {
3240	__u64 id;
3241	__u64 addr;
3242  };
3243
3244Specify a device address in the guest's physical address space where guests
3245can access emulated or directly exposed devices, which the host kernel needs
3246to know about. The id field is an architecture specific identifier for a
3247specific device.
3248
3249ARM/arm64 divides the id field into two parts, a device id and an
3250address type id specific to the individual device::
3251
3252  bits:  | 63        ...       32 | 31    ...    16 | 15    ...    0 |
3253  field: |        0x00000000      |     device id   |  addr type id  |
3254
3255ARM/arm64 currently only require this when using the in-kernel GIC
3256support for the hardware VGIC features, using KVM_ARM_DEVICE_VGIC_V2
3257as the device id.  When setting the base address for the guest's
3258mapping of the VGIC virtual CPU and distributor interface, the ioctl
3259must be called after calling KVM_CREATE_IRQCHIP, but before calling
3260KVM_RUN on any of the VCPUs.  Calling this ioctl twice for any of the
3261base addresses will return -EEXIST.
3262
3263Note, this IOCTL is deprecated and the more flexible SET/GET_DEVICE_ATTR API
3264should be used instead.
3265
3266
32674.86 KVM_PPC_RTAS_DEFINE_TOKEN
3268------------------------------
3269
3270:Capability: KVM_CAP_PPC_RTAS
3271:Architectures: ppc
3272:Type: vm ioctl
3273:Parameters: struct kvm_rtas_token_args
3274:Returns: 0 on success, -1 on error
3275
3276Defines a token value for a RTAS (Run Time Abstraction Services)
3277service in order to allow it to be handled in the kernel.  The
3278argument struct gives the name of the service, which must be the name
3279of a service that has a kernel-side implementation.  If the token
3280value is non-zero, it will be associated with that service, and
3281subsequent RTAS calls by the guest specifying that token will be
3282handled by the kernel.  If the token value is 0, then any token
3283associated with the service will be forgotten, and subsequent RTAS
3284calls by the guest for that service will be passed to userspace to be
3285handled.
3286
32874.87 KVM_SET_GUEST_DEBUG
3288------------------------
3289
3290:Capability: KVM_CAP_SET_GUEST_DEBUG
3291:Architectures: x86, s390, ppc, arm64
3292:Type: vcpu ioctl
3293:Parameters: struct kvm_guest_debug (in)
3294:Returns: 0 on success; -1 on error
3295
3296::
3297
3298  struct kvm_guest_debug {
3299       __u32 control;
3300       __u32 pad;
3301       struct kvm_guest_debug_arch arch;
3302  };
3303
3304Set up the processor specific debug registers and configure vcpu for
3305handling guest debug events. There are two parts to the structure, the
3306first a control bitfield indicates the type of debug events to handle
3307when running. Common control bits are:
3308
3309  - KVM_GUESTDBG_ENABLE:        guest debugging is enabled
3310  - KVM_GUESTDBG_SINGLESTEP:    the next run should single-step
3311
3312The top 16 bits of the control field are architecture specific control
3313flags which can include the following:
3314
3315  - KVM_GUESTDBG_USE_SW_BP:     using software breakpoints [x86, arm64]
3316  - KVM_GUESTDBG_USE_HW_BP:     using hardware breakpoints [x86, s390, arm64]
3317  - KVM_GUESTDBG_INJECT_DB:     inject DB type exception [x86]
3318  - KVM_GUESTDBG_INJECT_BP:     inject BP type exception [x86]
3319  - KVM_GUESTDBG_EXIT_PENDING:  trigger an immediate guest exit [s390]
3320
3321For example KVM_GUESTDBG_USE_SW_BP indicates that software breakpoints
3322are enabled in memory so we need to ensure breakpoint exceptions are
3323correctly trapped and the KVM run loop exits at the breakpoint and not
3324running off into the normal guest vector. For KVM_GUESTDBG_USE_HW_BP
3325we need to ensure the guest vCPUs architecture specific registers are
3326updated to the correct (supplied) values.
3327
3328The second part of the structure is architecture specific and
3329typically contains a set of debug registers.
3330
3331For arm64 the number of debug registers is implementation defined and
3332can be determined by querying the KVM_CAP_GUEST_DEBUG_HW_BPS and
3333KVM_CAP_GUEST_DEBUG_HW_WPS capabilities which return a positive number
3334indicating the number of supported registers.
3335
3336For ppc, the KVM_CAP_PPC_GUEST_DEBUG_SSTEP capability indicates whether
3337the single-step debug event (KVM_GUESTDBG_SINGLESTEP) is supported.
3338
3339When debug events exit the main run loop with the reason
3340KVM_EXIT_DEBUG with the kvm_debug_exit_arch part of the kvm_run
3341structure containing architecture specific debug information.
3342
33434.88 KVM_GET_EMULATED_CPUID
3344---------------------------
3345
3346:Capability: KVM_CAP_EXT_EMUL_CPUID
3347:Architectures: x86
3348:Type: system ioctl
3349:Parameters: struct kvm_cpuid2 (in/out)
3350:Returns: 0 on success, -1 on error
3351
3352::
3353
3354  struct kvm_cpuid2 {
3355	__u32 nent;
3356	__u32 flags;
3357	struct kvm_cpuid_entry2 entries[0];
3358  };
3359
3360The member 'flags' is used for passing flags from userspace.
3361
3362::
3363
3364  #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX		BIT(0)
3365  #define KVM_CPUID_FLAG_STATEFUL_FUNC		BIT(1) /* deprecated */
3366  #define KVM_CPUID_FLAG_STATE_READ_NEXT		BIT(2) /* deprecated */
3367
3368  struct kvm_cpuid_entry2 {
3369	__u32 function;
3370	__u32 index;
3371	__u32 flags;
3372	__u32 eax;
3373	__u32 ebx;
3374	__u32 ecx;
3375	__u32 edx;
3376	__u32 padding[3];
3377  };
3378
3379This ioctl returns x86 cpuid features which are emulated by
3380kvm.Userspace can use the information returned by this ioctl to query
3381which features are emulated by kvm instead of being present natively.
3382
3383Userspace invokes KVM_GET_EMULATED_CPUID by passing a kvm_cpuid2
3384structure with the 'nent' field indicating the number of entries in
3385the variable-size array 'entries'. If the number of entries is too low
3386to describe the cpu capabilities, an error (E2BIG) is returned. If the
3387number is too high, the 'nent' field is adjusted and an error (ENOMEM)
3388is returned. If the number is just right, the 'nent' field is adjusted
3389to the number of valid entries in the 'entries' array, which is then
3390filled.
3391
3392The entries returned are the set CPUID bits of the respective features
3393which kvm emulates, as returned by the CPUID instruction, with unknown
3394or unsupported feature bits cleared.
3395
3396Features like x2apic, for example, may not be present in the host cpu
3397but are exposed by kvm in KVM_GET_SUPPORTED_CPUID because they can be
3398emulated efficiently and thus not included here.
3399
3400The fields in each entry are defined as follows:
3401
3402  function:
3403	 the eax value used to obtain the entry
3404  index:
3405	 the ecx value used to obtain the entry (for entries that are
3406         affected by ecx)
3407  flags:
3408    an OR of zero or more of the following:
3409
3410        KVM_CPUID_FLAG_SIGNIFCANT_INDEX:
3411           if the index field is valid
3412
3413   eax, ebx, ecx, edx:
3414
3415         the values returned by the cpuid instruction for
3416         this function/index combination
3417
34184.89 KVM_S390_MEM_OP
3419--------------------
3420
3421:Capability: KVM_CAP_S390_MEM_OP
3422:Architectures: s390
3423:Type: vcpu ioctl
3424:Parameters: struct kvm_s390_mem_op (in)
3425:Returns: = 0 on success,
3426          < 0 on generic error (e.g. -EFAULT or -ENOMEM),
3427          > 0 if an exception occurred while walking the page tables
3428
3429Read or write data from/to the logical (virtual) memory of a VCPU.
3430
3431Parameters are specified via the following structure::
3432
3433  struct kvm_s390_mem_op {
3434	__u64 gaddr;		/* the guest address */
3435	__u64 flags;		/* flags */
3436	__u32 size;		/* amount of bytes */
3437	__u32 op;		/* type of operation */
3438	__u64 buf;		/* buffer in userspace */
3439	__u8 ar;		/* the access register number */
3440	__u8 reserved[31];	/* should be set to 0 */
3441  };
3442
3443The type of operation is specified in the "op" field. It is either
3444KVM_S390_MEMOP_LOGICAL_READ for reading from logical memory space or
3445KVM_S390_MEMOP_LOGICAL_WRITE for writing to logical memory space. The
3446KVM_S390_MEMOP_F_CHECK_ONLY flag can be set in the "flags" field to check
3447whether the corresponding memory access would create an access exception
3448(without touching the data in the memory at the destination). In case an
3449access exception occurred while walking the MMU tables of the guest, the
3450ioctl returns a positive error number to indicate the type of exception.
3451This exception is also raised directly at the corresponding VCPU if the
3452flag KVM_S390_MEMOP_F_INJECT_EXCEPTION is set in the "flags" field.
3453
3454The start address of the memory region has to be specified in the "gaddr"
3455field, and the length of the region in the "size" field (which must not
3456be 0). The maximum value for "size" can be obtained by checking the
3457KVM_CAP_S390_MEM_OP capability. "buf" is the buffer supplied by the
3458userspace application where the read data should be written to for
3459KVM_S390_MEMOP_LOGICAL_READ, or where the data that should be written is
3460stored for a KVM_S390_MEMOP_LOGICAL_WRITE. When KVM_S390_MEMOP_F_CHECK_ONLY
3461is specified, "buf" is unused and can be NULL. "ar" designates the access
3462register number to be used; the valid range is 0..15.
3463
3464The "reserved" field is meant for future extensions. It is not used by
3465KVM with the currently defined set of flags.
3466
34674.90 KVM_S390_GET_SKEYS
3468-----------------------
3469
3470:Capability: KVM_CAP_S390_SKEYS
3471:Architectures: s390
3472:Type: vm ioctl
3473:Parameters: struct kvm_s390_skeys
3474:Returns: 0 on success, KVM_S390_GET_KEYS_NONE if guest is not using storage
3475          keys, negative value on error
3476
3477This ioctl is used to get guest storage key values on the s390
3478architecture. The ioctl takes parameters via the kvm_s390_skeys struct::
3479
3480  struct kvm_s390_skeys {
3481	__u64 start_gfn;
3482	__u64 count;
3483	__u64 skeydata_addr;
3484	__u32 flags;
3485	__u32 reserved[9];
3486  };
3487
3488The start_gfn field is the number of the first guest frame whose storage keys
3489you want to get.
3490
3491The count field is the number of consecutive frames (starting from start_gfn)
3492whose storage keys to get. The count field must be at least 1 and the maximum
3493allowed value is defined as KVM_S390_SKEYS_ALLOC_MAX. Values outside this range
3494will cause the ioctl to return -EINVAL.
3495
3496The skeydata_addr field is the address to a buffer large enough to hold count
3497bytes. This buffer will be filled with storage key data by the ioctl.
3498
34994.91 KVM_S390_SET_SKEYS
3500-----------------------
3501
3502:Capability: KVM_CAP_S390_SKEYS
3503:Architectures: s390
3504:Type: vm ioctl
3505:Parameters: struct kvm_s390_skeys
3506:Returns: 0 on success, negative value on error
3507
3508This ioctl is used to set guest storage key values on the s390
3509architecture. The ioctl takes parameters via the kvm_s390_skeys struct.
3510See section on KVM_S390_GET_SKEYS for struct definition.
3511
3512The start_gfn field is the number of the first guest frame whose storage keys
3513you want to set.
3514
3515The count field is the number of consecutive frames (starting from start_gfn)
3516whose storage keys to get. The count field must be at least 1 and the maximum
3517allowed value is defined as KVM_S390_SKEYS_ALLOC_MAX. Values outside this range
3518will cause the ioctl to return -EINVAL.
3519
3520The skeydata_addr field is the address to a buffer containing count bytes of
3521storage keys. Each byte in the buffer will be set as the storage key for a
3522single frame starting at start_gfn for count frames.
3523
3524Note: If any architecturally invalid key value is found in the given data then
3525the ioctl will return -EINVAL.
3526
35274.92 KVM_S390_IRQ
3528-----------------
3529
3530:Capability: KVM_CAP_S390_INJECT_IRQ
3531:Architectures: s390
3532:Type: vcpu ioctl
3533:Parameters: struct kvm_s390_irq (in)
3534:Returns: 0 on success, -1 on error
3535
3536Errors:
3537
3538
3539  ======  =================================================================
3540  EINVAL  interrupt type is invalid
3541          type is KVM_S390_SIGP_STOP and flag parameter is invalid value,
3542          type is KVM_S390_INT_EXTERNAL_CALL and code is bigger
3543          than the maximum of VCPUs
3544  EBUSY   type is KVM_S390_SIGP_SET_PREFIX and vcpu is not stopped,
3545          type is KVM_S390_SIGP_STOP and a stop irq is already pending,
3546          type is KVM_S390_INT_EXTERNAL_CALL and an external call interrupt
3547          is already pending
3548  ======  =================================================================
3549
3550Allows to inject an interrupt to the guest.
3551
3552Using struct kvm_s390_irq as a parameter allows
3553to inject additional payload which is not
3554possible via KVM_S390_INTERRUPT.
3555
3556Interrupt parameters are passed via kvm_s390_irq::
3557
3558  struct kvm_s390_irq {
3559	__u64 type;
3560	union {
3561		struct kvm_s390_io_info io;
3562		struct kvm_s390_ext_info ext;
3563		struct kvm_s390_pgm_info pgm;
3564		struct kvm_s390_emerg_info emerg;
3565		struct kvm_s390_extcall_info extcall;
3566		struct kvm_s390_prefix_info prefix;
3567		struct kvm_s390_stop_info stop;
3568		struct kvm_s390_mchk_info mchk;
3569		char reserved[64];
3570	} u;
3571  };
3572
3573type can be one of the following:
3574
3575- KVM_S390_SIGP_STOP - sigp stop; parameter in .stop
3576- KVM_S390_PROGRAM_INT - program check; parameters in .pgm
3577- KVM_S390_SIGP_SET_PREFIX - sigp set prefix; parameters in .prefix
3578- KVM_S390_RESTART - restart; no parameters
3579- KVM_S390_INT_CLOCK_COMP - clock comparator interrupt; no parameters
3580- KVM_S390_INT_CPU_TIMER - CPU timer interrupt; no parameters
3581- KVM_S390_INT_EMERGENCY - sigp emergency; parameters in .emerg
3582- KVM_S390_INT_EXTERNAL_CALL - sigp external call; parameters in .extcall
3583- KVM_S390_MCHK - machine check interrupt; parameters in .mchk
3584
3585This is an asynchronous vcpu ioctl and can be invoked from any thread.
3586
35874.94 KVM_S390_GET_IRQ_STATE
3588---------------------------
3589
3590:Capability: KVM_CAP_S390_IRQ_STATE
3591:Architectures: s390
3592:Type: vcpu ioctl
3593:Parameters: struct kvm_s390_irq_state (out)
3594:Returns: >= number of bytes copied into buffer,
3595          -EINVAL if buffer size is 0,
3596          -ENOBUFS if buffer size is too small to fit all pending interrupts,
3597          -EFAULT if the buffer address was invalid
3598
3599This ioctl allows userspace to retrieve the complete state of all currently
3600pending interrupts in a single buffer. Use cases include migration
3601and introspection. The parameter structure contains the address of a
3602userspace buffer and its length::
3603
3604  struct kvm_s390_irq_state {
3605	__u64 buf;
3606	__u32 flags;        /* will stay unused for compatibility reasons */
3607	__u32 len;
3608	__u32 reserved[4];  /* will stay unused for compatibility reasons */
3609  };
3610
3611Userspace passes in the above struct and for each pending interrupt a
3612struct kvm_s390_irq is copied to the provided buffer.
3613
3614The structure contains a flags and a reserved field for future extensions. As
3615the kernel never checked for flags == 0 and QEMU never pre-zeroed flags and
3616reserved, these fields can not be used in the future without breaking
3617compatibility.
3618
3619If -ENOBUFS is returned the buffer provided was too small and userspace
3620may retry with a bigger buffer.
3621
36224.95 KVM_S390_SET_IRQ_STATE
3623---------------------------
3624
3625:Capability: KVM_CAP_S390_IRQ_STATE
3626:Architectures: s390
3627:Type: vcpu ioctl
3628:Parameters: struct kvm_s390_irq_state (in)
3629:Returns: 0 on success,
3630          -EFAULT if the buffer address was invalid,
3631          -EINVAL for an invalid buffer length (see below),
3632          -EBUSY if there were already interrupts pending,
3633          errors occurring when actually injecting the
3634          interrupt. See KVM_S390_IRQ.
3635
3636This ioctl allows userspace to set the complete state of all cpu-local
3637interrupts currently pending for the vcpu. It is intended for restoring
3638interrupt state after a migration. The input parameter is a userspace buffer
3639containing a struct kvm_s390_irq_state::
3640
3641  struct kvm_s390_irq_state {
3642	__u64 buf;
3643	__u32 flags;        /* will stay unused for compatibility reasons */
3644	__u32 len;
3645	__u32 reserved[4];  /* will stay unused for compatibility reasons */
3646  };
3647
3648The restrictions for flags and reserved apply as well.
3649(see KVM_S390_GET_IRQ_STATE)
3650
3651The userspace memory referenced by buf contains a struct kvm_s390_irq
3652for each interrupt to be injected into the guest.
3653If one of the interrupts could not be injected for some reason the
3654ioctl aborts.
3655
3656len must be a multiple of sizeof(struct kvm_s390_irq). It must be > 0
3657and it must not exceed (max_vcpus + 32) * sizeof(struct kvm_s390_irq),
3658which is the maximum number of possibly pending cpu-local interrupts.
3659
36604.96 KVM_SMI
3661------------
3662
3663:Capability: KVM_CAP_X86_SMM
3664:Architectures: x86
3665:Type: vcpu ioctl
3666:Parameters: none
3667:Returns: 0 on success, -1 on error
3668
3669Queues an SMI on the thread's vcpu.
3670
36714.97 KVM_CAP_PPC_MULTITCE
3672-------------------------
3673
3674:Capability: KVM_CAP_PPC_MULTITCE
3675:Architectures: ppc
3676:Type: vm
3677
3678This capability means the kernel is capable of handling hypercalls
3679H_PUT_TCE_INDIRECT and H_STUFF_TCE without passing those into the user
3680space. This significantly accelerates DMA operations for PPC KVM guests.
3681User space should expect that its handlers for these hypercalls
3682are not going to be called if user space previously registered LIOBN
3683in KVM (via KVM_CREATE_SPAPR_TCE or similar calls).
3684
3685In order to enable H_PUT_TCE_INDIRECT and H_STUFF_TCE use in the guest,
3686user space might have to advertise it for the guest. For example,
3687IBM pSeries (sPAPR) guest starts using them if "hcall-multi-tce" is
3688present in the "ibm,hypertas-functions" device-tree property.
3689
3690The hypercalls mentioned above may or may not be processed successfully
3691in the kernel based fast path. If they can not be handled by the kernel,
3692they will get passed on to user space. So user space still has to have
3693an implementation for these despite the in kernel acceleration.
3694
3695This capability is always enabled.
3696
36974.98 KVM_CREATE_SPAPR_TCE_64
3698----------------------------
3699
3700:Capability: KVM_CAP_SPAPR_TCE_64
3701:Architectures: powerpc
3702:Type: vm ioctl
3703:Parameters: struct kvm_create_spapr_tce_64 (in)
3704:Returns: file descriptor for manipulating the created TCE table
3705
3706This is an extension for KVM_CAP_SPAPR_TCE which only supports 32bit
3707windows, described in 4.62 KVM_CREATE_SPAPR_TCE
3708
3709This capability uses extended struct in ioctl interface::
3710
3711  /* for KVM_CAP_SPAPR_TCE_64 */
3712  struct kvm_create_spapr_tce_64 {
3713	__u64 liobn;
3714	__u32 page_shift;
3715	__u32 flags;
3716	__u64 offset;	/* in pages */
3717	__u64 size; 	/* in pages */
3718  };
3719
3720The aim of extension is to support an additional bigger DMA window with
3721a variable page size.
3722KVM_CREATE_SPAPR_TCE_64 receives a 64bit window size, an IOMMU page shift and
3723a bus offset of the corresponding DMA window, @size and @offset are numbers
3724of IOMMU pages.
3725
3726@flags are not used at the moment.
3727
3728The rest of functionality is identical to KVM_CREATE_SPAPR_TCE.
3729
37304.99 KVM_REINJECT_CONTROL
3731-------------------------
3732
3733:Capability: KVM_CAP_REINJECT_CONTROL
3734:Architectures: x86
3735:Type: vm ioctl
3736:Parameters: struct kvm_reinject_control (in)
3737:Returns: 0 on success,
3738         -EFAULT if struct kvm_reinject_control cannot be read,
3739         -ENXIO if KVM_CREATE_PIT or KVM_CREATE_PIT2 didn't succeed earlier.
3740
3741i8254 (PIT) has two modes, reinject and !reinject.  The default is reinject,
3742where KVM queues elapsed i8254 ticks and monitors completion of interrupt from
3743vector(s) that i8254 injects.  Reinject mode dequeues a tick and injects its
3744interrupt whenever there isn't a pending interrupt from i8254.
3745!reinject mode injects an interrupt as soon as a tick arrives.
3746
3747::
3748
3749  struct kvm_reinject_control {
3750	__u8 pit_reinject;
3751	__u8 reserved[31];
3752  };
3753
3754pit_reinject = 0 (!reinject mode) is recommended, unless running an old
3755operating system that uses the PIT for timing (e.g. Linux 2.4.x).
3756
37574.100 KVM_PPC_CONFIGURE_V3_MMU
3758------------------------------
3759
3760:Capability: KVM_CAP_PPC_RADIX_MMU or KVM_CAP_PPC_HASH_MMU_V3
3761:Architectures: ppc
3762:Type: vm ioctl
3763:Parameters: struct kvm_ppc_mmuv3_cfg (in)
3764:Returns: 0 on success,
3765         -EFAULT if struct kvm_ppc_mmuv3_cfg cannot be read,
3766         -EINVAL if the configuration is invalid
3767
3768This ioctl controls whether the guest will use radix or HPT (hashed
3769page table) translation, and sets the pointer to the process table for
3770the guest.
3771
3772::
3773
3774  struct kvm_ppc_mmuv3_cfg {
3775	__u64	flags;
3776	__u64	process_table;
3777  };
3778
3779There are two bits that can be set in flags; KVM_PPC_MMUV3_RADIX and
3780KVM_PPC_MMUV3_GTSE.  KVM_PPC_MMUV3_RADIX, if set, configures the guest
3781to use radix tree translation, and if clear, to use HPT translation.
3782KVM_PPC_MMUV3_GTSE, if set and if KVM permits it, configures the guest
3783to be able to use the global TLB and SLB invalidation instructions;
3784if clear, the guest may not use these instructions.
3785
3786The process_table field specifies the address and size of the guest
3787process table, which is in the guest's space.  This field is formatted
3788as the second doubleword of the partition table entry, as defined in
3789the Power ISA V3.00, Book III section 5.7.6.1.
3790
37914.101 KVM_PPC_GET_RMMU_INFO
3792---------------------------
3793
3794:Capability: KVM_CAP_PPC_RADIX_MMU
3795:Architectures: ppc
3796:Type: vm ioctl
3797:Parameters: struct kvm_ppc_rmmu_info (out)
3798:Returns: 0 on success,
3799	 -EFAULT if struct kvm_ppc_rmmu_info cannot be written,
3800	 -EINVAL if no useful information can be returned
3801
3802This ioctl returns a structure containing two things: (a) a list
3803containing supported radix tree geometries, and (b) a list that maps
3804page sizes to put in the "AP" (actual page size) field for the tlbie
3805(TLB invalidate entry) instruction.
3806
3807::
3808
3809  struct kvm_ppc_rmmu_info {
3810	struct kvm_ppc_radix_geom {
3811		__u8	page_shift;
3812		__u8	level_bits[4];
3813		__u8	pad[3];
3814	}	geometries[8];
3815	__u32	ap_encodings[8];
3816  };
3817
3818The geometries[] field gives up to 8 supported geometries for the
3819radix page table, in terms of the log base 2 of the smallest page
3820size, and the number of bits indexed at each level of the tree, from
3821the PTE level up to the PGD level in that order.  Any unused entries
3822will have 0 in the page_shift field.
3823
3824The ap_encodings gives the supported page sizes and their AP field
3825encodings, encoded with the AP value in the top 3 bits and the log
3826base 2 of the page size in the bottom 6 bits.
3827
38284.102 KVM_PPC_RESIZE_HPT_PREPARE
3829--------------------------------
3830
3831:Capability: KVM_CAP_SPAPR_RESIZE_HPT
3832:Architectures: powerpc
3833:Type: vm ioctl
3834:Parameters: struct kvm_ppc_resize_hpt (in)
3835:Returns: 0 on successful completion,
3836	 >0 if a new HPT is being prepared, the value is an estimated
3837         number of milliseconds until preparation is complete,
3838         -EFAULT if struct kvm_reinject_control cannot be read,
3839	 -EINVAL if the supplied shift or flags are invalid,
3840	 -ENOMEM if unable to allocate the new HPT,
3841	 -ENOSPC if there was a hash collision
3842
3843::
3844
3845  struct kvm_ppc_rmmu_info {
3846	struct kvm_ppc_radix_geom {
3847		__u8	page_shift;
3848		__u8	level_bits[4];
3849		__u8	pad[3];
3850	}	geometries[8];
3851	__u32	ap_encodings[8];
3852  };
3853
3854The geometries[] field gives up to 8 supported geometries for the
3855radix page table, in terms of the log base 2 of the smallest page
3856size, and the number of bits indexed at each level of the tree, from
3857the PTE level up to the PGD level in that order.  Any unused entries
3858will have 0 in the page_shift field.
3859
3860The ap_encodings gives the supported page sizes and their AP field
3861encodings, encoded with the AP value in the top 3 bits and the log
3862base 2 of the page size in the bottom 6 bits.
3863
38644.102 KVM_PPC_RESIZE_HPT_PREPARE
3865--------------------------------
3866
3867:Capability: KVM_CAP_SPAPR_RESIZE_HPT
3868:Architectures: powerpc
3869:Type: vm ioctl
3870:Parameters: struct kvm_ppc_resize_hpt (in)
3871:Returns: 0 on successful completion,
3872	 >0 if a new HPT is being prepared, the value is an estimated
3873         number of milliseconds until preparation is complete,
3874         -EFAULT if struct kvm_reinject_control cannot be read,
3875	 -EINVAL if the supplied shift or flags are invalid,when moving existing
3876         HPT entries to the new HPT,
3877	 -EIO on other error conditions
3878
3879Used to implement the PAPR extension for runtime resizing of a guest's
3880Hashed Page Table (HPT).  Specifically this starts, stops or monitors
3881the preparation of a new potential HPT for the guest, essentially
3882implementing the H_RESIZE_HPT_PREPARE hypercall.
3883
3884If called with shift > 0 when there is no pending HPT for the guest,
3885this begins preparation of a new pending HPT of size 2^(shift) bytes.
3886It then returns a positive integer with the estimated number of
3887milliseconds until preparation is complete.
3888
3889If called when there is a pending HPT whose size does not match that
3890requested in the parameters, discards the existing pending HPT and
3891creates a new one as above.
3892
3893If called when there is a pending HPT of the size requested, will:
3894
3895  * If preparation of the pending HPT is already complete, return 0
3896  * If preparation of the pending HPT has failed, return an error
3897    code, then discard the pending HPT.
3898  * If preparation of the pending HPT is still in progress, return an
3899    estimated number of milliseconds until preparation is complete.
3900
3901If called with shift == 0, discards any currently pending HPT and
3902returns 0 (i.e. cancels any in-progress preparation).
3903
3904flags is reserved for future expansion, currently setting any bits in
3905flags will result in an -EINVAL.
3906
3907Normally this will be called repeatedly with the same parameters until
3908it returns <= 0.  The first call will initiate preparation, subsequent
3909ones will monitor preparation until it completes or fails.
3910
3911::
3912
3913  struct kvm_ppc_resize_hpt {
3914	__u64 flags;
3915	__u32 shift;
3916	__u32 pad;
3917  };
3918
39194.103 KVM_PPC_RESIZE_HPT_COMMIT
3920-------------------------------
3921
3922:Capability: KVM_CAP_SPAPR_RESIZE_HPT
3923:Architectures: powerpc
3924:Type: vm ioctl
3925:Parameters: struct kvm_ppc_resize_hpt (in)
3926:Returns: 0 on successful completion,
3927         -EFAULT if struct kvm_reinject_control cannot be read,
3928	 -EINVAL if the supplied shift or flags are invalid,
3929	 -ENXIO is there is no pending HPT, or the pending HPT doesn't
3930         have the requested size,
3931	 -EBUSY if the pending HPT is not fully prepared,
3932	 -ENOSPC if there was a hash collision when moving existing
3933         HPT entries to the new HPT,
3934	 -EIO on other error conditions
3935
3936Used to implement the PAPR extension for runtime resizing of a guest's
3937Hashed Page Table (HPT).  Specifically this requests that the guest be
3938transferred to working with the new HPT, essentially implementing the
3939H_RESIZE_HPT_COMMIT hypercall.
3940
3941This should only be called after KVM_PPC_RESIZE_HPT_PREPARE has
3942returned 0 with the same parameters.  In other cases
3943KVM_PPC_RESIZE_HPT_COMMIT will return an error (usually -ENXIO or
3944-EBUSY, though others may be possible if the preparation was started,
3945but failed).
3946
3947This will have undefined effects on the guest if it has not already
3948placed itself in a quiescent state where no vcpu will make MMU enabled
3949memory accesses.
3950
3951On succsful completion, the pending HPT will become the guest's active
3952HPT and the previous HPT will be discarded.
3953
3954On failure, the guest will still be operating on its previous HPT.
3955
3956::
3957
3958  struct kvm_ppc_resize_hpt {
3959	__u64 flags;
3960	__u32 shift;
3961	__u32 pad;
3962  };
3963
39644.104 KVM_X86_GET_MCE_CAP_SUPPORTED
3965-----------------------------------
3966
3967:Capability: KVM_CAP_MCE
3968:Architectures: x86
3969:Type: system ioctl
3970:Parameters: u64 mce_cap (out)
3971:Returns: 0 on success, -1 on error
3972
3973Returns supported MCE capabilities. The u64 mce_cap parameter
3974has the same format as the MSR_IA32_MCG_CAP register. Supported
3975capabilities will have the corresponding bits set.
3976
39774.105 KVM_X86_SETUP_MCE
3978-----------------------
3979
3980:Capability: KVM_CAP_MCE
3981:Architectures: x86
3982:Type: vcpu ioctl
3983:Parameters: u64 mcg_cap (in)
3984:Returns: 0 on success,
3985         -EFAULT if u64 mcg_cap cannot be read,
3986         -EINVAL if the requested number of banks is invalid,
3987         -EINVAL if requested MCE capability is not supported.
3988
3989Initializes MCE support for use. The u64 mcg_cap parameter
3990has the same format as the MSR_IA32_MCG_CAP register and
3991specifies which capabilities should be enabled. The maximum
3992supported number of error-reporting banks can be retrieved when
3993checking for KVM_CAP_MCE. The supported capabilities can be
3994retrieved with KVM_X86_GET_MCE_CAP_SUPPORTED.
3995
39964.106 KVM_X86_SET_MCE
3997---------------------
3998
3999:Capability: KVM_CAP_MCE
4000:Architectures: x86
4001:Type: vcpu ioctl
4002:Parameters: struct kvm_x86_mce (in)
4003:Returns: 0 on success,
4004         -EFAULT if struct kvm_x86_mce cannot be read,
4005         -EINVAL if the bank number is invalid,
4006         -EINVAL if VAL bit is not set in status field.
4007
4008Inject a machine check error (MCE) into the guest. The input
4009parameter is::
4010
4011  struct kvm_x86_mce {
4012	__u64 status;
4013	__u64 addr;
4014	__u64 misc;
4015	__u64 mcg_status;
4016	__u8 bank;
4017	__u8 pad1[7];
4018	__u64 pad2[3];
4019  };
4020
4021If the MCE being reported is an uncorrected error, KVM will
4022inject it as an MCE exception into the guest. If the guest
4023MCG_STATUS register reports that an MCE is in progress, KVM
4024causes an KVM_EXIT_SHUTDOWN vmexit.
4025
4026Otherwise, if the MCE is a corrected error, KVM will just
4027store it in the corresponding bank (provided this bank is
4028not holding a previously reported uncorrected error).
4029
40304.107 KVM_S390_GET_CMMA_BITS
4031----------------------------
4032
4033:Capability: KVM_CAP_S390_CMMA_MIGRATION
4034:Architectures: s390
4035:Type: vm ioctl
4036:Parameters: struct kvm_s390_cmma_log (in, out)
4037:Returns: 0 on success, a negative value on error
4038
4039Errors:
4040
4041  ======     =============================================================
4042  ENOMEM     not enough memory can be allocated to complete the task
4043  ENXIO      if CMMA is not enabled
4044  EINVAL     if KVM_S390_CMMA_PEEK is not set but migration mode was not enabled
4045  EINVAL     if KVM_S390_CMMA_PEEK is not set but dirty tracking has been
4046             disabled (and thus migration mode was automatically disabled)
4047  EFAULT     if the userspace address is invalid or if no page table is
4048             present for the addresses (e.g. when using hugepages).
4049  ======     =============================================================
4050
4051This ioctl is used to get the values of the CMMA bits on the s390
4052architecture. It is meant to be used in two scenarios:
4053
4054- During live migration to save the CMMA values. Live migration needs
4055  to be enabled via the KVM_REQ_START_MIGRATION VM property.
4056- To non-destructively peek at the CMMA values, with the flag
4057  KVM_S390_CMMA_PEEK set.
4058
4059The ioctl takes parameters via the kvm_s390_cmma_log struct. The desired
4060values are written to a buffer whose location is indicated via the "values"
4061member in the kvm_s390_cmma_log struct.  The values in the input struct are
4062also updated as needed.
4063
4064Each CMMA value takes up one byte.
4065
4066::
4067
4068  struct kvm_s390_cmma_log {
4069	__u64 start_gfn;
4070	__u32 count;
4071	__u32 flags;
4072	union {
4073		__u64 remaining;
4074		__u64 mask;
4075	};
4076	__u64 values;
4077  };
4078
4079start_gfn is the number of the first guest frame whose CMMA values are
4080to be retrieved,
4081
4082count is the length of the buffer in bytes,
4083
4084values points to the buffer where the result will be written to.
4085
4086If count is greater than KVM_S390_SKEYS_MAX, then it is considered to be
4087KVM_S390_SKEYS_MAX. KVM_S390_SKEYS_MAX is re-used for consistency with
4088other ioctls.
4089
4090The result is written in the buffer pointed to by the field values, and
4091the values of the input parameter are updated as follows.
4092
4093Depending on the flags, different actions are performed. The only
4094supported flag so far is KVM_S390_CMMA_PEEK.
4095
4096The default behaviour if KVM_S390_CMMA_PEEK is not set is:
4097start_gfn will indicate the first page frame whose CMMA bits were dirty.
4098It is not necessarily the same as the one passed as input, as clean pages
4099are skipped.
4100
4101count will indicate the number of bytes actually written in the buffer.
4102It can (and very often will) be smaller than the input value, since the
4103buffer is only filled until 16 bytes of clean values are found (which
4104are then not copied in the buffer). Since a CMMA migration block needs
4105the base address and the length, for a total of 16 bytes, we will send
4106back some clean data if there is some dirty data afterwards, as long as
4107the size of the clean data does not exceed the size of the header. This
4108allows to minimize the amount of data to be saved or transferred over
4109the network at the expense of more roundtrips to userspace. The next
4110invocation of the ioctl will skip over all the clean values, saving
4111potentially more than just the 16 bytes we found.
4112
4113If KVM_S390_CMMA_PEEK is set:
4114the existing storage attributes are read even when not in migration
4115mode, and no other action is performed;
4116
4117the output start_gfn will be equal to the input start_gfn,
4118
4119the output count will be equal to the input count, except if the end of
4120memory has been reached.
4121
4122In both cases:
4123the field "remaining" will indicate the total number of dirty CMMA values
4124still remaining, or 0 if KVM_S390_CMMA_PEEK is set and migration mode is
4125not enabled.
4126
4127mask is unused.
4128
4129values points to the userspace buffer where the result will be stored.
4130
41314.108 KVM_S390_SET_CMMA_BITS
4132----------------------------
4133
4134:Capability: KVM_CAP_S390_CMMA_MIGRATION
4135:Architectures: s390
4136:Type: vm ioctl
4137:Parameters: struct kvm_s390_cmma_log (in)
4138:Returns: 0 on success, a negative value on error
4139
4140This ioctl is used to set the values of the CMMA bits on the s390
4141architecture. It is meant to be used during live migration to restore
4142the CMMA values, but there are no restrictions on its use.
4143The ioctl takes parameters via the kvm_s390_cmma_values struct.
4144Each CMMA value takes up one byte.
4145
4146::
4147
4148  struct kvm_s390_cmma_log {
4149	__u64 start_gfn;
4150	__u32 count;
4151	__u32 flags;
4152	union {
4153		__u64 remaining;
4154		__u64 mask;
4155 	};
4156	__u64 values;
4157  };
4158
4159start_gfn indicates the starting guest frame number,
4160
4161count indicates how many values are to be considered in the buffer,
4162
4163flags is not used and must be 0.
4164
4165mask indicates which PGSTE bits are to be considered.
4166
4167remaining is not used.
4168
4169values points to the buffer in userspace where to store the values.
4170
4171This ioctl can fail with -ENOMEM if not enough memory can be allocated to
4172complete the task, with -ENXIO if CMMA is not enabled, with -EINVAL if
4173the count field is too large (e.g. more than KVM_S390_CMMA_SIZE_MAX) or
4174if the flags field was not 0, with -EFAULT if the userspace address is
4175invalid, if invalid pages are written to (e.g. after the end of memory)
4176or if no page table is present for the addresses (e.g. when using
4177hugepages).
4178
41794.109 KVM_PPC_GET_CPU_CHAR
4180--------------------------
4181
4182:Capability: KVM_CAP_PPC_GET_CPU_CHAR
4183:Architectures: powerpc
4184:Type: vm ioctl
4185:Parameters: struct kvm_ppc_cpu_char (out)
4186:Returns: 0 on successful completion,
4187	 -EFAULT if struct kvm_ppc_cpu_char cannot be written
4188
4189This ioctl gives userspace information about certain characteristics
4190of the CPU relating to speculative execution of instructions and
4191possible information leakage resulting from speculative execution (see
4192CVE-2017-5715, CVE-2017-5753 and CVE-2017-5754).  The information is
4193returned in struct kvm_ppc_cpu_char, which looks like this::
4194
4195  struct kvm_ppc_cpu_char {
4196	__u64	character;		/* characteristics of the CPU */
4197	__u64	behaviour;		/* recommended software behaviour */
4198	__u64	character_mask;		/* valid bits in character */
4199	__u64	behaviour_mask;		/* valid bits in behaviour */
4200  };
4201
4202For extensibility, the character_mask and behaviour_mask fields
4203indicate which bits of character and behaviour have been filled in by
4204the kernel.  If the set of defined bits is extended in future then
4205userspace will be able to tell whether it is running on a kernel that
4206knows about the new bits.
4207
4208The character field describes attributes of the CPU which can help
4209with preventing inadvertent information disclosure - specifically,
4210whether there is an instruction to flash-invalidate the L1 data cache
4211(ori 30,30,0 or mtspr SPRN_TRIG2,rN), whether the L1 data cache is set
4212to a mode where entries can only be used by the thread that created
4213them, whether the bcctr[l] instruction prevents speculation, and
4214whether a speculation barrier instruction (ori 31,31,0) is provided.
4215
4216The behaviour field describes actions that software should take to
4217prevent inadvertent information disclosure, and thus describes which
4218vulnerabilities the hardware is subject to; specifically whether the
4219L1 data cache should be flushed when returning to user mode from the
4220kernel, and whether a speculation barrier should be placed between an
4221array bounds check and the array access.
4222
4223These fields use the same bit definitions as the new
4224H_GET_CPU_CHARACTERISTICS hypercall.
4225
42264.110 KVM_MEMORY_ENCRYPT_OP
4227---------------------------
4228
4229:Capability: basic
4230:Architectures: x86
4231:Type: vm
4232:Parameters: an opaque platform specific structure (in/out)
4233:Returns: 0 on success; -1 on error
4234
4235If the platform supports creating encrypted VMs then this ioctl can be used
4236for issuing platform-specific memory encryption commands to manage those
4237encrypted VMs.
4238
4239Currently, this ioctl is used for issuing Secure Encrypted Virtualization
4240(SEV) commands on AMD Processors. The SEV commands are defined in
4241Documentation/virt/kvm/amd-memory-encryption.rst.
4242
42434.111 KVM_MEMORY_ENCRYPT_REG_REGION
4244-----------------------------------
4245
4246:Capability: basic
4247:Architectures: x86
4248:Type: system
4249:Parameters: struct kvm_enc_region (in)
4250:Returns: 0 on success; -1 on error
4251
4252This ioctl can be used to register a guest memory region which may
4253contain encrypted data (e.g. guest RAM, SMRAM etc).
4254
4255It is used in the SEV-enabled guest. When encryption is enabled, a guest
4256memory region may contain encrypted data. The SEV memory encryption
4257engine uses a tweak such that two identical plaintext pages, each at
4258different locations will have differing ciphertexts. So swapping or
4259moving ciphertext of those pages will not result in plaintext being
4260swapped. So relocating (or migrating) physical backing pages for the SEV
4261guest will require some additional steps.
4262
4263Note: The current SEV key management spec does not provide commands to
4264swap or migrate (move) ciphertext pages. Hence, for now we pin the guest
4265memory region registered with the ioctl.
4266
42674.112 KVM_MEMORY_ENCRYPT_UNREG_REGION
4268-------------------------------------
4269
4270:Capability: basic
4271:Architectures: x86
4272:Type: system
4273:Parameters: struct kvm_enc_region (in)
4274:Returns: 0 on success; -1 on error
4275
4276This ioctl can be used to unregister the guest memory region registered
4277with KVM_MEMORY_ENCRYPT_REG_REGION ioctl above.
4278
42794.113 KVM_HYPERV_EVENTFD
4280------------------------
4281
4282:Capability: KVM_CAP_HYPERV_EVENTFD
4283:Architectures: x86
4284:Type: vm ioctl
4285:Parameters: struct kvm_hyperv_eventfd (in)
4286
4287This ioctl (un)registers an eventfd to receive notifications from the guest on
4288the specified Hyper-V connection id through the SIGNAL_EVENT hypercall, without
4289causing a user exit.  SIGNAL_EVENT hypercall with non-zero event flag number
4290(bits 24-31) still triggers a KVM_EXIT_HYPERV_HCALL user exit.
4291
4292::
4293
4294  struct kvm_hyperv_eventfd {
4295	__u32 conn_id;
4296	__s32 fd;
4297	__u32 flags;
4298	__u32 padding[3];
4299  };
4300
4301The conn_id field should fit within 24 bits::
4302
4303  #define KVM_HYPERV_CONN_ID_MASK		0x00ffffff
4304
4305The acceptable values for the flags field are::
4306
4307  #define KVM_HYPERV_EVENTFD_DEASSIGN	(1 << 0)
4308
4309:Returns: 0 on success,
4310 	  -EINVAL if conn_id or flags is outside the allowed range,
4311	  -ENOENT on deassign if the conn_id isn't registered,
4312	  -EEXIST on assign if the conn_id is already registered
4313
43144.114 KVM_GET_NESTED_STATE
4315--------------------------
4316
4317:Capability: KVM_CAP_NESTED_STATE
4318:Architectures: x86
4319:Type: vcpu ioctl
4320:Parameters: struct kvm_nested_state (in/out)
4321:Returns: 0 on success, -1 on error
4322
4323Errors:
4324
4325  =====      =============================================================
4326  E2BIG      the total state size exceeds the value of 'size' specified by
4327             the user; the size required will be written into size.
4328  =====      =============================================================
4329
4330::
4331
4332  struct kvm_nested_state {
4333	__u16 flags;
4334	__u16 format;
4335	__u32 size;
4336
4337	union {
4338		struct kvm_vmx_nested_state_hdr vmx;
4339		struct kvm_svm_nested_state_hdr svm;
4340
4341		/* Pad the header to 128 bytes.  */
4342		__u8 pad[120];
4343	} hdr;
4344
4345	union {
4346		struct kvm_vmx_nested_state_data vmx[0];
4347		struct kvm_svm_nested_state_data svm[0];
4348	} data;
4349  };
4350
4351  #define KVM_STATE_NESTED_GUEST_MODE		0x00000001
4352  #define KVM_STATE_NESTED_RUN_PENDING		0x00000002
4353  #define KVM_STATE_NESTED_EVMCS		0x00000004
4354
4355  #define KVM_STATE_NESTED_FORMAT_VMX		0
4356  #define KVM_STATE_NESTED_FORMAT_SVM		1
4357
4358  #define KVM_STATE_NESTED_VMX_VMCS_SIZE	0x1000
4359
4360  #define KVM_STATE_NESTED_VMX_SMM_GUEST_MODE	0x00000001
4361  #define KVM_STATE_NESTED_VMX_SMM_VMXON	0x00000002
4362
4363  #define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001
4364
4365  struct kvm_vmx_nested_state_hdr {
4366	__u64 vmxon_pa;
4367	__u64 vmcs12_pa;
4368
4369	struct {
4370		__u16 flags;
4371	} smm;
4372
4373	__u32 flags;
4374	__u64 preemption_timer_deadline;
4375  };
4376
4377  struct kvm_vmx_nested_state_data {
4378	__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
4379	__u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
4380  };
4381
4382This ioctl copies the vcpu's nested virtualization state from the kernel to
4383userspace.
4384
4385The maximum size of the state can be retrieved by passing KVM_CAP_NESTED_STATE
4386to the KVM_CHECK_EXTENSION ioctl().
4387
43884.115 KVM_SET_NESTED_STATE
4389--------------------------
4390
4391:Capability: KVM_CAP_NESTED_STATE
4392:Architectures: x86
4393:Type: vcpu ioctl
4394:Parameters: struct kvm_nested_state (in)
4395:Returns: 0 on success, -1 on error
4396
4397This copies the vcpu's kvm_nested_state struct from userspace to the kernel.
4398For the definition of struct kvm_nested_state, see KVM_GET_NESTED_STATE.
4399
44004.116 KVM_(UN)REGISTER_COALESCED_MMIO
4401-------------------------------------
4402
4403:Capability: KVM_CAP_COALESCED_MMIO (for coalesced mmio)
4404	     KVM_CAP_COALESCED_PIO (for coalesced pio)
4405:Architectures: all
4406:Type: vm ioctl
4407:Parameters: struct kvm_coalesced_mmio_zone
4408:Returns: 0 on success, < 0 on error
4409
4410Coalesced I/O is a performance optimization that defers hardware
4411register write emulation so that userspace exits are avoided.  It is
4412typically used to reduce the overhead of emulating frequently accessed
4413hardware registers.
4414
4415When a hardware register is configured for coalesced I/O, write accesses
4416do not exit to userspace and their value is recorded in a ring buffer
4417that is shared between kernel and userspace.
4418
4419Coalesced I/O is used if one or more write accesses to a hardware
4420register can be deferred until a read or a write to another hardware
4421register on the same device.  This last access will cause a vmexit and
4422userspace will process accesses from the ring buffer before emulating
4423it. That will avoid exiting to userspace on repeated writes.
4424
4425Coalesced pio is based on coalesced mmio. There is little difference
4426between coalesced mmio and pio except that coalesced pio records accesses
4427to I/O ports.
4428
44294.117 KVM_CLEAR_DIRTY_LOG (vm ioctl)
4430------------------------------------
4431
4432:Capability: KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2
4433:Architectures: x86, arm, arm64, mips
4434:Type: vm ioctl
4435:Parameters: struct kvm_dirty_log (in)
4436:Returns: 0 on success, -1 on error
4437
4438::
4439
4440  /* for KVM_CLEAR_DIRTY_LOG */
4441  struct kvm_clear_dirty_log {
4442	__u32 slot;
4443	__u32 num_pages;
4444	__u64 first_page;
4445	union {
4446		void __user *dirty_bitmap; /* one bit per page */
4447		__u64 padding;
4448	};
4449  };
4450
4451The ioctl clears the dirty status of pages in a memory slot, according to
4452the bitmap that is passed in struct kvm_clear_dirty_log's dirty_bitmap
4453field.  Bit 0 of the bitmap corresponds to page "first_page" in the
4454memory slot, and num_pages is the size in bits of the input bitmap.
4455first_page must be a multiple of 64; num_pages must also be a multiple of
445664 unless first_page + num_pages is the size of the memory slot.  For each
4457bit that is set in the input bitmap, the corresponding page is marked "clean"
4458in KVM's dirty bitmap, and dirty tracking is re-enabled for that page
4459(for example via write-protection, or by clearing the dirty bit in
4460a page table entry).
4461
4462If KVM_CAP_MULTI_ADDRESS_SPACE is available, bits 16-31 specifies
4463the address space for which you want to return the dirty bitmap.
4464They must be less than the value that KVM_CHECK_EXTENSION returns for
4465the KVM_CAP_MULTI_ADDRESS_SPACE capability.
4466
4467This ioctl is mostly useful when KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2
4468is enabled; for more information, see the description of the capability.
4469However, it can always be used as long as KVM_CHECK_EXTENSION confirms
4470that KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 is present.
4471
44724.118 KVM_GET_SUPPORTED_HV_CPUID
4473--------------------------------
4474
4475:Capability: KVM_CAP_HYPERV_CPUID
4476:Architectures: x86
4477:Type: vcpu ioctl
4478:Parameters: struct kvm_cpuid2 (in/out)
4479:Returns: 0 on success, -1 on error
4480
4481::
4482
4483  struct kvm_cpuid2 {
4484	__u32 nent;
4485	__u32 padding;
4486	struct kvm_cpuid_entry2 entries[0];
4487  };
4488
4489  struct kvm_cpuid_entry2 {
4490	__u32 function;
4491	__u32 index;
4492	__u32 flags;
4493	__u32 eax;
4494	__u32 ebx;
4495	__u32 ecx;
4496	__u32 edx;
4497	__u32 padding[3];
4498  };
4499
4500This ioctl returns x86 cpuid features leaves related to Hyper-V emulation in
4501KVM.  Userspace can use the information returned by this ioctl to construct
4502cpuid information presented to guests consuming Hyper-V enlightenments (e.g.
4503Windows or Hyper-V guests).
4504
4505CPUID feature leaves returned by this ioctl are defined by Hyper-V Top Level
4506Functional Specification (TLFS). These leaves can't be obtained with
4507KVM_GET_SUPPORTED_CPUID ioctl because some of them intersect with KVM feature
4508leaves (0x40000000, 0x40000001).
4509
4510Currently, the following list of CPUID leaves are returned:
4511 - HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS
4512 - HYPERV_CPUID_INTERFACE
4513 - HYPERV_CPUID_VERSION
4514 - HYPERV_CPUID_FEATURES
4515 - HYPERV_CPUID_ENLIGHTMENT_INFO
4516 - HYPERV_CPUID_IMPLEMENT_LIMITS
4517 - HYPERV_CPUID_NESTED_FEATURES
4518 - HYPERV_CPUID_SYNDBG_VENDOR_AND_MAX_FUNCTIONS
4519 - HYPERV_CPUID_SYNDBG_INTERFACE
4520 - HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES
4521
4522HYPERV_CPUID_NESTED_FEATURES leaf is only exposed when Enlightened VMCS was
4523enabled on the corresponding vCPU (KVM_CAP_HYPERV_ENLIGHTENED_VMCS).
4524
4525Userspace invokes KVM_GET_SUPPORTED_HV_CPUID by passing a kvm_cpuid2 structure
4526with the 'nent' field indicating the number of entries in the variable-size
4527array 'entries'.  If the number of entries is too low to describe all Hyper-V
4528feature leaves, an error (E2BIG) is returned. If the number is more or equal
4529to the number of Hyper-V feature leaves, the 'nent' field is adjusted to the
4530number of valid entries in the 'entries' array, which is then filled.
4531
4532'index' and 'flags' fields in 'struct kvm_cpuid_entry2' are currently reserved,
4533userspace should not expect to get any particular value there.
4534
45354.119 KVM_ARM_VCPU_FINALIZE
4536---------------------------
4537
4538:Architectures: arm, arm64
4539:Type: vcpu ioctl
4540:Parameters: int feature (in)
4541:Returns: 0 on success, -1 on error
4542
4543Errors:
4544
4545  ======     ==============================================================
4546  EPERM      feature not enabled, needs configuration, or already finalized
4547  EINVAL     feature unknown or not present
4548  ======     ==============================================================
4549
4550Recognised values for feature:
4551
4552  =====      ===========================================
4553  arm64      KVM_ARM_VCPU_SVE (requires KVM_CAP_ARM_SVE)
4554  =====      ===========================================
4555
4556Finalizes the configuration of the specified vcpu feature.
4557
4558The vcpu must already have been initialised, enabling the affected feature, by
4559means of a successful KVM_ARM_VCPU_INIT call with the appropriate flag set in
4560features[].
4561
4562For affected vcpu features, this is a mandatory step that must be performed
4563before the vcpu is fully usable.
4564
4565Between KVM_ARM_VCPU_INIT and KVM_ARM_VCPU_FINALIZE, the feature may be
4566configured by use of ioctls such as KVM_SET_ONE_REG.  The exact configuration
4567that should be performaned and how to do it are feature-dependent.
4568
4569Other calls that depend on a particular feature being finalized, such as
4570KVM_RUN, KVM_GET_REG_LIST, KVM_GET_ONE_REG and KVM_SET_ONE_REG, will fail with
4571-EPERM unless the feature has already been finalized by means of a
4572KVM_ARM_VCPU_FINALIZE call.
4573
4574See KVM_ARM_VCPU_INIT for details of vcpu features that require finalization
4575using this ioctl.
4576
45774.120 KVM_SET_PMU_EVENT_FILTER
4578------------------------------
4579
4580:Capability: KVM_CAP_PMU_EVENT_FILTER
4581:Architectures: x86
4582:Type: vm ioctl
4583:Parameters: struct kvm_pmu_event_filter (in)
4584:Returns: 0 on success, -1 on error
4585
4586::
4587
4588  struct kvm_pmu_event_filter {
4589	__u32 action;
4590	__u32 nevents;
4591	__u32 fixed_counter_bitmap;
4592	__u32 flags;
4593	__u32 pad[4];
4594	__u64 events[0];
4595  };
4596
4597This ioctl restricts the set of PMU events that the guest can program.
4598The argument holds a list of events which will be allowed or denied.
4599The eventsel+umask of each event the guest attempts to program is compared
4600against the events field to determine whether the guest should have access.
4601The events field only controls general purpose counters; fixed purpose
4602counters are controlled by the fixed_counter_bitmap.
4603
4604No flags are defined yet, the field must be zero.
4605
4606Valid values for 'action'::
4607
4608  #define KVM_PMU_EVENT_ALLOW 0
4609  #define KVM_PMU_EVENT_DENY 1
4610
46114.121 KVM_PPC_SVM_OFF
4612---------------------
4613
4614:Capability: basic
4615:Architectures: powerpc
4616:Type: vm ioctl
4617:Parameters: none
4618:Returns: 0 on successful completion,
4619
4620Errors:
4621
4622  ======     ================================================================
4623  EINVAL     if ultravisor failed to terminate the secure guest
4624  ENOMEM     if hypervisor failed to allocate new radix page tables for guest
4625  ======     ================================================================
4626
4627This ioctl is used to turn off the secure mode of the guest or transition
4628the guest from secure mode to normal mode. This is invoked when the guest
4629is reset. This has no effect if called for a normal guest.
4630
4631This ioctl issues an ultravisor call to terminate the secure guest,
4632unpins the VPA pages and releases all the device pages that are used to
4633track the secure pages by hypervisor.
4634
46354.122 KVM_S390_NORMAL_RESET
4636---------------------------
4637
4638:Capability: KVM_CAP_S390_VCPU_RESETS
4639:Architectures: s390
4640:Type: vcpu ioctl
4641:Parameters: none
4642:Returns: 0
4643
4644This ioctl resets VCPU registers and control structures according to
4645the cpu reset definition in the POP (Principles Of Operation).
4646
46474.123 KVM_S390_INITIAL_RESET
4648----------------------------
4649
4650:Capability: none
4651:Architectures: s390
4652:Type: vcpu ioctl
4653:Parameters: none
4654:Returns: 0
4655
4656This ioctl resets VCPU registers and control structures according to
4657the initial cpu reset definition in the POP. However, the cpu is not
4658put into ESA mode. This reset is a superset of the normal reset.
4659
46604.124 KVM_S390_CLEAR_RESET
4661--------------------------
4662
4663:Capability: KVM_CAP_S390_VCPU_RESETS
4664:Architectures: s390
4665:Type: vcpu ioctl
4666:Parameters: none
4667:Returns: 0
4668
4669This ioctl resets VCPU registers and control structures according to
4670the clear cpu reset definition in the POP. However, the cpu is not put
4671into ESA mode. This reset is a superset of the initial reset.
4672
4673
46744.125 KVM_S390_PV_COMMAND
4675-------------------------
4676
4677:Capability: KVM_CAP_S390_PROTECTED
4678:Architectures: s390
4679:Type: vm ioctl
4680:Parameters: struct kvm_pv_cmd
4681:Returns: 0 on success, < 0 on error
4682
4683::
4684
4685  struct kvm_pv_cmd {
4686	__u32 cmd;	/* Command to be executed */
4687	__u16 rc;	/* Ultravisor return code */
4688	__u16 rrc;	/* Ultravisor return reason code */
4689	__u64 data;	/* Data or address */
4690	__u32 flags;    /* flags for future extensions. Must be 0 for now */
4691	__u32 reserved[3];
4692  };
4693
4694cmd values:
4695
4696KVM_PV_ENABLE
4697  Allocate memory and register the VM with the Ultravisor, thereby
4698  donating memory to the Ultravisor that will become inaccessible to
4699  KVM. All existing CPUs are converted to protected ones. After this
4700  command has succeeded, any CPU added via hotplug will become
4701  protected during its creation as well.
4702
4703  Errors:
4704
4705  =====      =============================
4706  EINTR      an unmasked signal is pending
4707  =====      =============================
4708
4709KVM_PV_DISABLE
4710
4711  Deregister the VM from the Ultravisor and reclaim the memory that
4712  had been donated to the Ultravisor, making it usable by the kernel
4713  again.  All registered VCPUs are converted back to non-protected
4714  ones.
4715
4716KVM_PV_VM_SET_SEC_PARMS
4717  Pass the image header from VM memory to the Ultravisor in
4718  preparation of image unpacking and verification.
4719
4720KVM_PV_VM_UNPACK
4721  Unpack (protect and decrypt) a page of the encrypted boot image.
4722
4723KVM_PV_VM_VERIFY
4724  Verify the integrity of the unpacked image. Only if this succeeds,
4725  KVM is allowed to start protected VCPUs.
4726
47274.126 KVM_X86_SET_MSR_FILTER
4728----------------------------
4729
4730:Capability: KVM_X86_SET_MSR_FILTER
4731:Architectures: x86
4732:Type: vm ioctl
4733:Parameters: struct kvm_msr_filter
4734:Returns: 0 on success, < 0 on error
4735
4736::
4737
4738  struct kvm_msr_filter_range {
4739  #define KVM_MSR_FILTER_READ  (1 << 0)
4740  #define KVM_MSR_FILTER_WRITE (1 << 1)
4741	__u32 flags;
4742	__u32 nmsrs; /* number of msrs in bitmap */
4743	__u32 base;  /* MSR index the bitmap starts at */
4744	__u8 *bitmap; /* a 1 bit allows the operations in flags, 0 denies */
4745  };
4746
4747  #define KVM_MSR_FILTER_MAX_RANGES 16
4748  struct kvm_msr_filter {
4749  #define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0)
4750  #define KVM_MSR_FILTER_DEFAULT_DENY  (1 << 0)
4751	__u32 flags;
4752	struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES];
4753  };
4754
4755flags values for ``struct kvm_msr_filter_range``:
4756
4757``KVM_MSR_FILTER_READ``
4758
4759  Filter read accesses to MSRs using the given bitmap. A 0 in the bitmap
4760  indicates that a read should immediately fail, while a 1 indicates that
4761  a read for a particular MSR should be handled regardless of the default
4762  filter action.
4763
4764``KVM_MSR_FILTER_WRITE``
4765
4766  Filter write accesses to MSRs using the given bitmap. A 0 in the bitmap
4767  indicates that a write should immediately fail, while a 1 indicates that
4768  a write for a particular MSR should be handled regardless of the default
4769  filter action.
4770
4771``KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE``
4772
4773  Filter both read and write accesses to MSRs using the given bitmap. A 0
4774  in the bitmap indicates that both reads and writes should immediately fail,
4775  while a 1 indicates that reads and writes for a particular MSR are not
4776  filtered by this range.
4777
4778flags values for ``struct kvm_msr_filter``:
4779
4780``KVM_MSR_FILTER_DEFAULT_ALLOW``
4781
4782  If no filter range matches an MSR index that is getting accessed, KVM will
4783  fall back to allowing access to the MSR.
4784
4785``KVM_MSR_FILTER_DEFAULT_DENY``
4786
4787  If no filter range matches an MSR index that is getting accessed, KVM will
4788  fall back to rejecting access to the MSR. In this mode, all MSRs that should
4789  be processed by KVM need to explicitly be marked as allowed in the bitmaps.
4790
4791This ioctl allows user space to define up to 16 bitmaps of MSR ranges to
4792specify whether a certain MSR access should be explicitly filtered for or not.
4793
4794If this ioctl has never been invoked, MSR accesses are not guarded and the
4795default KVM in-kernel emulation behavior is fully preserved.
4796
4797Calling this ioctl with an empty set of ranges (all nmsrs == 0) disables MSR
4798filtering. In that mode, ``KVM_MSR_FILTER_DEFAULT_DENY`` is invalid and causes
4799an error.
4800
4801As soon as the filtering is in place, every MSR access is processed through
4802the filtering except for accesses to the x2APIC MSRs (from 0x800 to 0x8ff);
4803x2APIC MSRs are always allowed, independent of the ``default_allow`` setting,
4804and their behavior depends on the ``X2APIC_ENABLE`` bit of the APIC base
4805register.
4806
4807If a bit is within one of the defined ranges, read and write accesses are
4808guarded by the bitmap's value for the MSR index if the kind of access
4809is included in the ``struct kvm_msr_filter_range`` flags.  If no range
4810cover this particular access, the behavior is determined by the flags
4811field in the kvm_msr_filter struct: ``KVM_MSR_FILTER_DEFAULT_ALLOW``
4812and ``KVM_MSR_FILTER_DEFAULT_DENY``.
4813
4814Each bitmap range specifies a range of MSRs to potentially allow access on.
4815The range goes from MSR index [base .. base+nmsrs]. The flags field
4816indicates whether reads, writes or both reads and writes are filtered
4817by setting a 1 bit in the bitmap for the corresponding MSR index.
4818
4819If an MSR access is not permitted through the filtering, it generates a
4820#GP inside the guest. When combined with KVM_CAP_X86_USER_SPACE_MSR, that
4821allows user space to deflect and potentially handle various MSR accesses
4822into user space.
4823
4824Note, invoking this ioctl with a vCPU is running is inherently racy.  However,
4825KVM does guarantee that vCPUs will see either the previous filter or the new
4826filter, e.g. MSRs with identical settings in both the old and new filter will
4827have deterministic behavior.
4828
4829
48305. The kvm_run structure
4831========================
4832
4833Application code obtains a pointer to the kvm_run structure by
4834mmap()ing a vcpu fd.  From that point, application code can control
4835execution by changing fields in kvm_run prior to calling the KVM_RUN
4836ioctl, and obtain information about the reason KVM_RUN returned by
4837looking up structure members.
4838
4839::
4840
4841  struct kvm_run {
4842	/* in */
4843	__u8 request_interrupt_window;
4844
4845Request that KVM_RUN return when it becomes possible to inject external
4846interrupts into the guest.  Useful in conjunction with KVM_INTERRUPT.
4847
4848::
4849
4850	__u8 immediate_exit;
4851
4852This field is polled once when KVM_RUN starts; if non-zero, KVM_RUN
4853exits immediately, returning -EINTR.  In the common scenario where a
4854signal is used to "kick" a VCPU out of KVM_RUN, this field can be used
4855to avoid usage of KVM_SET_SIGNAL_MASK, which has worse scalability.
4856Rather than blocking the signal outside KVM_RUN, userspace can set up
4857a signal handler that sets run->immediate_exit to a non-zero value.
4858
4859This field is ignored if KVM_CAP_IMMEDIATE_EXIT is not available.
4860
4861::
4862
4863	__u8 padding1[6];
4864
4865	/* out */
4866	__u32 exit_reason;
4867
4868When KVM_RUN has returned successfully (return value 0), this informs
4869application code why KVM_RUN has returned.  Allowable values for this
4870field are detailed below.
4871
4872::
4873
4874	__u8 ready_for_interrupt_injection;
4875
4876If request_interrupt_window has been specified, this field indicates
4877an interrupt can be injected now with KVM_INTERRUPT.
4878
4879::
4880
4881	__u8 if_flag;
4882
4883The value of the current interrupt flag.  Only valid if in-kernel
4884local APIC is not used.
4885
4886::
4887
4888	__u16 flags;
4889
4890More architecture-specific flags detailing state of the VCPU that may
4891affect the device's behavior.  The only currently defined flag is
4892KVM_RUN_X86_SMM, which is valid on x86 machines and is set if the
4893VCPU is in system management mode.
4894
4895::
4896
4897	/* in (pre_kvm_run), out (post_kvm_run) */
4898	__u64 cr8;
4899
4900The value of the cr8 register.  Only valid if in-kernel local APIC is
4901not used.  Both input and output.
4902
4903::
4904
4905	__u64 apic_base;
4906
4907The value of the APIC BASE msr.  Only valid if in-kernel local
4908APIC is not used.  Both input and output.
4909
4910::
4911
4912	union {
4913		/* KVM_EXIT_UNKNOWN */
4914		struct {
4915			__u64 hardware_exit_reason;
4916		} hw;
4917
4918If exit_reason is KVM_EXIT_UNKNOWN, the vcpu has exited due to unknown
4919reasons.  Further architecture-specific information is available in
4920hardware_exit_reason.
4921
4922::
4923
4924		/* KVM_EXIT_FAIL_ENTRY */
4925		struct {
4926			__u64 hardware_entry_failure_reason;
4927			__u32 cpu; /* if KVM_LAST_CPU */
4928		} fail_entry;
4929
4930If exit_reason is KVM_EXIT_FAIL_ENTRY, the vcpu could not be run due
4931to unknown reasons.  Further architecture-specific information is
4932available in hardware_entry_failure_reason.
4933
4934::
4935
4936		/* KVM_EXIT_EXCEPTION */
4937		struct {
4938			__u32 exception;
4939			__u32 error_code;
4940		} ex;
4941
4942Unused.
4943
4944::
4945
4946		/* KVM_EXIT_IO */
4947		struct {
4948  #define KVM_EXIT_IO_IN  0
4949  #define KVM_EXIT_IO_OUT 1
4950			__u8 direction;
4951			__u8 size; /* bytes */
4952			__u16 port;
4953			__u32 count;
4954			__u64 data_offset; /* relative to kvm_run start */
4955		} io;
4956
4957If exit_reason is KVM_EXIT_IO, then the vcpu has
4958executed a port I/O instruction which could not be satisfied by kvm.
4959data_offset describes where the data is located (KVM_EXIT_IO_OUT) or
4960where kvm expects application code to place the data for the next
4961KVM_RUN invocation (KVM_EXIT_IO_IN).  Data format is a packed array.
4962
4963::
4964
4965		/* KVM_EXIT_DEBUG */
4966		struct {
4967			struct kvm_debug_exit_arch arch;
4968		} debug;
4969
4970If the exit_reason is KVM_EXIT_DEBUG, then a vcpu is processing a debug event
4971for which architecture specific information is returned.
4972
4973::
4974
4975		/* KVM_EXIT_MMIO */
4976		struct {
4977			__u64 phys_addr;
4978			__u8  data[8];
4979			__u32 len;
4980			__u8  is_write;
4981		} mmio;
4982
4983If exit_reason is KVM_EXIT_MMIO, then the vcpu has
4984executed a memory-mapped I/O instruction which could not be satisfied
4985by kvm.  The 'data' member contains the written data if 'is_write' is
4986true, and should be filled by application code otherwise.
4987
4988The 'data' member contains, in its first 'len' bytes, the value as it would
4989appear if the VCPU performed a load or store of the appropriate width directly
4990to the byte array.
4991
4992.. note::
4993
4994      For KVM_EXIT_IO, KVM_EXIT_MMIO, KVM_EXIT_OSI, KVM_EXIT_PAPR,
4995      KVM_EXIT_EPR, KVM_EXIT_X86_RDMSR and KVM_EXIT_X86_WRMSR the corresponding
4996      operations are complete (and guest state is consistent) only after userspace
4997      has re-entered the kernel with KVM_RUN.  The kernel side will first finish
4998      incomplete operations and then check for pending signals.  Userspace
4999      can re-enter the guest with an unmasked signal pending to complete
5000      pending operations.
5001
5002::
5003
5004		/* KVM_EXIT_HYPERCALL */
5005		struct {
5006			__u64 nr;
5007			__u64 args[6];
5008			__u64 ret;
5009			__u32 longmode;
5010			__u32 pad;
5011		} hypercall;
5012
5013Unused.  This was once used for 'hypercall to userspace'.  To implement
5014such functionality, use KVM_EXIT_IO (x86) or KVM_EXIT_MMIO (all except s390).
5015
5016.. note:: KVM_EXIT_IO is significantly faster than KVM_EXIT_MMIO.
5017
5018::
5019
5020		/* KVM_EXIT_TPR_ACCESS */
5021		struct {
5022			__u64 rip;
5023			__u32 is_write;
5024			__u32 pad;
5025		} tpr_access;
5026
5027To be documented (KVM_TPR_ACCESS_REPORTING).
5028
5029::
5030
5031		/* KVM_EXIT_S390_SIEIC */
5032		struct {
5033			__u8 icptcode;
5034			__u64 mask; /* psw upper half */
5035			__u64 addr; /* psw lower half */
5036			__u16 ipa;
5037			__u32 ipb;
5038		} s390_sieic;
5039
5040s390 specific.
5041
5042::
5043
5044		/* KVM_EXIT_S390_RESET */
5045  #define KVM_S390_RESET_POR       1
5046  #define KVM_S390_RESET_CLEAR     2
5047  #define KVM_S390_RESET_SUBSYSTEM 4
5048  #define KVM_S390_RESET_CPU_INIT  8
5049  #define KVM_S390_RESET_IPL       16
5050		__u64 s390_reset_flags;
5051
5052s390 specific.
5053
5054::
5055
5056		/* KVM_EXIT_S390_UCONTROL */
5057		struct {
5058			__u64 trans_exc_code;
5059			__u32 pgm_code;
5060		} s390_ucontrol;
5061
5062s390 specific. A page fault has occurred for a user controlled virtual
5063machine (KVM_VM_S390_UNCONTROL) on it's host page table that cannot be
5064resolved by the kernel.
5065The program code and the translation exception code that were placed
5066in the cpu's lowcore are presented here as defined by the z Architecture
5067Principles of Operation Book in the Chapter for Dynamic Address Translation
5068(DAT)
5069
5070::
5071
5072		/* KVM_EXIT_DCR */
5073		struct {
5074			__u32 dcrn;
5075			__u32 data;
5076			__u8  is_write;
5077		} dcr;
5078
5079Deprecated - was used for 440 KVM.
5080
5081::
5082
5083		/* KVM_EXIT_OSI */
5084		struct {
5085			__u64 gprs[32];
5086		} osi;
5087
5088MOL uses a special hypercall interface it calls 'OSI'. To enable it, we catch
5089hypercalls and exit with this exit struct that contains all the guest gprs.
5090
5091If exit_reason is KVM_EXIT_OSI, then the vcpu has triggered such a hypercall.
5092Userspace can now handle the hypercall and when it's done modify the gprs as
5093necessary. Upon guest entry all guest GPRs will then be replaced by the values
5094in this struct.
5095
5096::
5097
5098		/* KVM_EXIT_PAPR_HCALL */
5099		struct {
5100			__u64 nr;
5101			__u64 ret;
5102			__u64 args[9];
5103		} papr_hcall;
5104
5105This is used on 64-bit PowerPC when emulating a pSeries partition,
5106e.g. with the 'pseries' machine type in qemu.  It occurs when the
5107guest does a hypercall using the 'sc 1' instruction.  The 'nr' field
5108contains the hypercall number (from the guest R3), and 'args' contains
5109the arguments (from the guest R4 - R12).  Userspace should put the
5110return code in 'ret' and any extra returned values in args[].
5111The possible hypercalls are defined in the Power Architecture Platform
5112Requirements (PAPR) document available from www.power.org (free
5113developer registration required to access it).
5114
5115::
5116
5117		/* KVM_EXIT_S390_TSCH */
5118		struct {
5119			__u16 subchannel_id;
5120			__u16 subchannel_nr;
5121			__u32 io_int_parm;
5122			__u32 io_int_word;
5123			__u32 ipb;
5124			__u8 dequeued;
5125		} s390_tsch;
5126
5127s390 specific. This exit occurs when KVM_CAP_S390_CSS_SUPPORT has been enabled
5128and TEST SUBCHANNEL was intercepted. If dequeued is set, a pending I/O
5129interrupt for the target subchannel has been dequeued and subchannel_id,
5130subchannel_nr, io_int_parm and io_int_word contain the parameters for that
5131interrupt. ipb is needed for instruction parameter decoding.
5132
5133::
5134
5135		/* KVM_EXIT_EPR */
5136		struct {
5137			__u32 epr;
5138		} epr;
5139
5140On FSL BookE PowerPC chips, the interrupt controller has a fast patch
5141interrupt acknowledge path to the core. When the core successfully
5142delivers an interrupt, it automatically populates the EPR register with
5143the interrupt vector number and acknowledges the interrupt inside
5144the interrupt controller.
5145
5146In case the interrupt controller lives in user space, we need to do
5147the interrupt acknowledge cycle through it to fetch the next to be
5148delivered interrupt vector using this exit.
5149
5150It gets triggered whenever both KVM_CAP_PPC_EPR are enabled and an
5151external interrupt has just been delivered into the guest. User space
5152should put the acknowledged interrupt vector into the 'epr' field.
5153
5154::
5155
5156		/* KVM_EXIT_SYSTEM_EVENT */
5157		struct {
5158  #define KVM_SYSTEM_EVENT_SHUTDOWN       1
5159  #define KVM_SYSTEM_EVENT_RESET          2
5160  #define KVM_SYSTEM_EVENT_CRASH          3
5161			__u32 type;
5162			__u64 flags;
5163		} system_event;
5164
5165If exit_reason is KVM_EXIT_SYSTEM_EVENT then the vcpu has triggered
5166a system-level event using some architecture specific mechanism (hypercall
5167or some special instruction). In case of ARM/ARM64, this is triggered using
5168HVC instruction based PSCI call from the vcpu. The 'type' field describes
5169the system-level event type. The 'flags' field describes architecture
5170specific flags for the system-level event.
5171
5172Valid values for 'type' are:
5173
5174 - KVM_SYSTEM_EVENT_SHUTDOWN -- the guest has requested a shutdown of the
5175   VM. Userspace is not obliged to honour this, and if it does honour
5176   this does not need to destroy the VM synchronously (ie it may call
5177   KVM_RUN again before shutdown finally occurs).
5178 - KVM_SYSTEM_EVENT_RESET -- the guest has requested a reset of the VM.
5179   As with SHUTDOWN, userspace can choose to ignore the request, or
5180   to schedule the reset to occur in the future and may call KVM_RUN again.
5181 - KVM_SYSTEM_EVENT_CRASH -- the guest crash occurred and the guest
5182   has requested a crash condition maintenance. Userspace can choose
5183   to ignore the request, or to gather VM memory core dump and/or
5184   reset/shutdown of the VM.
5185
5186::
5187
5188		/* KVM_EXIT_IOAPIC_EOI */
5189		struct {
5190			__u8 vector;
5191		} eoi;
5192
5193Indicates that the VCPU's in-kernel local APIC received an EOI for a
5194level-triggered IOAPIC interrupt.  This exit only triggers when the
5195IOAPIC is implemented in userspace (i.e. KVM_CAP_SPLIT_IRQCHIP is enabled);
5196the userspace IOAPIC should process the EOI and retrigger the interrupt if
5197it is still asserted.  Vector is the LAPIC interrupt vector for which the
5198EOI was received.
5199
5200::
5201
5202		struct kvm_hyperv_exit {
5203  #define KVM_EXIT_HYPERV_SYNIC          1
5204  #define KVM_EXIT_HYPERV_HCALL          2
5205  #define KVM_EXIT_HYPERV_SYNDBG         3
5206			__u32 type;
5207			__u32 pad1;
5208			union {
5209				struct {
5210					__u32 msr;
5211					__u32 pad2;
5212					__u64 control;
5213					__u64 evt_page;
5214					__u64 msg_page;
5215				} synic;
5216				struct {
5217					__u64 input;
5218					__u64 result;
5219					__u64 params[2];
5220				} hcall;
5221				struct {
5222					__u32 msr;
5223					__u32 pad2;
5224					__u64 control;
5225					__u64 status;
5226					__u64 send_page;
5227					__u64 recv_page;
5228					__u64 pending_page;
5229				} syndbg;
5230			} u;
5231		};
5232		/* KVM_EXIT_HYPERV */
5233                struct kvm_hyperv_exit hyperv;
5234
5235Indicates that the VCPU exits into userspace to process some tasks
5236related to Hyper-V emulation.
5237
5238Valid values for 'type' are:
5239
5240	- KVM_EXIT_HYPERV_SYNIC -- synchronously notify user-space about
5241
5242Hyper-V SynIC state change. Notification is used to remap SynIC
5243event/message pages and to enable/disable SynIC messages/events processing
5244in userspace.
5245
5246	- KVM_EXIT_HYPERV_SYNDBG -- synchronously notify user-space about
5247
5248Hyper-V Synthetic debugger state change. Notification is used to either update
5249the pending_page location or to send a control command (send the buffer located
5250in send_page or recv a buffer to recv_page).
5251
5252::
5253
5254		/* KVM_EXIT_ARM_NISV */
5255		struct {
5256			__u64 esr_iss;
5257			__u64 fault_ipa;
5258		} arm_nisv;
5259
5260Used on arm and arm64 systems. If a guest accesses memory not in a memslot,
5261KVM will typically return to userspace and ask it to do MMIO emulation on its
5262behalf. However, for certain classes of instructions, no instruction decode
5263(direction, length of memory access) is provided, and fetching and decoding
5264the instruction from the VM is overly complicated to live in the kernel.
5265
5266Historically, when this situation occurred, KVM would print a warning and kill
5267the VM. KVM assumed that if the guest accessed non-memslot memory, it was
5268trying to do I/O, which just couldn't be emulated, and the warning message was
5269phrased accordingly. However, what happened more often was that a guest bug
5270caused access outside the guest memory areas which should lead to a more
5271meaningful warning message and an external abort in the guest, if the access
5272did not fall within an I/O window.
5273
5274Userspace implementations can query for KVM_CAP_ARM_NISV_TO_USER, and enable
5275this capability at VM creation. Once this is done, these types of errors will
5276instead return to userspace with KVM_EXIT_ARM_NISV, with the valid bits from
5277the HSR (arm) and ESR_EL2 (arm64) in the esr_iss field, and the faulting IPA
5278in the fault_ipa field. Userspace can either fix up the access if it's
5279actually an I/O access by decoding the instruction from guest memory (if it's
5280very brave) and continue executing the guest, or it can decide to suspend,
5281dump, or restart the guest.
5282
5283Note that KVM does not skip the faulting instruction as it does for
5284KVM_EXIT_MMIO, but userspace has to emulate any change to the processing state
5285if it decides to decode and emulate the instruction.
5286
5287::
5288
5289		/* KVM_EXIT_X86_RDMSR / KVM_EXIT_X86_WRMSR */
5290		struct {
5291			__u8 error; /* user -> kernel */
5292			__u8 pad[7];
5293			__u32 reason; /* kernel -> user */
5294			__u32 index; /* kernel -> user */
5295			__u64 data; /* kernel <-> user */
5296		} msr;
5297
5298Used on x86 systems. When the VM capability KVM_CAP_X86_USER_SPACE_MSR is
5299enabled, MSR accesses to registers that would invoke a #GP by KVM kernel code
5300will instead trigger a KVM_EXIT_X86_RDMSR exit for reads and KVM_EXIT_X86_WRMSR
5301exit for writes.
5302
5303The "reason" field specifies why the MSR trap occurred. User space will only
5304receive MSR exit traps when a particular reason was requested during through
5305ENABLE_CAP. Currently valid exit reasons are:
5306
5307	KVM_MSR_EXIT_REASON_UNKNOWN - access to MSR that is unknown to KVM
5308	KVM_MSR_EXIT_REASON_INVAL - access to invalid MSRs or reserved bits
5309	KVM_MSR_EXIT_REASON_FILTER - access blocked by KVM_X86_SET_MSR_FILTER
5310
5311For KVM_EXIT_X86_RDMSR, the "index" field tells user space which MSR the guest
5312wants to read. To respond to this request with a successful read, user space
5313writes the respective data into the "data" field and must continue guest
5314execution to ensure the read data is transferred into guest register state.
5315
5316If the RDMSR request was unsuccessful, user space indicates that with a "1" in
5317the "error" field. This will inject a #GP into the guest when the VCPU is
5318executed again.
5319
5320For KVM_EXIT_X86_WRMSR, the "index" field tells user space which MSR the guest
5321wants to write. Once finished processing the event, user space must continue
5322vCPU execution. If the MSR write was unsuccessful, user space also sets the
5323"error" field to "1".
5324
5325::
5326
5327		/* Fix the size of the union. */
5328		char padding[256];
5329	};
5330
5331	/*
5332	 * shared registers between kvm and userspace.
5333	 * kvm_valid_regs specifies the register classes set by the host
5334	 * kvm_dirty_regs specified the register classes dirtied by userspace
5335	 * struct kvm_sync_regs is architecture specific, as well as the
5336	 * bits for kvm_valid_regs and kvm_dirty_regs
5337	 */
5338	__u64 kvm_valid_regs;
5339	__u64 kvm_dirty_regs;
5340	union {
5341		struct kvm_sync_regs regs;
5342		char padding[SYNC_REGS_SIZE_BYTES];
5343	} s;
5344
5345If KVM_CAP_SYNC_REGS is defined, these fields allow userspace to access
5346certain guest registers without having to call SET/GET_*REGS. Thus we can
5347avoid some system call overhead if userspace has to handle the exit.
5348Userspace can query the validity of the structure by checking
5349kvm_valid_regs for specific bits. These bits are architecture specific
5350and usually define the validity of a groups of registers. (e.g. one bit
5351for general purpose registers)
5352
5353Please note that the kernel is allowed to use the kvm_run structure as the
5354primary storage for certain register types. Therefore, the kernel may use the
5355values in kvm_run even if the corresponding bit in kvm_dirty_regs is not set.
5356
5357::
5358
5359  };
5360
5361
5362
53636. Capabilities that can be enabled on vCPUs
5364============================================
5365
5366There are certain capabilities that change the behavior of the virtual CPU or
5367the virtual machine when enabled. To enable them, please see section 4.37.
5368Below you can find a list of capabilities and what their effect on the vCPU or
5369the virtual machine is when enabling them.
5370
5371The following information is provided along with the description:
5372
5373  Architectures:
5374      which instruction set architectures provide this ioctl.
5375      x86 includes both i386 and x86_64.
5376
5377  Target:
5378      whether this is a per-vcpu or per-vm capability.
5379
5380  Parameters:
5381      what parameters are accepted by the capability.
5382
5383  Returns:
5384      the return value.  General error numbers (EBADF, ENOMEM, EINVAL)
5385      are not detailed, but errors with specific meanings are.
5386
5387
53886.1 KVM_CAP_PPC_OSI
5389-------------------
5390
5391:Architectures: ppc
5392:Target: vcpu
5393:Parameters: none
5394:Returns: 0 on success; -1 on error
5395
5396This capability enables interception of OSI hypercalls that otherwise would
5397be treated as normal system calls to be injected into the guest. OSI hypercalls
5398were invented by Mac-on-Linux to have a standardized communication mechanism
5399between the guest and the host.
5400
5401When this capability is enabled, KVM_EXIT_OSI can occur.
5402
5403
54046.2 KVM_CAP_PPC_PAPR
5405--------------------
5406
5407:Architectures: ppc
5408:Target: vcpu
5409:Parameters: none
5410:Returns: 0 on success; -1 on error
5411
5412This capability enables interception of PAPR hypercalls. PAPR hypercalls are
5413done using the hypercall instruction "sc 1".
5414
5415It also sets the guest privilege level to "supervisor" mode. Usually the guest
5416runs in "hypervisor" privilege mode with a few missing features.
5417
5418In addition to the above, it changes the semantics of SDR1. In this mode, the
5419HTAB address part of SDR1 contains an HVA instead of a GPA, as PAPR keeps the
5420HTAB invisible to the guest.
5421
5422When this capability is enabled, KVM_EXIT_PAPR_HCALL can occur.
5423
5424
54256.3 KVM_CAP_SW_TLB
5426------------------
5427
5428:Architectures: ppc
5429:Target: vcpu
5430:Parameters: args[0] is the address of a struct kvm_config_tlb
5431:Returns: 0 on success; -1 on error
5432
5433::
5434
5435  struct kvm_config_tlb {
5436	__u64 params;
5437	__u64 array;
5438	__u32 mmu_type;
5439	__u32 array_len;
5440  };
5441
5442Configures the virtual CPU's TLB array, establishing a shared memory area
5443between userspace and KVM.  The "params" and "array" fields are userspace
5444addresses of mmu-type-specific data structures.  The "array_len" field is an
5445safety mechanism, and should be set to the size in bytes of the memory that
5446userspace has reserved for the array.  It must be at least the size dictated
5447by "mmu_type" and "params".
5448
5449While KVM_RUN is active, the shared region is under control of KVM.  Its
5450contents are undefined, and any modification by userspace results in
5451boundedly undefined behavior.
5452
5453On return from KVM_RUN, the shared region will reflect the current state of
5454the guest's TLB.  If userspace makes any changes, it must call KVM_DIRTY_TLB
5455to tell KVM which entries have been changed, prior to calling KVM_RUN again
5456on this vcpu.
5457
5458For mmu types KVM_MMU_FSL_BOOKE_NOHV and KVM_MMU_FSL_BOOKE_HV:
5459
5460 - The "params" field is of type "struct kvm_book3e_206_tlb_params".
5461 - The "array" field points to an array of type "struct
5462   kvm_book3e_206_tlb_entry".
5463 - The array consists of all entries in the first TLB, followed by all
5464   entries in the second TLB.
5465 - Within a TLB, entries are ordered first by increasing set number.  Within a
5466   set, entries are ordered by way (increasing ESEL).
5467 - The hash for determining set number in TLB0 is: (MAS2 >> 12) & (num_sets - 1)
5468   where "num_sets" is the tlb_sizes[] value divided by the tlb_ways[] value.
5469 - The tsize field of mas1 shall be set to 4K on TLB0, even though the
5470   hardware ignores this value for TLB0.
5471
54726.4 KVM_CAP_S390_CSS_SUPPORT
5473----------------------------
5474
5475:Architectures: s390
5476:Target: vcpu
5477:Parameters: none
5478:Returns: 0 on success; -1 on error
5479
5480This capability enables support for handling of channel I/O instructions.
5481
5482TEST PENDING INTERRUPTION and the interrupt portion of TEST SUBCHANNEL are
5483handled in-kernel, while the other I/O instructions are passed to userspace.
5484
5485When this capability is enabled, KVM_EXIT_S390_TSCH will occur on TEST
5486SUBCHANNEL intercepts.
5487
5488Note that even though this capability is enabled per-vcpu, the complete
5489virtual machine is affected.
5490
54916.5 KVM_CAP_PPC_EPR
5492-------------------
5493
5494:Architectures: ppc
5495:Target: vcpu
5496:Parameters: args[0] defines whether the proxy facility is active
5497:Returns: 0 on success; -1 on error
5498
5499This capability enables or disables the delivery of interrupts through the
5500external proxy facility.
5501
5502When enabled (args[0] != 0), every time the guest gets an external interrupt
5503delivered, it automatically exits into user space with a KVM_EXIT_EPR exit
5504to receive the topmost interrupt vector.
5505
5506When disabled (args[0] == 0), behavior is as if this facility is unsupported.
5507
5508When this capability is enabled, KVM_EXIT_EPR can occur.
5509
55106.6 KVM_CAP_IRQ_MPIC
5511--------------------
5512
5513:Architectures: ppc
5514:Parameters: args[0] is the MPIC device fd;
5515             args[1] is the MPIC CPU number for this vcpu
5516
5517This capability connects the vcpu to an in-kernel MPIC device.
5518
55196.7 KVM_CAP_IRQ_XICS
5520--------------------
5521
5522:Architectures: ppc
5523:Target: vcpu
5524:Parameters: args[0] is the XICS device fd;
5525             args[1] is the XICS CPU number (server ID) for this vcpu
5526
5527This capability connects the vcpu to an in-kernel XICS device.
5528
55296.8 KVM_CAP_S390_IRQCHIP
5530------------------------
5531
5532:Architectures: s390
5533:Target: vm
5534:Parameters: none
5535
5536This capability enables the in-kernel irqchip for s390. Please refer to
5537"4.24 KVM_CREATE_IRQCHIP" for details.
5538
55396.9 KVM_CAP_MIPS_FPU
5540--------------------
5541
5542:Architectures: mips
5543:Target: vcpu
5544:Parameters: args[0] is reserved for future use (should be 0).
5545
5546This capability allows the use of the host Floating Point Unit by the guest. It
5547allows the Config1.FP bit to be set to enable the FPU in the guest. Once this is
5548done the ``KVM_REG_MIPS_FPR_*`` and ``KVM_REG_MIPS_FCR_*`` registers can be
5549accessed (depending on the current guest FPU register mode), and the Status.FR,
5550Config5.FRE bits are accessible via the KVM API and also from the guest,
5551depending on them being supported by the FPU.
5552
55536.10 KVM_CAP_MIPS_MSA
5554---------------------
5555
5556:Architectures: mips
5557:Target: vcpu
5558:Parameters: args[0] is reserved for future use (should be 0).
5559
5560This capability allows the use of the MIPS SIMD Architecture (MSA) by the guest.
5561It allows the Config3.MSAP bit to be set to enable the use of MSA by the guest.
5562Once this is done the ``KVM_REG_MIPS_VEC_*`` and ``KVM_REG_MIPS_MSA_*``
5563registers can be accessed, and the Config5.MSAEn bit is accessible via the
5564KVM API and also from the guest.
5565
55666.74 KVM_CAP_SYNC_REGS
5567----------------------
5568
5569:Architectures: s390, x86
5570:Target: s390: always enabled, x86: vcpu
5571:Parameters: none
5572:Returns: x86: KVM_CHECK_EXTENSION returns a bit-array indicating which register
5573          sets are supported
5574          (bitfields defined in arch/x86/include/uapi/asm/kvm.h).
5575
5576As described above in the kvm_sync_regs struct info in section 5 (kvm_run):
5577KVM_CAP_SYNC_REGS "allow[s] userspace to access certain guest registers
5578without having to call SET/GET_*REGS". This reduces overhead by eliminating
5579repeated ioctl calls for setting and/or getting register values. This is
5580particularly important when userspace is making synchronous guest state
5581modifications, e.g. when emulating and/or intercepting instructions in
5582userspace.
5583
5584For s390 specifics, please refer to the source code.
5585
5586For x86:
5587
5588- the register sets to be copied out to kvm_run are selectable
5589  by userspace (rather that all sets being copied out for every exit).
5590- vcpu_events are available in addition to regs and sregs.
5591
5592For x86, the 'kvm_valid_regs' field of struct kvm_run is overloaded to
5593function as an input bit-array field set by userspace to indicate the
5594specific register sets to be copied out on the next exit.
5595
5596To indicate when userspace has modified values that should be copied into
5597the vCPU, the all architecture bitarray field, 'kvm_dirty_regs' must be set.
5598This is done using the same bitflags as for the 'kvm_valid_regs' field.
5599If the dirty bit is not set, then the register set values will not be copied
5600into the vCPU even if they've been modified.
5601
5602Unused bitfields in the bitarrays must be set to zero.
5603
5604::
5605
5606  struct kvm_sync_regs {
5607        struct kvm_regs regs;
5608        struct kvm_sregs sregs;
5609        struct kvm_vcpu_events events;
5610  };
5611
56126.75 KVM_CAP_PPC_IRQ_XIVE
5613-------------------------
5614
5615:Architectures: ppc
5616:Target: vcpu
5617:Parameters: args[0] is the XIVE device fd;
5618             args[1] is the XIVE CPU number (server ID) for this vcpu
5619
5620This capability connects the vcpu to an in-kernel XIVE device.
5621
56227. Capabilities that can be enabled on VMs
5623==========================================
5624
5625There are certain capabilities that change the behavior of the virtual
5626machine when enabled. To enable them, please see section 4.37. Below
5627you can find a list of capabilities and what their effect on the VM
5628is when enabling them.
5629
5630The following information is provided along with the description:
5631
5632  Architectures:
5633      which instruction set architectures provide this ioctl.
5634      x86 includes both i386 and x86_64.
5635
5636  Parameters:
5637      what parameters are accepted by the capability.
5638
5639  Returns:
5640      the return value.  General error numbers (EBADF, ENOMEM, EINVAL)
5641      are not detailed, but errors with specific meanings are.
5642
5643
56447.1 KVM_CAP_PPC_ENABLE_HCALL
5645----------------------------
5646
5647:Architectures: ppc
5648:Parameters: args[0] is the sPAPR hcall number;
5649	     args[1] is 0 to disable, 1 to enable in-kernel handling
5650
5651This capability controls whether individual sPAPR hypercalls (hcalls)
5652get handled by the kernel or not.  Enabling or disabling in-kernel
5653handling of an hcall is effective across the VM.  On creation, an
5654initial set of hcalls are enabled for in-kernel handling, which
5655consists of those hcalls for which in-kernel handlers were implemented
5656before this capability was implemented.  If disabled, the kernel will
5657not to attempt to handle the hcall, but will always exit to userspace
5658to handle it.  Note that it may not make sense to enable some and
5659disable others of a group of related hcalls, but KVM does not prevent
5660userspace from doing that.
5661
5662If the hcall number specified is not one that has an in-kernel
5663implementation, the KVM_ENABLE_CAP ioctl will fail with an EINVAL
5664error.
5665
56667.2 KVM_CAP_S390_USER_SIGP
5667--------------------------
5668
5669:Architectures: s390
5670:Parameters: none
5671
5672This capability controls which SIGP orders will be handled completely in user
5673space. With this capability enabled, all fast orders will be handled completely
5674in the kernel:
5675
5676- SENSE
5677- SENSE RUNNING
5678- EXTERNAL CALL
5679- EMERGENCY SIGNAL
5680- CONDITIONAL EMERGENCY SIGNAL
5681
5682All other orders will be handled completely in user space.
5683
5684Only privileged operation exceptions will be checked for in the kernel (or even
5685in the hardware prior to interception). If this capability is not enabled, the
5686old way of handling SIGP orders is used (partially in kernel and user space).
5687
56887.3 KVM_CAP_S390_VECTOR_REGISTERS
5689---------------------------------
5690
5691:Architectures: s390
5692:Parameters: none
5693:Returns: 0 on success, negative value on error
5694
5695Allows use of the vector registers introduced with z13 processor, and
5696provides for the synchronization between host and user space.  Will
5697return -EINVAL if the machine does not support vectors.
5698
56997.4 KVM_CAP_S390_USER_STSI
5700--------------------------
5701
5702:Architectures: s390
5703:Parameters: none
5704
5705This capability allows post-handlers for the STSI instruction. After
5706initial handling in the kernel, KVM exits to user space with
5707KVM_EXIT_S390_STSI to allow user space to insert further data.
5708
5709Before exiting to userspace, kvm handlers should fill in s390_stsi field of
5710vcpu->run::
5711
5712  struct {
5713	__u64 addr;
5714	__u8 ar;
5715	__u8 reserved;
5716	__u8 fc;
5717	__u8 sel1;
5718	__u16 sel2;
5719  } s390_stsi;
5720
5721  @addr - guest address of STSI SYSIB
5722  @fc   - function code
5723  @sel1 - selector 1
5724  @sel2 - selector 2
5725  @ar   - access register number
5726
5727KVM handlers should exit to userspace with rc = -EREMOTE.
5728
57297.5 KVM_CAP_SPLIT_IRQCHIP
5730-------------------------
5731
5732:Architectures: x86
5733:Parameters: args[0] - number of routes reserved for userspace IOAPICs
5734:Returns: 0 on success, -1 on error
5735
5736Create a local apic for each processor in the kernel. This can be used
5737instead of KVM_CREATE_IRQCHIP if the userspace VMM wishes to emulate the
5738IOAPIC and PIC (and also the PIT, even though this has to be enabled
5739separately).
5740
5741This capability also enables in kernel routing of interrupt requests;
5742when KVM_CAP_SPLIT_IRQCHIP only routes of KVM_IRQ_ROUTING_MSI type are
5743used in the IRQ routing table.  The first args[0] MSI routes are reserved
5744for the IOAPIC pins.  Whenever the LAPIC receives an EOI for these routes,
5745a KVM_EXIT_IOAPIC_EOI vmexit will be reported to userspace.
5746
5747Fails if VCPU has already been created, or if the irqchip is already in the
5748kernel (i.e. KVM_CREATE_IRQCHIP has already been called).
5749
57507.6 KVM_CAP_S390_RI
5751-------------------
5752
5753:Architectures: s390
5754:Parameters: none
5755
5756Allows use of runtime-instrumentation introduced with zEC12 processor.
5757Will return -EINVAL if the machine does not support runtime-instrumentation.
5758Will return -EBUSY if a VCPU has already been created.
5759
57607.7 KVM_CAP_X2APIC_API
5761----------------------
5762
5763:Architectures: x86
5764:Parameters: args[0] - features that should be enabled
5765:Returns: 0 on success, -EINVAL when args[0] contains invalid features
5766
5767Valid feature flags in args[0] are::
5768
5769  #define KVM_X2APIC_API_USE_32BIT_IDS            (1ULL << 0)
5770  #define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK  (1ULL << 1)
5771
5772Enabling KVM_X2APIC_API_USE_32BIT_IDS changes the behavior of
5773KVM_SET_GSI_ROUTING, KVM_SIGNAL_MSI, KVM_SET_LAPIC, and KVM_GET_LAPIC,
5774allowing the use of 32-bit APIC IDs.  See KVM_CAP_X2APIC_API in their
5775respective sections.
5776
5777KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK must be enabled for x2APIC to work
5778in logical mode or with more than 255 VCPUs.  Otherwise, KVM treats 0xff
5779as a broadcast even in x2APIC mode in order to support physical x2APIC
5780without interrupt remapping.  This is undesirable in logical mode,
5781where 0xff represents CPUs 0-7 in cluster 0.
5782
57837.8 KVM_CAP_S390_USER_INSTR0
5784----------------------------
5785
5786:Architectures: s390
5787:Parameters: none
5788
5789With this capability enabled, all illegal instructions 0x0000 (2 bytes) will
5790be intercepted and forwarded to user space. User space can use this
5791mechanism e.g. to realize 2-byte software breakpoints. The kernel will
5792not inject an operating exception for these instructions, user space has
5793to take care of that.
5794
5795This capability can be enabled dynamically even if VCPUs were already
5796created and are running.
5797
57987.9 KVM_CAP_S390_GS
5799-------------------
5800
5801:Architectures: s390
5802:Parameters: none
5803:Returns: 0 on success; -EINVAL if the machine does not support
5804          guarded storage; -EBUSY if a VCPU has already been created.
5805
5806Allows use of guarded storage for the KVM guest.
5807
58087.10 KVM_CAP_S390_AIS
5809---------------------
5810
5811:Architectures: s390
5812:Parameters: none
5813
5814Allow use of adapter-interruption suppression.
5815:Returns: 0 on success; -EBUSY if a VCPU has already been created.
5816
58177.11 KVM_CAP_PPC_SMT
5818--------------------
5819
5820:Architectures: ppc
5821:Parameters: vsmt_mode, flags
5822
5823Enabling this capability on a VM provides userspace with a way to set
5824the desired virtual SMT mode (i.e. the number of virtual CPUs per
5825virtual core).  The virtual SMT mode, vsmt_mode, must be a power of 2
5826between 1 and 8.  On POWER8, vsmt_mode must also be no greater than
5827the number of threads per subcore for the host.  Currently flags must
5828be 0.  A successful call to enable this capability will result in
5829vsmt_mode being returned when the KVM_CAP_PPC_SMT capability is
5830subsequently queried for the VM.  This capability is only supported by
5831HV KVM, and can only be set before any VCPUs have been created.
5832The KVM_CAP_PPC_SMT_POSSIBLE capability indicates which virtual SMT
5833modes are available.
5834
58357.12 KVM_CAP_PPC_FWNMI
5836----------------------
5837
5838:Architectures: ppc
5839:Parameters: none
5840
5841With this capability a machine check exception in the guest address
5842space will cause KVM to exit the guest with NMI exit reason. This
5843enables QEMU to build error log and branch to guest kernel registered
5844machine check handling routine. Without this capability KVM will
5845branch to guests' 0x200 interrupt vector.
5846
58477.13 KVM_CAP_X86_DISABLE_EXITS
5848------------------------------
5849
5850:Architectures: x86
5851:Parameters: args[0] defines which exits are disabled
5852:Returns: 0 on success, -EINVAL when args[0] contains invalid exits
5853
5854Valid bits in args[0] are::
5855
5856  #define KVM_X86_DISABLE_EXITS_MWAIT            (1 << 0)
5857  #define KVM_X86_DISABLE_EXITS_HLT              (1 << 1)
5858  #define KVM_X86_DISABLE_EXITS_PAUSE            (1 << 2)
5859  #define KVM_X86_DISABLE_EXITS_CSTATE           (1 << 3)
5860
5861Enabling this capability on a VM provides userspace with a way to no
5862longer intercept some instructions for improved latency in some
5863workloads, and is suggested when vCPUs are associated to dedicated
5864physical CPUs.  More bits can be added in the future; userspace can
5865just pass the KVM_CHECK_EXTENSION result to KVM_ENABLE_CAP to disable
5866all such vmexits.
5867
5868Do not enable KVM_FEATURE_PV_UNHALT if you disable HLT exits.
5869
58707.14 KVM_CAP_S390_HPAGE_1M
5871--------------------------
5872
5873:Architectures: s390
5874:Parameters: none
5875:Returns: 0 on success, -EINVAL if hpage module parameter was not set
5876	  or cmma is enabled, or the VM has the KVM_VM_S390_UCONTROL
5877	  flag set
5878
5879With this capability the KVM support for memory backing with 1m pages
5880through hugetlbfs can be enabled for a VM. After the capability is
5881enabled, cmma can't be enabled anymore and pfmfi and the storage key
5882interpretation are disabled. If cmma has already been enabled or the
5883hpage module parameter is not set to 1, -EINVAL is returned.
5884
5885While it is generally possible to create a huge page backed VM without
5886this capability, the VM will not be able to run.
5887
58887.15 KVM_CAP_MSR_PLATFORM_INFO
5889------------------------------
5890
5891:Architectures: x86
5892:Parameters: args[0] whether feature should be enabled or not
5893
5894With this capability, a guest may read the MSR_PLATFORM_INFO MSR. Otherwise,
5895a #GP would be raised when the guest tries to access. Currently, this
5896capability does not enable write permissions of this MSR for the guest.
5897
58987.16 KVM_CAP_PPC_NESTED_HV
5899--------------------------
5900
5901:Architectures: ppc
5902:Parameters: none
5903:Returns: 0 on success, -EINVAL when the implementation doesn't support
5904	  nested-HV virtualization.
5905
5906HV-KVM on POWER9 and later systems allows for "nested-HV"
5907virtualization, which provides a way for a guest VM to run guests that
5908can run using the CPU's supervisor mode (privileged non-hypervisor
5909state).  Enabling this capability on a VM depends on the CPU having
5910the necessary functionality and on the facility being enabled with a
5911kvm-hv module parameter.
5912
59137.17 KVM_CAP_EXCEPTION_PAYLOAD
5914------------------------------
5915
5916:Architectures: x86
5917:Parameters: args[0] whether feature should be enabled or not
5918
5919With this capability enabled, CR2 will not be modified prior to the
5920emulated VM-exit when L1 intercepts a #PF exception that occurs in
5921L2. Similarly, for kvm-intel only, DR6 will not be modified prior to
5922the emulated VM-exit when L1 intercepts a #DB exception that occurs in
5923L2. As a result, when KVM_GET_VCPU_EVENTS reports a pending #PF (or
5924#DB) exception for L2, exception.has_payload will be set and the
5925faulting address (or the new DR6 bits*) will be reported in the
5926exception_payload field. Similarly, when userspace injects a #PF (or
5927#DB) into L2 using KVM_SET_VCPU_EVENTS, it is expected to set
5928exception.has_payload and to put the faulting address - or the new DR6
5929bits\ [#]_ - in the exception_payload field.
5930
5931This capability also enables exception.pending in struct
5932kvm_vcpu_events, which allows userspace to distinguish between pending
5933and injected exceptions.
5934
5935
5936.. [#] For the new DR6 bits, note that bit 16 is set iff the #DB exception
5937       will clear DR6.RTM.
5938
59397.18 KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2
5940
5941:Architectures: x86, arm, arm64, mips
5942:Parameters: args[0] whether feature should be enabled or not
5943
5944Valid flags are::
5945
5946  #define KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE   (1 << 0)
5947  #define KVM_DIRTY_LOG_INITIALLY_SET           (1 << 1)
5948
5949With KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE is set, KVM_GET_DIRTY_LOG will not
5950automatically clear and write-protect all pages that are returned as dirty.
5951Rather, userspace will have to do this operation separately using
5952KVM_CLEAR_DIRTY_LOG.
5953
5954At the cost of a slightly more complicated operation, this provides better
5955scalability and responsiveness for two reasons.  First,
5956KVM_CLEAR_DIRTY_LOG ioctl can operate on a 64-page granularity rather
5957than requiring to sync a full memslot; this ensures that KVM does not
5958take spinlocks for an extended period of time.  Second, in some cases a
5959large amount of time can pass between a call to KVM_GET_DIRTY_LOG and
5960userspace actually using the data in the page.  Pages can be modified
5961during this time, which is inefficient for both the guest and userspace:
5962the guest will incur a higher penalty due to write protection faults,
5963while userspace can see false reports of dirty pages.  Manual reprotection
5964helps reducing this time, improving guest performance and reducing the
5965number of dirty log false positives.
5966
5967With KVM_DIRTY_LOG_INITIALLY_SET set, all the bits of the dirty bitmap
5968will be initialized to 1 when created.  This also improves performance because
5969dirty logging can be enabled gradually in small chunks on the first call
5970to KVM_CLEAR_DIRTY_LOG.  KVM_DIRTY_LOG_INITIALLY_SET depends on
5971KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE (it is also only available on
5972x86 and arm64 for now).
5973
5974KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 was previously available under the name
5975KVM_CAP_MANUAL_DIRTY_LOG_PROTECT, but the implementation had bugs that make
5976it hard or impossible to use it correctly.  The availability of
5977KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 signals that those bugs are fixed.
5978Userspace should not try to use KVM_CAP_MANUAL_DIRTY_LOG_PROTECT.
5979
59807.19 KVM_CAP_PPC_SECURE_GUEST
5981------------------------------
5982
5983:Architectures: ppc
5984
5985This capability indicates that KVM is running on a host that has
5986ultravisor firmware and thus can support a secure guest.  On such a
5987system, a guest can ask the ultravisor to make it a secure guest,
5988one whose memory is inaccessible to the host except for pages which
5989are explicitly requested to be shared with the host.  The ultravisor
5990notifies KVM when a guest requests to become a secure guest, and KVM
5991has the opportunity to veto the transition.
5992
5993If present, this capability can be enabled for a VM, meaning that KVM
5994will allow the transition to secure guest mode.  Otherwise KVM will
5995veto the transition.
5996
59977.20 KVM_CAP_HALT_POLL
5998----------------------
5999
6000:Architectures: all
6001:Target: VM
6002:Parameters: args[0] is the maximum poll time in nanoseconds
6003:Returns: 0 on success; -1 on error
6004
6005This capability overrides the kvm module parameter halt_poll_ns for the
6006target VM.
6007
6008VCPU polling allows a VCPU to poll for wakeup events instead of immediately
6009scheduling during guest halts. The maximum time a VCPU can spend polling is
6010controlled by the kvm module parameter halt_poll_ns. This capability allows
6011the maximum halt time to specified on a per-VM basis, effectively overriding
6012the module parameter for the target VM.
6013
60147.21 KVM_CAP_X86_USER_SPACE_MSR
6015-------------------------------
6016
6017:Architectures: x86
6018:Target: VM
6019:Parameters: args[0] contains the mask of KVM_MSR_EXIT_REASON_* events to report
6020:Returns: 0 on success; -1 on error
6021
6022This capability enables trapping of #GP invoking RDMSR and WRMSR instructions
6023into user space.
6024
6025When a guest requests to read or write an MSR, KVM may not implement all MSRs
6026that are relevant to a respective system. It also does not differentiate by
6027CPU type.
6028
6029To allow more fine grained control over MSR handling, user space may enable
6030this capability. With it enabled, MSR accesses that match the mask specified in
6031args[0] and trigger a #GP event inside the guest by KVM will instead trigger
6032KVM_EXIT_X86_RDMSR and KVM_EXIT_X86_WRMSR exit notifications which user space
6033can then handle to implement model specific MSR handling and/or user notifications
6034to inform a user that an MSR was not handled.
6035
60368. Other capabilities.
6037======================
6038
6039This section lists capabilities that give information about other
6040features of the KVM implementation.
6041
60428.1 KVM_CAP_PPC_HWRNG
6043---------------------
6044
6045:Architectures: ppc
6046
6047This capability, if KVM_CHECK_EXTENSION indicates that it is
6048available, means that the kernel has an implementation of the
6049H_RANDOM hypercall backed by a hardware random-number generator.
6050If present, the kernel H_RANDOM handler can be enabled for guest use
6051with the KVM_CAP_PPC_ENABLE_HCALL capability.
6052
60538.2 KVM_CAP_HYPERV_SYNIC
6054------------------------
6055
6056:Architectures: x86
6057
6058This capability, if KVM_CHECK_EXTENSION indicates that it is
6059available, means that the kernel has an implementation of the
6060Hyper-V Synthetic interrupt controller(SynIC). Hyper-V SynIC is
6061used to support Windows Hyper-V based guest paravirt drivers(VMBus).
6062
6063In order to use SynIC, it has to be activated by setting this
6064capability via KVM_ENABLE_CAP ioctl on the vcpu fd. Note that this
6065will disable the use of APIC hardware virtualization even if supported
6066by the CPU, as it's incompatible with SynIC auto-EOI behavior.
6067
60688.3 KVM_CAP_PPC_RADIX_MMU
6069-------------------------
6070
6071:Architectures: ppc
6072
6073This capability, if KVM_CHECK_EXTENSION indicates that it is
6074available, means that the kernel can support guests using the
6075radix MMU defined in Power ISA V3.00 (as implemented in the POWER9
6076processor).
6077
60788.4 KVM_CAP_PPC_HASH_MMU_V3
6079---------------------------
6080
6081:Architectures: ppc
6082
6083This capability, if KVM_CHECK_EXTENSION indicates that it is
6084available, means that the kernel can support guests using the
6085hashed page table MMU defined in Power ISA V3.00 (as implemented in
6086the POWER9 processor), including in-memory segment tables.
6087
60888.5 KVM_CAP_MIPS_VZ
6089-------------------
6090
6091:Architectures: mips
6092
6093This capability, if KVM_CHECK_EXTENSION on the main kvm handle indicates that
6094it is available, means that full hardware assisted virtualization capabilities
6095of the hardware are available for use through KVM. An appropriate
6096KVM_VM_MIPS_* type must be passed to KVM_CREATE_VM to create a VM which
6097utilises it.
6098
6099If KVM_CHECK_EXTENSION on a kvm VM handle indicates that this capability is
6100available, it means that the VM is using full hardware assisted virtualization
6101capabilities of the hardware. This is useful to check after creating a VM with
6102KVM_VM_MIPS_DEFAULT.
6103
6104The value returned by KVM_CHECK_EXTENSION should be compared against known
6105values (see below). All other values are reserved. This is to allow for the
6106possibility of other hardware assisted virtualization implementations which
6107may be incompatible with the MIPS VZ ASE.
6108
6109==  ==========================================================================
6110 0  The trap & emulate implementation is in use to run guest code in user
6111    mode. Guest virtual memory segments are rearranged to fit the guest in the
6112    user mode address space.
6113
6114 1  The MIPS VZ ASE is in use, providing full hardware assisted
6115    virtualization, including standard guest virtual memory segments.
6116==  ==========================================================================
6117
61188.6 KVM_CAP_MIPS_TE
6119-------------------
6120
6121:Architectures: mips
6122
6123This capability, if KVM_CHECK_EXTENSION on the main kvm handle indicates that
6124it is available, means that the trap & emulate implementation is available to
6125run guest code in user mode, even if KVM_CAP_MIPS_VZ indicates that hardware
6126assisted virtualisation is also available. KVM_VM_MIPS_TE (0) must be passed
6127to KVM_CREATE_VM to create a VM which utilises it.
6128
6129If KVM_CHECK_EXTENSION on a kvm VM handle indicates that this capability is
6130available, it means that the VM is using trap & emulate.
6131
61328.7 KVM_CAP_MIPS_64BIT
6133----------------------
6134
6135:Architectures: mips
6136
6137This capability indicates the supported architecture type of the guest, i.e. the
6138supported register and address width.
6139
6140The values returned when this capability is checked by KVM_CHECK_EXTENSION on a
6141kvm VM handle correspond roughly to the CP0_Config.AT register field, and should
6142be checked specifically against known values (see below). All other values are
6143reserved.
6144
6145==  ========================================================================
6146 0  MIPS32 or microMIPS32.
6147    Both registers and addresses are 32-bits wide.
6148    It will only be possible to run 32-bit guest code.
6149
6150 1  MIPS64 or microMIPS64 with access only to 32-bit compatibility segments.
6151    Registers are 64-bits wide, but addresses are 32-bits wide.
6152    64-bit guest code may run but cannot access MIPS64 memory segments.
6153    It will also be possible to run 32-bit guest code.
6154
6155 2  MIPS64 or microMIPS64 with access to all address segments.
6156    Both registers and addresses are 64-bits wide.
6157    It will be possible to run 64-bit or 32-bit guest code.
6158==  ========================================================================
6159
61608.9 KVM_CAP_ARM_USER_IRQ
6161------------------------
6162
6163:Architectures: arm, arm64
6164
6165This capability, if KVM_CHECK_EXTENSION indicates that it is available, means
6166that if userspace creates a VM without an in-kernel interrupt controller, it
6167will be notified of changes to the output level of in-kernel emulated devices,
6168which can generate virtual interrupts, presented to the VM.
6169For such VMs, on every return to userspace, the kernel
6170updates the vcpu's run->s.regs.device_irq_level field to represent the actual
6171output level of the device.
6172
6173Whenever kvm detects a change in the device output level, kvm guarantees at
6174least one return to userspace before running the VM.  This exit could either
6175be a KVM_EXIT_INTR or any other exit event, like KVM_EXIT_MMIO. This way,
6176userspace can always sample the device output level and re-compute the state of
6177the userspace interrupt controller.  Userspace should always check the state
6178of run->s.regs.device_irq_level on every kvm exit.
6179The value in run->s.regs.device_irq_level can represent both level and edge
6180triggered interrupt signals, depending on the device.  Edge triggered interrupt
6181signals will exit to userspace with the bit in run->s.regs.device_irq_level
6182set exactly once per edge signal.
6183
6184The field run->s.regs.device_irq_level is available independent of
6185run->kvm_valid_regs or run->kvm_dirty_regs bits.
6186
6187If KVM_CAP_ARM_USER_IRQ is supported, the KVM_CHECK_EXTENSION ioctl returns a
6188number larger than 0 indicating the version of this capability is implemented
6189and thereby which bits in run->s.regs.device_irq_level can signal values.
6190
6191Currently the following bits are defined for the device_irq_level bitmap::
6192
6193  KVM_CAP_ARM_USER_IRQ >= 1:
6194
6195    KVM_ARM_DEV_EL1_VTIMER -  EL1 virtual timer
6196    KVM_ARM_DEV_EL1_PTIMER -  EL1 physical timer
6197    KVM_ARM_DEV_PMU        -  ARM PMU overflow interrupt signal
6198
6199Future versions of kvm may implement additional events. These will get
6200indicated by returning a higher number from KVM_CHECK_EXTENSION and will be
6201listed above.
6202
62038.10 KVM_CAP_PPC_SMT_POSSIBLE
6204-----------------------------
6205
6206:Architectures: ppc
6207
6208Querying this capability returns a bitmap indicating the possible
6209virtual SMT modes that can be set using KVM_CAP_PPC_SMT.  If bit N
6210(counting from the right) is set, then a virtual SMT mode of 2^N is
6211available.
6212
62138.11 KVM_CAP_HYPERV_SYNIC2
6214--------------------------
6215
6216:Architectures: x86
6217
6218This capability enables a newer version of Hyper-V Synthetic interrupt
6219controller (SynIC).  The only difference with KVM_CAP_HYPERV_SYNIC is that KVM
6220doesn't clear SynIC message and event flags pages when they are enabled by
6221writing to the respective MSRs.
6222
62238.12 KVM_CAP_HYPERV_VP_INDEX
6224----------------------------
6225
6226:Architectures: x86
6227
6228This capability indicates that userspace can load HV_X64_MSR_VP_INDEX msr.  Its
6229value is used to denote the target vcpu for a SynIC interrupt.  For
6230compatibilty, KVM initializes this msr to KVM's internal vcpu index.  When this
6231capability is absent, userspace can still query this msr's value.
6232
62338.13 KVM_CAP_S390_AIS_MIGRATION
6234-------------------------------
6235
6236:Architectures: s390
6237:Parameters: none
6238
6239This capability indicates if the flic device will be able to get/set the
6240AIS states for migration via the KVM_DEV_FLIC_AISM_ALL attribute and allows
6241to discover this without having to create a flic device.
6242
62438.14 KVM_CAP_S390_PSW
6244---------------------
6245
6246:Architectures: s390
6247
6248This capability indicates that the PSW is exposed via the kvm_run structure.
6249
62508.15 KVM_CAP_S390_GMAP
6251----------------------
6252
6253:Architectures: s390
6254
6255This capability indicates that the user space memory used as guest mapping can
6256be anywhere in the user memory address space, as long as the memory slots are
6257aligned and sized to a segment (1MB) boundary.
6258
62598.16 KVM_CAP_S390_COW
6260---------------------
6261
6262:Architectures: s390
6263
6264This capability indicates that the user space memory used as guest mapping can
6265use copy-on-write semantics as well as dirty pages tracking via read-only page
6266tables.
6267
62688.17 KVM_CAP_S390_BPB
6269---------------------
6270
6271:Architectures: s390
6272
6273This capability indicates that kvm will implement the interfaces to handle
6274reset, migration and nested KVM for branch prediction blocking. The stfle
6275facility 82 should not be provided to the guest without this capability.
6276
62778.18 KVM_CAP_HYPERV_TLBFLUSH
6278----------------------------
6279
6280:Architectures: x86
6281
6282This capability indicates that KVM supports paravirtualized Hyper-V TLB Flush
6283hypercalls:
6284HvFlushVirtualAddressSpace, HvFlushVirtualAddressSpaceEx,
6285HvFlushVirtualAddressList, HvFlushVirtualAddressListEx.
6286
62878.19 KVM_CAP_ARM_INJECT_SERROR_ESR
6288----------------------------------
6289
6290:Architectures: arm, arm64
6291
6292This capability indicates that userspace can specify (via the
6293KVM_SET_VCPU_EVENTS ioctl) the syndrome value reported to the guest when it
6294takes a virtual SError interrupt exception.
6295If KVM advertises this capability, userspace can only specify the ISS field for
6296the ESR syndrome. Other parts of the ESR, such as the EC are generated by the
6297CPU when the exception is taken. If this virtual SError is taken to EL1 using
6298AArch64, this value will be reported in the ISS field of ESR_ELx.
6299
6300See KVM_CAP_VCPU_EVENTS for more details.
6301
63028.20 KVM_CAP_HYPERV_SEND_IPI
6303----------------------------
6304
6305:Architectures: x86
6306
6307This capability indicates that KVM supports paravirtualized Hyper-V IPI send
6308hypercalls:
6309HvCallSendSyntheticClusterIpi, HvCallSendSyntheticClusterIpiEx.
6310
63118.21 KVM_CAP_HYPERV_DIRECT_TLBFLUSH
6312-----------------------------------
6313
6314:Architectures: x86
6315
6316This capability indicates that KVM running on top of Hyper-V hypervisor
6317enables Direct TLB flush for its guests meaning that TLB flush
6318hypercalls are handled by Level 0 hypervisor (Hyper-V) bypassing KVM.
6319Due to the different ABI for hypercall parameters between Hyper-V and
6320KVM, enabling this capability effectively disables all hypercall
6321handling by KVM (as some KVM hypercall may be mistakenly treated as TLB
6322flush hypercalls by Hyper-V) so userspace should disable KVM identification
6323in CPUID and only exposes Hyper-V identification. In this case, guest
6324thinks it's running on Hyper-V and only use Hyper-V hypercalls.
6325
63268.22 KVM_CAP_S390_VCPU_RESETS
6327-----------------------------
6328
6329:Architectures: s390
6330
6331This capability indicates that the KVM_S390_NORMAL_RESET and
6332KVM_S390_CLEAR_RESET ioctls are available.
6333
63348.23 KVM_CAP_S390_PROTECTED
6335---------------------------
6336
6337:Architectures: s390
6338
6339This capability indicates that the Ultravisor has been initialized and
6340KVM can therefore start protected VMs.
6341This capability governs the KVM_S390_PV_COMMAND ioctl and the
6342KVM_MP_STATE_LOAD MP_STATE. KVM_SET_MP_STATE can fail for protected
6343guests when the state change is invalid.
6344
63458.24 KVM_CAP_STEAL_TIME
6346-----------------------
6347
6348:Architectures: arm64, x86
6349
6350This capability indicates that KVM supports steal time accounting.
6351When steal time accounting is supported it may be enabled with
6352architecture-specific interfaces.  This capability and the architecture-
6353specific interfaces must be consistent, i.e. if one says the feature
6354is supported, than the other should as well and vice versa.  For arm64
6355see Documentation/virt/kvm/devices/vcpu.rst "KVM_ARM_VCPU_PVTIME_CTRL".
6356For x86 see Documentation/virt/kvm/msr.rst "MSR_KVM_STEAL_TIME".
6357
63588.25 KVM_CAP_S390_DIAG318
6359-------------------------
6360
6361:Architectures: s390
6362
6363This capability enables a guest to set information about its control program
6364(i.e. guest kernel type and version). The information is helpful during
6365system/firmware service events, providing additional data about the guest
6366environments running on the machine.
6367
6368The information is associated with the DIAGNOSE 0x318 instruction, which sets
6369an 8-byte value consisting of a one-byte Control Program Name Code (CPNC) and
6370a 7-byte Control Program Version Code (CPVC). The CPNC determines what
6371environment the control program is running in (e.g. Linux, z/VM...), and the
6372CPVC is used for information specific to OS (e.g. Linux version, Linux
6373distribution...)
6374
6375If this capability is available, then the CPNC and CPVC can be synchronized
6376between KVM and userspace via the sync regs mechanism (KVM_SYNC_DIAG318).
6377
63788.26 KVM_CAP_X86_USER_SPACE_MSR
6379-------------------------------
6380
6381:Architectures: x86
6382
6383This capability indicates that KVM supports deflection of MSR reads and
6384writes to user space. It can be enabled on a VM level. If enabled, MSR
6385accesses that would usually trigger a #GP by KVM into the guest will
6386instead get bounced to user space through the KVM_EXIT_X86_RDMSR and
6387KVM_EXIT_X86_WRMSR exit notifications.
6388
63898.27 KVM_X86_SET_MSR_FILTER
6390---------------------------
6391
6392:Architectures: x86
6393
6394This capability indicates that KVM supports that accesses to user defined MSRs
6395may be rejected. With this capability exposed, KVM exports new VM ioctl
6396KVM_X86_SET_MSR_FILTER which user space can call to specify bitmaps of MSR
6397ranges that KVM should reject access to.
6398
6399In combination with KVM_CAP_X86_USER_SPACE_MSR, this allows user space to
6400trap and emulate MSRs that are outside of the scope of KVM as well as
6401limit the attack surface on KVM's MSR emulation code.
6402
64038.28 KVM_CAP_ENFORCE_PV_CPUID
6404-----------------------------
6405
6406Architectures: x86
6407
6408When enabled, KVM will disable paravirtual features provided to the
6409guest according to the bits in the KVM_CPUID_FEATURES CPUID leaf
6410(0x40000001). Otherwise, a guest may use the paravirtual features
6411regardless of what has actually been exposed through the CPUID leaf.
6412
64139. Known KVM API problems
6414=========================
6415
6416In some cases, KVM's API has some inconsistencies or common pitfalls
6417that userspace need to be aware of.  This section details some of
6418these issues.
6419
6420Most of them are architecture specific, so the section is split by
6421architecture.
6422
64239.1. x86
6424--------
6425
6426``KVM_GET_SUPPORTED_CPUID`` issues
6427^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6428
6429In general, ``KVM_GET_SUPPORTED_CPUID`` is designed so that it is possible
6430to take its result and pass it directly to ``KVM_SET_CPUID2``.  This section
6431documents some cases in which that requires some care.
6432
6433Local APIC features
6434~~~~~~~~~~~~~~~~~~~
6435
6436CPU[EAX=1]:ECX[21] (X2APIC) is reported by ``KVM_GET_SUPPORTED_CPUID``,
6437but it can only be enabled if ``KVM_CREATE_IRQCHIP`` or
6438``KVM_ENABLE_CAP(KVM_CAP_IRQCHIP_SPLIT)`` are used to enable in-kernel emulation of
6439the local APIC.
6440
6441The same is true for the ``KVM_FEATURE_PV_UNHALT`` paravirtualized feature.
6442
6443CPU[EAX=1]:ECX[24] (TSC_DEADLINE) is not reported by ``KVM_GET_SUPPORTED_CPUID``.
6444It can be enabled if ``KVM_CAP_TSC_DEADLINE_TIMER`` is present and the kernel
6445has enabled in-kernel emulation of the local APIC.
6446
6447CPU topology
6448~~~~~~~~~~~~
6449
6450Several CPUID values include topology information for the host CPU:
64510x0b and 0x1f for Intel systems, 0x8000001e for AMD systems.  Different
6452versions of KVM return different values for this information and userspace
6453should not rely on it.  Currently they return all zeroes.
6454
6455If userspace wishes to set up a guest topology, it should be careful that
6456the values of these three leaves differ for each CPU.  In particular,
6457the APIC ID is found in EDX for all subleaves of 0x0b and 0x1f, and in EAX
6458for 0x8000001e; the latter also encodes the core id and node id in bits
64597:0 of EBX and ECX respectively.
6460
6461Obsolete ioctls and capabilities
6462^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6463
6464KVM_CAP_DISABLE_QUIRKS does not let userspace know which quirks are actually
6465available.  Use ``KVM_CHECK_EXTENSION(KVM_CAP_DISABLE_QUIRKS2)`` instead if
6466available.
6467
6468Ordering of KVM_GET_*/KVM_SET_* ioctls
6469^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6470
6471TBD
6472