1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * at91-sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1 4 * 5 * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries 6 * 7 * Author: Nicolas Ferre <nicolas.ferre@microcihp.com> 8 * Author: Eugen Hristev <eugen.hristev@microcihp.com> 9 */ 10#include "sama5d2.dtsi" 11#include "sama5d2-pinfunc.h" 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/mfd/atmel-flexcom.h> 14#include <dt-bindings/pinctrl/at91.h> 15 16/ { 17 model = "Microchip SAMA5D27 WLSOM1"; 18 compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5"; 19 20 aliases { 21 i2c0 = &i2c0; 22 }; 23 24 clocks { 25 slow_xtal { 26 clock-frequency = <32768>; 27 }; 28 29 main_xtal { 30 clock-frequency = <24000000>; 31 }; 32 }; 33}; 34 35&flx1 { 36 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; 37 38 uart6: serial@200 { 39 pinctrl-0 = <&pinctrl_flx1_default>; 40 pinctrl-names = "default"; 41 }; 42}; 43 44&i2c0 { 45 pinctrl-0 = <&pinctrl_i2c0_default>; 46 pinctrl-names = "default"; 47 status = "okay"; 48}; 49 50&i2c1 { 51 dmas = <0>, <0>; 52 pinctrl-names = "default"; 53 pinctrl-0 = <&pinctrl_i2c1_default>; 54 status = "okay"; 55 56 mcp16502@5b { 57 compatible = "microchip,mcp16502"; 58 reg = <0x5b>; 59 status = "okay"; 60 lpm-gpios = <&pioBU 0 GPIO_ACTIVE_LOW>; 61 62 regulators { 63 vdd_3v3: VDD_IO { 64 regulator-name = "VDD_IO"; 65 regulator-min-microvolt = <3300000>; 66 regulator-max-microvolt = <3300000>; 67 regulator-initial-mode = <2>; 68 regulator-allowed-modes = <2>, <4>; 69 regulator-always-on; 70 71 regulator-state-standby { 72 regulator-on-in-suspend; 73 regulator-mode = <4>; 74 }; 75 76 regulator-state-mem { 77 regulator-off-in-suspend; 78 regulator-mode = <4>; 79 }; 80 }; 81 82 vddio_ddr: VDD_DDR { 83 regulator-name = "VDD_DDR"; 84 regulator-min-microvolt = <1200000>; 85 regulator-max-microvolt = <1200000>; 86 regulator-initial-mode = <2>; 87 regulator-allowed-modes = <2>, <4>; 88 regulator-always-on; 89 90 regulator-state-standby { 91 regulator-on-in-suspend; 92 regulator-suspend-microvolt = <1200000>; 93 regulator-changeable-in-suspend; 94 regulator-mode = <4>; 95 }; 96 97 regulator-state-mem { 98 regulator-on-in-suspend; 99 regulator-suspend-microvolt = <1200000>; 100 regulator-changeable-in-suspend; 101 regulator-mode = <4>; 102 }; 103 }; 104 105 vdd_core: VDD_CORE { 106 regulator-name = "VDD_CORE"; 107 regulator-min-microvolt = <1250000>; 108 regulator-max-microvolt = <1250000>; 109 regulator-initial-mode = <2>; 110 regulator-allowed-modes = <2>, <4>; 111 regulator-always-on; 112 113 regulator-state-standby { 114 regulator-on-in-suspend; 115 regulator-mode = <4>; 116 }; 117 118 regulator-state-mem { 119 regulator-off-in-suspend; 120 regulator-mode = <4>; 121 }; 122 }; 123 124 vdd_ddr: VDD_OTHER { 125 regulator-name = "VDD_OTHER"; 126 regulator-min-microvolt = <1800000>; 127 regulator-max-microvolt = <1800000>; 128 regulator-initial-mode = <2>; 129 regulator-allowed-modes = <2>, <4>; 130 regulator-always-on; 131 132 regulator-state-standby { 133 regulator-on-in-suspend; 134 regulator-suspend-microvolt = <1800000>; 135 regulator-changeable-in-suspend; 136 regulator-mode = <4>; 137 }; 138 139 regulator-state-mem { 140 regulator-on-in-suspend; 141 regulator-suspend-microvolt = <1800000>; 142 regulator-changeable-in-suspend; 143 regulator-mode = <4>; 144 }; 145 }; 146 147 LDO1 { 148 regulator-name = "LDO1"; 149 regulator-min-microvolt = <3300000>; 150 regulator-max-microvolt = <3300000>; 151 regulator-always-on; 152 153 regulator-state-standby { 154 regulator-on-in-suspend; 155 }; 156 157 regulator-state-mem { 158 regulator-off-in-suspend; 159 }; 160 }; 161 162 LDO2 { 163 regulator-name = "LDO2"; 164 regulator-min-microvolt = <1800000>; 165 regulator-max-microvolt = <3300000>; 166 167 regulator-state-standby { 168 regulator-on-in-suspend; 169 }; 170 171 regulator-state-mem { 172 regulator-off-in-suspend; 173 }; 174 }; 175 }; 176 }; 177}; 178 179&macb0 { 180 pinctrl-names = "default"; 181 pinctrl-0 = <&pinctrl_macb0_default>; 182 phy-mode = "rmii"; 183 184 ethernet-phy@0 { 185 reg = <0x0>; 186 interrupt-parent = <&pioA>; 187 interrupts = <PIN_PB24 IRQ_TYPE_LEVEL_LOW>; 188 pinctrl-names = "default"; 189 pinctrl-0 = <&pinctrl_macb0_phy_irq>; 190 }; 191}; 192 193&pmc { 194 atmel,osc-bypass; 195}; 196 197&qspi1 { 198 pinctrl-names = "default"; 199 pinctrl-0 = <&pinctrl_qspi1_default>; 200 status = "disabled"; 201 202 qspi1_flash: spi_flash@0 { 203 #address-cells = <1>; 204 #size-cells = <1>; 205 compatible = "jedec,spi-nor"; 206 reg = <0>; 207 spi-max-frequency = <80000000>; 208 spi-rx-bus-width = <4>; 209 spi-tx-bus-width = <4>; 210 m25p,fast-read; 211 status = "disabled"; 212 213 at91bootstrap@0 { 214 label = "at91bootstrap"; 215 reg = <0x0 0x40000>; 216 }; 217 218 bootloader@40000 { 219 label = "bootloader"; 220 reg = <0x40000 0xc0000>; 221 }; 222 223 bootloaderenvred@100000 { 224 label = "bootloader env redundant"; 225 reg = <0x100000 0x40000>; 226 }; 227 228 bootloaderenv@140000 { 229 label = "bootloader env"; 230 reg = <0x140000 0x40000>; 231 }; 232 233 dtb@180000 { 234 label = "device tree"; 235 reg = <0x180000 0x80000>; 236 }; 237 238 kernel@200000 { 239 label = "kernel"; 240 reg = <0x200000 0x600000>; 241 }; 242 }; 243}; 244 245&pioA { 246 pinctrl_flx1_default: flx1_usart_default { 247 pinmux = <PIN_PA24__FLEXCOM1_IO0>, 248 <PIN_PA23__FLEXCOM1_IO1>, 249 <PIN_PA25__FLEXCOM1_IO3>, 250 <PIN_PA26__FLEXCOM1_IO4>; 251 bias-disable; 252 }; 253 254 pinctrl_i2c0_default: i2c0_default { 255 pinmux = <PIN_PD21__TWD0>, 256 <PIN_PD22__TWCK0>; 257 bias-disable; 258 }; 259 260 pinctrl_i2c1_default: i2c1_default { 261 pinmux = <PIN_PD19__TWD1>, 262 <PIN_PD20__TWCK1>; 263 bias-disable; 264 }; 265 266 pinctrl_macb0_default: macb0_default { 267 pinmux = <PIN_PB14__GTXCK>, 268 <PIN_PB15__GTXEN>, 269 <PIN_PB16__GRXDV>, 270 <PIN_PB17__GRXER>, 271 <PIN_PB18__GRX0>, 272 <PIN_PB19__GRX1>, 273 <PIN_PB20__GTX0>, 274 <PIN_PB21__GTX1>, 275 <PIN_PB22__GMDC>, 276 <PIN_PB23__GMDIO>; 277 bias-disable; 278 }; 279 280 pinctrl_macb0_phy_irq: macb0_phy_irq { 281 pinmux = <PIN_PB24__GPIO>; 282 bias-disable; 283 }; 284 285 pinctrl_qspi1_default: qspi1_default { 286 pinmux = <PIN_PB5__QSPI1_SCK>, 287 <PIN_PB6__QSPI1_CS>, 288 <PIN_PB7__QSPI1_IO0>, 289 <PIN_PB8__QSPI1_IO1>, 290 <PIN_PB9__QSPI1_IO2>, 291 <PIN_PB10__QSPI1_IO3>; 292 bias-pull-up; 293 }; 294}; 295 296