1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * at91-tse850-3.dts - Device Tree file for the Axentia TSE-850 3.0 board 4 * 5 * Copyright (C) 2017 Axentia Technologies AB 6 * 7 * Author: Peter Rosin <peda@axentia.se> 8 */ 9/dts-v1/; 10#include <dt-bindings/pwm/pwm.h> 11#include "at91-linea.dtsi" 12 13/ { 14 model = "Axentia TSE-850 3.0"; 15 compatible = "axentia,tse850v3", "axentia,linea", 16 "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; 17 18 sck: oscillator { 19 compatible = "fixed-clock"; 20 21 #clock-cells = <0>; 22 clock-frequency = <16000000>; 23 clock-output-names = "sck"; 24 }; 25 26 reg_3v3: regulator { 27 compatible = "regulator-fixed"; 28 29 regulator-name = "3v3-supply"; 30 regulator-min-microvolt = <3300000>; 31 regulator-max-microvolt = <3300000>; 32 }; 33 34 ana: reg-ana { 35 compatible = "pwm-regulator"; 36 37 regulator-name = "ANA"; 38 39 pwms = <&pwm0 2 1000 PWM_POLARITY_INVERTED>; 40 pwm-dutycycle-unit = <1000>; 41 pwm-dutycycle-range = <100 1000>; 42 43 regulator-min-microvolt = <2000000>; 44 regulator-max-microvolt = <20000000>; 45 regulator-ramp-delay = <1000>; 46 }; 47 48 sound { 49 compatible = "axentia,tse850-pcm5142"; 50 51 axentia,cpu-dai = <&ssc0>; 52 axentia,audio-codec = <&pcm5142>; 53 54 axentia,add-gpios = <&pioA 8 GPIO_ACTIVE_LOW>; 55 axentia,loop1-gpios = <&pioA 10 GPIO_ACTIVE_LOW>; 56 axentia,loop2-gpios = <&pioA 11 GPIO_ACTIVE_LOW>; 57 58 axentia,ana-supply = <&ana>; 59 }; 60 61 dac: dpot-dac { 62 compatible = "dpot-dac"; 63 vref-supply = <®_3v3>; 64 io-channels = <&dpot 0>; 65 io-channel-names = "dpot"; 66 #io-channel-cells = <1>; 67 }; 68 69 env_det: envelope-detector { 70 compatible = "axentia,tse850-envelope-detector"; 71 io-channels = <&dac 0>; 72 io-channel-names = "dac"; 73 #io-channel-cells = <1>; 74 75 interrupt-parent = <&pioA>; 76 interrupts = <3 IRQ_TYPE_EDGE_RISING>; 77 interrupt-names = "comp"; 78 }; 79 80 mux: mux-controller { 81 compatible = "gpio-mux"; 82 #mux-control-cells = <0>; 83 84 mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>, 85 <&pioA 1 GPIO_ACTIVE_HIGH>, 86 <&pioA 2 GPIO_ACTIVE_HIGH>; 87 idle-state = <0>; 88 }; 89 90 envelope-detector-mux { 91 compatible = "io-channel-mux"; 92 io-channels = <&env_det 0>; 93 io-channel-names = "parent"; 94 95 mux-controls = <&mux>; 96 97 channels = "", "", 98 "sync-1", 99 "in", 100 "out", 101 "sync-2", 102 "sys-reg", 103 "ana-reg"; 104 }; 105 106 leds { 107 compatible = "gpio-leds"; 108 109 ch1-red { 110 label = "ch-1:red"; 111 gpios = <&pioA 23 GPIO_ACTIVE_LOW>; 112 }; 113 ch1-green { 114 label = "ch-1:green"; 115 gpios = <&pioA 22 GPIO_ACTIVE_LOW>; 116 }; 117 ch2-red { 118 label = "ch-2:red"; 119 gpios = <&pioA 21 GPIO_ACTIVE_LOW>; 120 }; 121 ch2-green { 122 label = "ch-2:green"; 123 gpios = <&pioA 20 GPIO_ACTIVE_LOW>; 124 }; 125 data-red { 126 label = "data:red"; 127 gpios = <&pioA 19 GPIO_ACTIVE_LOW>; 128 }; 129 data-green { 130 label = "data:green"; 131 gpios = <&pioA 18 GPIO_ACTIVE_LOW>; 132 }; 133 alarm-red { 134 label = "alarm:red"; 135 gpios = <&pioA 17 GPIO_ACTIVE_LOW>; 136 }; 137 alarm-green { 138 label = "alarm:green"; 139 gpios = <&pioA 16 GPIO_ACTIVE_LOW>; 140 }; 141 }; 142}; 143 144&nand { 145 partitions { 146 compatible = "fixed-partitions"; 147 #address-cells = <1>; 148 #size-cells = <1>; 149 150 at91bootstrap@0 { 151 label = "at91bootstrap"; 152 reg = <0x0 0x40000>; 153 }; 154 155 barebox@40000 { 156 label = "bootloader"; 157 reg = <0x40000 0x60000>; 158 }; 159 160 bareboxenv@c0000 { 161 label = "bareboxenv"; 162 reg = <0xc0000 0x40000>; 163 }; 164 165 bareboxenv2@100000 { 166 label = "bareboxenv2"; 167 reg = <0x100000 0x40000>; 168 }; 169 170 oftree@180000 { 171 label = "oftree"; 172 reg = <0x180000 0x20000>; 173 }; 174 175 kernel@200000 { 176 label = "kernel"; 177 reg = <0x200000 0x500000>; 178 }; 179 180 rootfs@800000 { 181 label = "rootfs"; 182 reg = <0x800000 0x0f800000>; 183 }; 184 185 ovlfs@10000000 { 186 label = "ovlfs"; 187 reg = <0x10000000 0x10000000>; 188 }; 189 }; 190}; 191 192&ssc0 { 193 #sound-dai-cells = <0>; 194 195 status = "okay"; 196}; 197 198&i2c0 { 199 status = "okay"; 200 201 jc42@18 { 202 compatible = "nxp,se97b", "jedec,jc-42.4-temp"; 203 reg = <0x18>; 204 smbus-timeout-disable; 205 }; 206 207 dpot: mcp4651-104@28 { 208 compatible = "microchip,mcp4651-104"; 209 reg = <0x28>; 210 #io-channel-cells = <1>; 211 }; 212 213 pcm5142: pcm5142@4c { 214 compatible = "ti,pcm5142"; 215 216 reg = <0x4c>; 217 #sound-dai-cells = <0>; 218 219 AVDD-supply = <®_3v3>; 220 DVDD-supply = <®_3v3>; 221 CPVDD-supply = <®_3v3>; 222 223 clocks = <&sck>; 224 225 pll-in = <3>; 226 pll-out = <6>; 227 }; 228 229 eeprom@50 { 230 compatible = "nxp,se97b", "atmel,24c02"; 231 reg = <0x50>; 232 pagesize = <16>; 233 }; 234}; 235 236&pinctrl { 237 tse850 { 238 pinctrl_usba_vbus: usba-vbus { 239 atmel,pins = <AT91_PIOC 31 AT91_PERIPH_GPIO 240 AT91_PINCTRL_DEGLITCH>; 241 }; 242 }; 243}; 244 245&watchdog { 246 status = "okay"; 247}; 248 249&usart0 { 250 status = "okay"; 251 252 atmel,use-dma-rx; 253}; 254 255&pwm0 { 256 status = "okay"; 257 258 pinctrl-0 = <&pinctrl_pwm0_pwml2_1>; 259 pinctrl-names = "default"; 260}; 261 262&macb1 { 263 status = "okay"; 264 265 phy-mode = "rmii"; 266 267 #address-cells = <1>; 268 #size-cells = <0>; 269 270 phy0: ethernet-phy@3 { 271 reg = <3>; 272 273 interrupt-parent = <&pioE>; 274 interrupts = <31 IRQ_TYPE_EDGE_FALLING>; 275 }; 276}; 277 278&usb0 { 279 status = "okay"; 280 281 pinctrl-names = "default"; 282 pinctrl-0 = <&pinctrl_usba_vbus>; 283 atmel,vbus-gpio = <&pioC 31 GPIO_ACTIVE_HIGH>; 284}; 285 286&usb1 { 287 status = "okay"; 288 289 num-ports = <1>; 290 atmel,vbus-gpio = <&pioD 29 GPIO_ACTIVE_HIGH>; 291 atmel,oc-gpio = <&pioC 15 GPIO_ACTIVE_LOW>; 292}; 293 294&usb2 { 295 status = "okay"; 296}; 297 298&dbgu { 299 status = "okay"; 300 301 dmas = <0>, <0>; /* Do not use DMA for dbgu */ 302}; 303