1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * arch/arm/boot/dts/axm5516-cpus.dtsi 4 * 5 * Copyright (C) 2013 LSI 6 */ 7 8/ { 9 cpus { 10 #address-cells = <1>; 11 #size-cells = <0>; 12 13 cpu-map { 14 cluster0 { 15 core0 { 16 cpu = <&CPU0>; 17 }; 18 core1 { 19 cpu = <&CPU1>; 20 }; 21 core2 { 22 cpu = <&CPU2>; 23 }; 24 core3 { 25 cpu = <&CPU3>; 26 }; 27 }; 28 cluster1 { 29 core0 { 30 cpu = <&CPU4>; 31 }; 32 core1 { 33 cpu = <&CPU5>; 34 }; 35 core2 { 36 cpu = <&CPU6>; 37 }; 38 core3 { 39 cpu = <&CPU7>; 40 }; 41 }; 42 cluster2 { 43 core0 { 44 cpu = <&CPU8>; 45 }; 46 core1 { 47 cpu = <&CPU9>; 48 }; 49 core2 { 50 cpu = <&CPU10>; 51 }; 52 core3 { 53 cpu = <&CPU11>; 54 }; 55 }; 56 cluster3 { 57 core0 { 58 cpu = <&CPU12>; 59 }; 60 core1 { 61 cpu = <&CPU13>; 62 }; 63 core2 { 64 cpu = <&CPU14>; 65 }; 66 core3 { 67 cpu = <&CPU15>; 68 }; 69 }; 70 }; 71 72 CPU0: cpu@0 { 73 device_type = "cpu"; 74 compatible = "arm,cortex-a15"; 75 reg = <0x00>; 76 clock-frequency= <1400000000>; 77 cpu-release-addr = <0>; // Fixed by the boot loader 78 }; 79 80 CPU1: cpu@1 { 81 device_type = "cpu"; 82 compatible = "arm,cortex-a15"; 83 reg = <0x01>; 84 clock-frequency= <1400000000>; 85 cpu-release-addr = <0>; // Fixed by the boot loader 86 }; 87 88 CPU2: cpu@2 { 89 device_type = "cpu"; 90 compatible = "arm,cortex-a15"; 91 reg = <0x02>; 92 clock-frequency= <1400000000>; 93 cpu-release-addr = <0>; // Fixed by the boot loader 94 }; 95 96 CPU3: cpu@3 { 97 device_type = "cpu"; 98 compatible = "arm,cortex-a15"; 99 reg = <0x03>; 100 clock-frequency= <1400000000>; 101 cpu-release-addr = <0>; // Fixed by the boot loader 102 }; 103 104 CPU4: cpu@100 { 105 device_type = "cpu"; 106 compatible = "arm,cortex-a15"; 107 reg = <0x100>; 108 clock-frequency= <1400000000>; 109 cpu-release-addr = <0>; // Fixed by the boot loader 110 }; 111 112 CPU5: cpu@101 { 113 device_type = "cpu"; 114 compatible = "arm,cortex-a15"; 115 reg = <0x101>; 116 clock-frequency= <1400000000>; 117 cpu-release-addr = <0>; // Fixed by the boot loader 118 }; 119 120 CPU6: cpu@102 { 121 device_type = "cpu"; 122 compatible = "arm,cortex-a15"; 123 reg = <0x102>; 124 clock-frequency= <1400000000>; 125 cpu-release-addr = <0>; // Fixed by the boot loader 126 }; 127 128 CPU7: cpu@103 { 129 device_type = "cpu"; 130 compatible = "arm,cortex-a15"; 131 reg = <0x103>; 132 clock-frequency= <1400000000>; 133 cpu-release-addr = <0>; // Fixed by the boot loader 134 }; 135 136 CPU8: cpu@200 { 137 device_type = "cpu"; 138 compatible = "arm,cortex-a15"; 139 reg = <0x200>; 140 clock-frequency= <1400000000>; 141 cpu-release-addr = <0>; // Fixed by the boot loader 142 }; 143 144 CPU9: cpu@201 { 145 device_type = "cpu"; 146 compatible = "arm,cortex-a15"; 147 reg = <0x201>; 148 clock-frequency= <1400000000>; 149 cpu-release-addr = <0>; // Fixed by the boot loader 150 }; 151 152 CPU10: cpu@202 { 153 device_type = "cpu"; 154 compatible = "arm,cortex-a15"; 155 reg = <0x202>; 156 clock-frequency= <1400000000>; 157 cpu-release-addr = <0>; // Fixed by the boot loader 158 }; 159 160 CPU11: cpu@203 { 161 device_type = "cpu"; 162 compatible = "arm,cortex-a15"; 163 reg = <0x203>; 164 clock-frequency= <1400000000>; 165 cpu-release-addr = <0>; // Fixed by the boot loader 166 }; 167 168 CPU12: cpu@300 { 169 device_type = "cpu"; 170 compatible = "arm,cortex-a15"; 171 reg = <0x300>; 172 clock-frequency= <1400000000>; 173 cpu-release-addr = <0>; // Fixed by the boot loader 174 }; 175 176 CPU13: cpu@301 { 177 device_type = "cpu"; 178 compatible = "arm,cortex-a15"; 179 reg = <0x301>; 180 clock-frequency= <1400000000>; 181 cpu-release-addr = <0>; // Fixed by the boot loader 182 }; 183 184 CPU14: cpu@302 { 185 device_type = "cpu"; 186 compatible = "arm,cortex-a15"; 187 reg = <0x302>; 188 clock-frequency= <1400000000>; 189 cpu-release-addr = <0>; // Fixed by the boot loader 190 }; 191 192 CPU15: cpu@303 { 193 device_type = "cpu"; 194 compatible = "arm,cortex-a15"; 195 reg = <0x303>; 196 clock-frequency= <1400000000>; 197 cpu-release-addr = <0>; // Fixed by the boot loader 198 }; 199 }; 200}; 201