1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2019, Linaro Ltd. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 10#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11#include <dt-bindings/sound/qcom,q6afe.h> 12#include <dt-bindings/sound/qcom,q6asm.h> 13#include "sdm845.dtsi" 14#include "pm8998.dtsi" 15#include "pmi8998.dtsi" 16 17/ { 18 model = "Thundercomm Dragonboard 845c"; 19 compatible = "thundercomm,db845c", "qcom,sdm845"; 20 21 aliases { 22 serial0 = &uart9; 23 hsuart0 = &uart6; 24 }; 25 26 chosen { 27 stdout-path = "serial0:115200n8"; 28 }; 29 30 dc12v: dc12v-regulator { 31 compatible = "regulator-fixed"; 32 regulator-name = "DC12V"; 33 regulator-min-microvolt = <12000000>; 34 regulator-max-microvolt = <12000000>; 35 regulator-always-on; 36 }; 37 38 gpio_keys { 39 compatible = "gpio-keys"; 40 autorepeat; 41 42 pinctrl-names = "default"; 43 pinctrl-0 = <&vol_up_pin_a>; 44 45 vol-up { 46 label = "Volume Up"; 47 linux,code = <KEY_VOLUMEUP>; 48 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>; 49 }; 50 }; 51 52 leds { 53 compatible = "gpio-leds"; 54 55 user4 { 56 label = "green:user4"; 57 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>; 58 default-state = "off"; 59 panic-indicator; 60 }; 61 62 wlan { 63 label = "yellow:wlan"; 64 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>; 65 linux,default-trigger = "phy0tx"; 66 default-state = "off"; 67 }; 68 69 bt { 70 label = "blue:bt"; 71 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>; 72 linux,default-trigger = "bluetooth-power"; 73 default-state = "off"; 74 }; 75 }; 76 77 hdmi-out { 78 compatible = "hdmi-connector"; 79 type = "a"; 80 81 port { 82 hdmi_con: endpoint { 83 remote-endpoint = <<9611_out>; 84 }; 85 }; 86 }; 87 88 reserved-memory { 89 /* Cont splash region set up by the bootloader */ 90 cont_splash_mem: framebuffer@9d400000 { 91 reg = <0x0 0x9d400000 0x0 0x2400000>; 92 no-map; 93 }; 94 }; 95 96 lt9611_1v8: lt9611-vdd18-regulator { 97 compatible = "regulator-fixed"; 98 regulator-name = "LT9611_1V8"; 99 100 vin-supply = <&vdc_5v>; 101 regulator-min-microvolt = <1800000>; 102 regulator-max-microvolt = <1800000>; 103 104 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 105 enable-active-high; 106 }; 107 108 lt9611_3v3: lt9611-3v3 { 109 compatible = "regulator-fixed"; 110 regulator-name = "LT9611_3V3"; 111 112 vin-supply = <&vdc_3v3>; 113 regulator-min-microvolt = <3300000>; 114 regulator-max-microvolt = <3300000>; 115 116 // TODO: make it possible to drive same GPIO from two clients 117 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 118 // enable-active-high; 119 }; 120 121 pcie0_1p05v: pcie-0-1p05v-regulator { 122 compatible = "regulator-fixed"; 123 regulator-name = "PCIE0_1.05V"; 124 125 vin-supply = <&vbat>; 126 regulator-min-microvolt = <1050000>; 127 regulator-max-microvolt = <1050000>; 128 129 // TODO: make it possible to drive same GPIO from two clients 130 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 131 // enable-active-high; 132 }; 133 134 cam0_dvdd_1v2: reg_cam0_dvdd_1v2 { 135 compatible = "regulator-fixed"; 136 regulator-name = "CAM0_DVDD_1V2"; 137 regulator-min-microvolt = <1200000>; 138 regulator-max-microvolt = <1200000>; 139 enable-active-high; 140 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>; 141 pinctrl-names = "default"; 142 pinctrl-0 = <&cam0_dvdd_1v2_en_default>; 143 vin-supply = <&vbat>; 144 }; 145 146 cam0_avdd_2v8: reg_cam0_avdd_2v8 { 147 compatible = "regulator-fixed"; 148 regulator-name = "CAM0_AVDD_2V8"; 149 regulator-min-microvolt = <2800000>; 150 regulator-max-microvolt = <2800000>; 151 enable-active-high; 152 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>; 153 pinctrl-names = "default"; 154 pinctrl-0 = <&cam0_avdd_2v8_en_default>; 155 vin-supply = <&vbat>; 156 }; 157 158 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */ 159 cam3_avdd_2v8: reg_cam3_avdd_2v8 { 160 compatible = "regulator-fixed"; 161 regulator-name = "CAM3_AVDD_2V8"; 162 regulator-min-microvolt = <2800000>; 163 regulator-max-microvolt = <2800000>; 164 regulator-always-on; 165 vin-supply = <&vbat>; 166 }; 167 168 pcie0_3p3v_dual: vldo-3v3-regulator { 169 compatible = "regulator-fixed"; 170 regulator-name = "VLDO_3V3"; 171 172 vin-supply = <&vbat>; 173 regulator-min-microvolt = <3300000>; 174 regulator-max-microvolt = <3300000>; 175 176 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 177 enable-active-high; 178 179 pinctrl-names = "default"; 180 pinctrl-0 = <&pcie0_pwren_state>; 181 }; 182 183 v5p0_hdmiout: v5p0-hdmiout-regulator { 184 compatible = "regulator-fixed"; 185 regulator-name = "V5P0_HDMIOUT"; 186 187 vin-supply = <&vdc_5v>; 188 regulator-min-microvolt = <500000>; 189 regulator-max-microvolt = <500000>; 190 191 // TODO: make it possible to drive same GPIO from two clients 192 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 193 // enable-active-high; 194 }; 195 196 vbat: vbat-regulator { 197 compatible = "regulator-fixed"; 198 regulator-name = "VBAT"; 199 200 vin-supply = <&dc12v>; 201 regulator-min-microvolt = <4200000>; 202 regulator-max-microvolt = <4200000>; 203 regulator-always-on; 204 }; 205 206 vbat_som: vbat-som-regulator { 207 compatible = "regulator-fixed"; 208 regulator-name = "VBAT_SOM"; 209 210 vin-supply = <&dc12v>; 211 regulator-min-microvolt = <4200000>; 212 regulator-max-microvolt = <4200000>; 213 regulator-always-on; 214 }; 215 216 vdc_3v3: vdc-3v3-regulator { 217 compatible = "regulator-fixed"; 218 regulator-name = "VDC_3V3"; 219 vin-supply = <&dc12v>; 220 regulator-min-microvolt = <3300000>; 221 regulator-max-microvolt = <3300000>; 222 regulator-always-on; 223 }; 224 225 vdc_5v: vdc-5v-regulator { 226 compatible = "regulator-fixed"; 227 regulator-name = "VDC_5V"; 228 229 vin-supply = <&dc12v>; 230 regulator-min-microvolt = <500000>; 231 regulator-max-microvolt = <500000>; 232 regulator-always-on; 233 }; 234 235 vreg_s4a_1p8: vreg-s4a-1p8 { 236 compatible = "regulator-fixed"; 237 regulator-name = "vreg_s4a_1p8"; 238 239 regulator-min-microvolt = <1800000>; 240 regulator-max-microvolt = <1800000>; 241 regulator-always-on; 242 }; 243 244 vph_pwr: vph-pwr-regulator { 245 compatible = "regulator-fixed"; 246 regulator-name = "vph_pwr"; 247 248 vin-supply = <&vbat_som>; 249 }; 250}; 251 252&adsp_pas { 253 status = "okay"; 254 255 firmware-name = "qcom/sdm845/adsp.mdt"; 256}; 257 258&apps_rsc { 259 pm8998-rpmh-regulators { 260 compatible = "qcom,pm8998-rpmh-regulators"; 261 qcom,pmic-id = "a"; 262 vdd-s1-supply = <&vph_pwr>; 263 vdd-s2-supply = <&vph_pwr>; 264 vdd-s3-supply = <&vph_pwr>; 265 vdd-s4-supply = <&vph_pwr>; 266 vdd-s5-supply = <&vph_pwr>; 267 vdd-s6-supply = <&vph_pwr>; 268 vdd-s7-supply = <&vph_pwr>; 269 vdd-s8-supply = <&vph_pwr>; 270 vdd-s9-supply = <&vph_pwr>; 271 vdd-s10-supply = <&vph_pwr>; 272 vdd-s11-supply = <&vph_pwr>; 273 vdd-s12-supply = <&vph_pwr>; 274 vdd-s13-supply = <&vph_pwr>; 275 vdd-l1-l27-supply = <&vreg_s7a_1p025>; 276 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; 277 vdd-l3-l11-supply = <&vreg_s7a_1p025>; 278 vdd-l4-l5-supply = <&vreg_s7a_1p025>; 279 vdd-l6-supply = <&vph_pwr>; 280 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; 281 vdd-l9-supply = <&vreg_bob>; 282 vdd-l10-l23-l25-supply = <&vreg_bob>; 283 vdd-l13-l19-l21-supply = <&vreg_bob>; 284 vdd-l16-l28-supply = <&vreg_bob>; 285 vdd-l18-l22-supply = <&vreg_bob>; 286 vdd-l20-l24-supply = <&vreg_bob>; 287 vdd-l26-supply = <&vreg_s3a_1p35>; 288 vin-lvs-1-2-supply = <&vreg_s4a_1p8>; 289 290 vreg_s3a_1p35: smps3 { 291 regulator-min-microvolt = <1352000>; 292 regulator-max-microvolt = <1352000>; 293 }; 294 295 vreg_s5a_2p04: smps5 { 296 regulator-min-microvolt = <1904000>; 297 regulator-max-microvolt = <2040000>; 298 }; 299 300 vreg_s7a_1p025: smps7 { 301 regulator-min-microvolt = <900000>; 302 regulator-max-microvolt = <1028000>; 303 }; 304 305 vreg_l1a_0p875: ldo1 { 306 regulator-min-microvolt = <880000>; 307 regulator-max-microvolt = <880000>; 308 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 309 }; 310 311 vreg_l5a_0p8: ldo5 { 312 regulator-min-microvolt = <800000>; 313 regulator-max-microvolt = <800000>; 314 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 315 }; 316 317 vreg_l12a_1p8: ldo12 { 318 regulator-min-microvolt = <1800000>; 319 regulator-max-microvolt = <1800000>; 320 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 321 }; 322 323 vreg_l7a_1p8: ldo7 { 324 regulator-min-microvolt = <1800000>; 325 regulator-max-microvolt = <1800000>; 326 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 327 }; 328 329 vreg_l13a_2p95: ldo13 { 330 regulator-min-microvolt = <1800000>; 331 regulator-max-microvolt = <2960000>; 332 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 333 }; 334 335 vreg_l17a_1p3: ldo17 { 336 regulator-min-microvolt = <1304000>; 337 regulator-max-microvolt = <1304000>; 338 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 339 }; 340 341 vreg_l20a_2p95: ldo20 { 342 regulator-min-microvolt = <2960000>; 343 regulator-max-microvolt = <2968000>; 344 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 345 }; 346 347 vreg_l21a_2p95: ldo21 { 348 regulator-min-microvolt = <2960000>; 349 regulator-max-microvolt = <2968000>; 350 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 351 }; 352 353 vreg_l24a_3p075: ldo24 { 354 regulator-min-microvolt = <3088000>; 355 regulator-max-microvolt = <3088000>; 356 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 357 }; 358 359 vreg_l25a_3p3: ldo25 { 360 regulator-min-microvolt = <3300000>; 361 regulator-max-microvolt = <3312000>; 362 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 363 }; 364 365 vreg_l26a_1p2: ldo26 { 366 regulator-min-microvolt = <1200000>; 367 regulator-max-microvolt = <1200000>; 368 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 369 }; 370 371 vreg_lvs1a_1p8: lvs1 { 372 regulator-min-microvolt = <1800000>; 373 regulator-max-microvolt = <1800000>; 374 regulator-always-on; 375 }; 376 377 vreg_lvs2a_1p8: lvs2 { 378 regulator-min-microvolt = <1800000>; 379 regulator-max-microvolt = <1800000>; 380 regulator-always-on; 381 }; 382 }; 383 384 pmi8998-rpmh-regulators { 385 compatible = "qcom,pmi8998-rpmh-regulators"; 386 qcom,pmic-id = "b"; 387 388 vdd-bob-supply = <&vph_pwr>; 389 390 vreg_bob: bob { 391 regulator-min-microvolt = <3312000>; 392 regulator-max-microvolt = <3600000>; 393 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 394 regulator-allow-bypass; 395 }; 396 }; 397}; 398 399&cdsp_pas { 400 status = "okay"; 401 firmware-name = "qcom/sdm845/cdsp.mdt"; 402}; 403 404&dsi0 { 405 status = "okay"; 406 vdda-supply = <&vreg_l26a_1p2>; 407 408 ports { 409 port@1 { 410 endpoint { 411 remote-endpoint = <<9611_a>; 412 data-lanes = <0 1 2 3>; 413 }; 414 }; 415 }; 416}; 417 418&dsi0_phy { 419 status = "okay"; 420 vdds-supply = <&vreg_l1a_0p875>; 421}; 422 423&gcc { 424 protected-clocks = <GCC_QSPI_CORE_CLK>, 425 <GCC_QSPI_CORE_CLK_SRC>, 426 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 427 <GCC_LPASS_Q6_AXI_CLK>, 428 <GCC_LPASS_SWAY_CLK>; 429}; 430 431&gpu { 432 zap-shader { 433 memory-region = <&gpu_mem>; 434 firmware-name = "qcom/sdm845/a630_zap.mbn"; 435 }; 436}; 437 438&i2c10 { 439 status = "okay"; 440 clock-frequency = <400000>; 441 442 lt9611_codec: hdmi-bridge@3b { 443 compatible = "lontium,lt9611"; 444 reg = <0x3b>; 445 #sound-dai-cells = <1>; 446 447 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>; 448 449 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>; 450 451 vdd-supply = <<9611_1v8>; 452 vcc-supply = <<9611_3v3>; 453 454 pinctrl-names = "default"; 455 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>; 456 457 ports { 458 #address-cells = <1>; 459 #size-cells = <0>; 460 461 port@0 { 462 reg = <0>; 463 464 lt9611_a: endpoint { 465 remote-endpoint = <&dsi0_out>; 466 }; 467 }; 468 469 port@2 { 470 reg = <2>; 471 472 lt9611_out: endpoint { 473 remote-endpoint = <&hdmi_con>; 474 }; 475 }; 476 }; 477 }; 478}; 479 480&i2c11 { 481 /* On Low speed expansion */ 482 label = "LS-I2C1"; 483 status = "okay"; 484}; 485 486&i2c14 { 487 /* On Low speed expansion */ 488 label = "LS-I2C0"; 489 status = "okay"; 490}; 491 492&mdss { 493 status = "okay"; 494}; 495 496&mdss_mdp { 497 status = "okay"; 498}; 499 500&mss_pil { 501 status = "okay"; 502 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn"; 503}; 504 505&pcie0 { 506 status = "okay"; 507 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>; 508 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>; 509 510 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 511 512 pinctrl-names = "default"; 513 pinctrl-0 = <&pcie0_default_state>; 514}; 515 516&pcie0_phy { 517 status = "okay"; 518 519 vdda-phy-supply = <&vreg_l1a_0p875>; 520 vdda-pll-supply = <&vreg_l26a_1p2>; 521}; 522 523&pcie1 { 524 status = "okay"; 525 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>; 526 527 pinctrl-names = "default"; 528 pinctrl-0 = <&pcie1_default_state>; 529}; 530 531&pcie1_phy { 532 status = "okay"; 533 534 vdda-phy-supply = <&vreg_l1a_0p875>; 535 vdda-pll-supply = <&vreg_l26a_1p2>; 536}; 537 538&pm8998_gpio { 539 gpio-line-names = 540 "NC", 541 "NC", 542 "WLAN_SW_CTRL", 543 "NC", 544 "PM_GPIO5_BLUE_BT_LED", 545 "VOL_UP_N", 546 "NC", 547 "ADC_IN1", 548 "PM_GPIO9_YEL_WIFI_LED", 549 "CAM0_AVDD_EN", 550 "NC", 551 "CAM0_DVDD_EN", 552 "PM_GPIO13_GREEN_U4_LED", 553 "DIV_CLK2", 554 "NC", 555 "NC", 556 "NC", 557 "SMB_STAT", 558 "NC", 559 "NC", 560 "ADC_IN2", 561 "OPTION1", 562 "WCSS_PWR_REQ", 563 "PM845_GPIO24", 564 "OPTION2", 565 "PM845_SLB"; 566 567 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en { 568 pins = "gpio12"; 569 function = "normal"; 570 571 bias-pull-up; 572 drive-push-pull; 573 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 574 }; 575 576 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en { 577 pins = "gpio10"; 578 function = "normal"; 579 580 bias-pull-up; 581 drive-push-pull; 582 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 583 }; 584 585 vol_up_pin_a: vol-up-active { 586 pins = "gpio6"; 587 function = "normal"; 588 input-enable; 589 bias-pull-up; 590 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 591 }; 592}; 593 594&pm8998_pon { 595 resin { 596 compatible = "qcom,pm8941-resin"; 597 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; 598 debounce = <15625>; 599 bias-pull-up; 600 linux,code = <KEY_VOLUMEDOWN>; 601 }; 602}; 603 604/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */ 605&q6afedai { 606 qi2s@22 { 607 reg = <22>; 608 qcom,sd-lines = <0 1 2 3>; 609 }; 610}; 611 612&q6asmdai { 613 dai@0 { 614 reg = <0>; 615 }; 616 617 dai@1 { 618 reg = <1>; 619 }; 620 621 dai@2 { 622 reg = <2>; 623 }; 624 625 dai@3 { 626 reg = <3>; 627 direction = <2>; 628 is-compress-dai; 629 }; 630}; 631 632&qupv3_id_0 { 633 status = "okay"; 634}; 635 636&qupv3_id_1 { 637 status = "okay"; 638}; 639 640&sdhc_2 { 641 status = "okay"; 642 643 pinctrl-names = "default"; 644 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 645 646 vmmc-supply = <&vreg_l21a_2p95>; 647 vqmmc-supply = <&vreg_l13a_2p95>; 648 649 bus-width = <4>; 650 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; 651}; 652 653&sound { 654 compatible = "qcom,db845c-sndcard"; 655 pinctrl-0 = <&quat_mi2s_active 656 &quat_mi2s_sd0_active 657 &quat_mi2s_sd1_active 658 &quat_mi2s_sd2_active 659 &quat_mi2s_sd3_active>; 660 pinctrl-names = "default"; 661 model = "DB845c"; 662 audio-routing = 663 "RX_BIAS", "MCLK", 664 "AMIC1", "MIC BIAS1", 665 "AMIC2", "MIC BIAS2", 666 "DMIC0", "MIC BIAS1", 667 "DMIC1", "MIC BIAS1", 668 "DMIC2", "MIC BIAS3", 669 "DMIC3", "MIC BIAS3", 670 "SpkrLeft IN", "SPK1 OUT", 671 "SpkrRight IN", "SPK2 OUT", 672 "MM_DL1", "MultiMedia1 Playback", 673 "MM_DL2", "MultiMedia2 Playback", 674 "MM_DL4", "MultiMedia4 Playback", 675 "MultiMedia3 Capture", "MM_UL3"; 676 677 mm1-dai-link { 678 link-name = "MultiMedia1"; 679 cpu { 680 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; 681 }; 682 }; 683 684 mm2-dai-link { 685 link-name = "MultiMedia2"; 686 cpu { 687 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; 688 }; 689 }; 690 691 mm3-dai-link { 692 link-name = "MultiMedia3"; 693 cpu { 694 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; 695 }; 696 }; 697 698 mm4-dai-link { 699 link-name = "MultiMedia4"; 700 cpu { 701 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; 702 }; 703 }; 704 705 hdmi-dai-link { 706 link-name = "HDMI Playback"; 707 cpu { 708 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; 709 }; 710 711 platform { 712 sound-dai = <&q6routing>; 713 }; 714 715 codec { 716 sound-dai = <<9611_codec 0>; 717 }; 718 }; 719 720 slim-dai-link { 721 link-name = "SLIM Playback"; 722 cpu { 723 sound-dai = <&q6afedai SLIMBUS_0_RX>; 724 }; 725 726 platform { 727 sound-dai = <&q6routing>; 728 }; 729 730 codec { 731 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>; 732 }; 733 }; 734 735 slimcap-dai-link { 736 link-name = "SLIM Capture"; 737 cpu { 738 sound-dai = <&q6afedai SLIMBUS_0_TX>; 739 }; 740 741 platform { 742 sound-dai = <&q6routing>; 743 }; 744 745 codec { 746 sound-dai = <&wcd9340 1>; 747 }; 748 }; 749}; 750 751&spi2 { 752 /* On Low speed expansion */ 753 label = "LS-SPI0"; 754 status = "okay"; 755}; 756 757&tlmm { 758 cam0_default: cam0_default { 759 rst { 760 pins = "gpio9"; 761 function = "gpio"; 762 763 drive-strength = <16>; 764 bias-disable; 765 }; 766 767 mclk0 { 768 pins = "gpio13"; 769 function = "cam_mclk"; 770 771 drive-strength = <16>; 772 bias-disable; 773 }; 774 }; 775 776 cam3_default: cam3_default { 777 rst { 778 function = "gpio"; 779 pins = "gpio21"; 780 781 drive-strength = <16>; 782 bias-disable; 783 }; 784 785 mclk3 { 786 function = "cam_mclk"; 787 pins = "gpio16"; 788 789 drive-strength = <16>; 790 bias-disable; 791 }; 792 }; 793 794 dsi_sw_sel: dsi-sw-sel { 795 pins = "gpio120"; 796 function = "gpio"; 797 798 drive-strength = <2>; 799 bias-disable; 800 output-high; 801 }; 802 803 lt9611_irq_pin: lt9611-irq { 804 pins = "gpio84"; 805 function = "gpio"; 806 bias-disable; 807 }; 808 809 pcie0_default_state: pcie0-default { 810 clkreq { 811 pins = "gpio36"; 812 function = "pci_e0"; 813 bias-pull-up; 814 }; 815 816 reset-n { 817 pins = "gpio35"; 818 function = "gpio"; 819 820 drive-strength = <2>; 821 output-low; 822 bias-pull-down; 823 }; 824 825 wake-n { 826 pins = "gpio37"; 827 function = "gpio"; 828 829 drive-strength = <2>; 830 bias-pull-up; 831 }; 832 }; 833 834 pcie0_pwren_state: pcie0-pwren { 835 pins = "gpio90"; 836 function = "gpio"; 837 838 drive-strength = <2>; 839 bias-disable; 840 }; 841 842 pcie1_default_state: pcie1-default { 843 perst-n { 844 pins = "gpio102"; 845 function = "gpio"; 846 847 drive-strength = <16>; 848 bias-disable; 849 }; 850 851 clkreq { 852 pins = "gpio103"; 853 function = "pci_e1"; 854 bias-pull-up; 855 }; 856 857 wake-n { 858 pins = "gpio11"; 859 function = "gpio"; 860 861 drive-strength = <2>; 862 bias-pull-up; 863 }; 864 865 reset-n { 866 pins = "gpio75"; 867 function = "gpio"; 868 869 drive-strength = <16>; 870 bias-pull-up; 871 output-high; 872 }; 873 }; 874 875 sdc2_default_state: sdc2-default { 876 clk { 877 pins = "sdc2_clk"; 878 bias-disable; 879 880 /* 881 * It seems that mmc_test reports errors if drive 882 * strength is not 16 on clk, cmd, and data pins. 883 */ 884 drive-strength = <16>; 885 }; 886 887 cmd { 888 pins = "sdc2_cmd"; 889 bias-pull-up; 890 drive-strength = <10>; 891 }; 892 893 data { 894 pins = "sdc2_data"; 895 bias-pull-up; 896 drive-strength = <10>; 897 }; 898 }; 899 900 sdc2_card_det_n: sd-card-det-n { 901 pins = "gpio126"; 902 function = "gpio"; 903 bias-pull-up; 904 }; 905 906 wcd_intr_default: wcd_intr_default { 907 pins = "gpio54"; 908 function = "gpio"; 909 910 input-enable; 911 bias-pull-down; 912 drive-strength = <2>; 913 }; 914}; 915 916&uart3 { 917 label = "LS-UART0"; 918 status = "disabled"; 919}; 920 921&uart6 { 922 status = "okay"; 923 924 bluetooth { 925 compatible = "qcom,wcn3990-bt"; 926 927 vddio-supply = <&vreg_s4a_1p8>; 928 vddxo-supply = <&vreg_l7a_1p8>; 929 vddrf-supply = <&vreg_l17a_1p3>; 930 vddch0-supply = <&vreg_l25a_3p3>; 931 max-speed = <3200000>; 932 }; 933}; 934 935&uart9 { 936 label = "LS-UART1"; 937 status = "okay"; 938}; 939 940&usb_1 { 941 status = "okay"; 942}; 943 944&usb_1_dwc3 { 945 dr_mode = "peripheral"; 946}; 947 948&usb_1_hsphy { 949 status = "okay"; 950 951 vdd-supply = <&vreg_l1a_0p875>; 952 vdda-pll-supply = <&vreg_l12a_1p8>; 953 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 954 955 qcom,imp-res-offset-value = <8>; 956 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 957 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; 958 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; 959}; 960 961&usb_1_qmpphy { 962 status = "okay"; 963 964 vdda-phy-supply = <&vreg_l26a_1p2>; 965 vdda-pll-supply = <&vreg_l1a_0p875>; 966}; 967 968&usb_2 { 969 status = "okay"; 970}; 971 972&usb_2_dwc3 { 973 dr_mode = "host"; 974}; 975 976&usb_2_hsphy { 977 status = "okay"; 978 979 vdd-supply = <&vreg_l1a_0p875>; 980 vdda-pll-supply = <&vreg_l12a_1p8>; 981 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 982 983 qcom,imp-res-offset-value = <8>; 984 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>; 985}; 986 987&usb_2_qmpphy { 988 status = "okay"; 989 990 vdda-phy-supply = <&vreg_l26a_1p2>; 991 vdda-pll-supply = <&vreg_l1a_0p875>; 992}; 993 994&ufs_mem_hc { 995 status = "okay"; 996 997 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 998 999 vcc-supply = <&vreg_l20a_2p95>; 1000 vcc-max-microamp = <800000>; 1001}; 1002 1003&ufs_mem_phy { 1004 status = "okay"; 1005 1006 vdda-phy-supply = <&vreg_l1a_0p875>; 1007 vdda-pll-supply = <&vreg_l26a_1p2>; 1008}; 1009 1010&wcd9340{ 1011 pinctrl-0 = <&wcd_intr_default>; 1012 pinctrl-names = "default"; 1013 clock-names = "extclk"; 1014 clocks = <&rpmhcc RPMH_LN_BB_CLK2>; 1015 reset-gpios = <&tlmm 64 0>; 1016 vdd-buck-supply = <&vreg_s4a_1p8>; 1017 vdd-buck-sido-supply = <&vreg_s4a_1p8>; 1018 vdd-tx-supply = <&vreg_s4a_1p8>; 1019 vdd-rx-supply = <&vreg_s4a_1p8>; 1020 vdd-io-supply = <&vreg_s4a_1p8>; 1021 1022 swm: swm@c85 { 1023 left_spkr: wsa8810-left{ 1024 compatible = "sdw10217201000"; 1025 reg = <0 1>; 1026 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; 1027 #thermal-sensor-cells = <0>; 1028 sound-name-prefix = "SpkrLeft"; 1029 #sound-dai-cells = <0>; 1030 }; 1031 1032 right_spkr: wsa8810-right{ 1033 compatible = "sdw10217201000"; 1034 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; 1035 reg = <0 2>; 1036 #thermal-sensor-cells = <0>; 1037 sound-name-prefix = "SpkrRight"; 1038 #sound-dai-cells = <0>; 1039 }; 1040 }; 1041}; 1042 1043&wifi { 1044 status = "okay"; 1045 1046 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 1047 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1048 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 1049 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 1050 1051 qcom,snoc-host-cap-8bit-quirk; 1052}; 1053 1054/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 1055&qup_spi2_default { 1056 pinconf { 1057 pins = "gpio27", "gpio28", "gpio29", "gpio30"; 1058 drive-strength = <16>; 1059 }; 1060}; 1061 1062&qup_uart3_default{ 1063 pinmux { 1064 pins = "gpio41", "gpio42", "gpio43", "gpio44"; 1065 function = "qup3"; 1066 }; 1067}; 1068 1069&qup_i2c10_default { 1070 pinconf { 1071 pins = "gpio55", "gpio56"; 1072 drive-strength = <2>; 1073 bias-disable; 1074 }; 1075}; 1076 1077&qup_uart6_default { 1078 pinmux { 1079 pins = "gpio45", "gpio46", "gpio47", "gpio48"; 1080 function = "qup6"; 1081 }; 1082 1083 cts { 1084 pins = "gpio45"; 1085 bias-disable; 1086 }; 1087 1088 rts-tx { 1089 pins = "gpio46", "gpio47"; 1090 drive-strength = <2>; 1091 bias-disable; 1092 }; 1093 1094 rx { 1095 pins = "gpio48"; 1096 bias-pull-up; 1097 }; 1098}; 1099 1100&qup_uart9_default { 1101 pinconf-tx { 1102 pins = "gpio4"; 1103 drive-strength = <2>; 1104 bias-disable; 1105 }; 1106 1107 pinconf-rx { 1108 pins = "gpio5"; 1109 drive-strength = <2>; 1110 bias-pull-up; 1111 }; 1112}; 1113 1114&pm8998_gpio { 1115 1116}; 1117 1118&cci { 1119 status = "okay"; 1120}; 1121 1122&cci_i2c0 { 1123 camera@10 { 1124 compatible = "ovti,ov8856"; 1125 reg = <0x10>; 1126 1127 // CAM0_RST_N 1128 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; 1129 pinctrl-names = "default"; 1130 pinctrl-0 = <&cam0_default>; 1131 gpios = <&tlmm 13 0>, 1132 <&tlmm 9 GPIO_ACTIVE_LOW>; 1133 1134 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; 1135 clock-names = "xvclk"; 1136 clock-frequency = <19200000>; 1137 1138 /* The &vreg_s4a_1p8 trace is powered on as a, 1139 * so it is represented by a fixed regulator. 1140 * 1141 * The 2.8V vdda-supply and 1.2V vddd-supply regulators 1142 * both have to be enabled through the power management 1143 * gpios. 1144 */ 1145 power-domains = <&clock_camcc TITAN_TOP_GDSC>; 1146 1147 dovdd-supply = <&vreg_lvs1a_1p8>; 1148 avdd-supply = <&cam0_avdd_2v8>; 1149 dvdd-supply = <&cam0_dvdd_1v2>; 1150 1151 status = "disable"; 1152 1153 port { 1154 ov8856_ep: endpoint { 1155 clock-lanes = <1>; 1156 link-frequencies = /bits/ 64 1157 <360000000 180000000>; 1158 data-lanes = <1 2 3 4>; 1159// remote-endpoint = <&csiphy0_ep>; 1160 }; 1161 }; 1162 }; 1163}; 1164 1165&cci_i2c1 { 1166 camera@60 { 1167 compatible = "ovti,ov7251"; 1168 1169 // I2C address as per ov7251.txt linux documentation 1170 reg = <0x60>; 1171 1172 // CAM3_RST_N 1173 enable-gpios = <&tlmm 21 0>; 1174 pinctrl-names = "default"; 1175 pinctrl-0 = <&cam3_default>; 1176 gpios = <&tlmm 16 0>, 1177 <&tlmm 21 0>; 1178 1179 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; 1180 clock-names = "xclk"; 1181 clock-frequency = <24000000>; 1182 1183 /* The &vreg_s4a_1p8 trace always powered on. 1184 * 1185 * The 2.8V vdda-supply regulator is enabled when the 1186 * vreg_s4a_1p8 trace is pulled high. 1187 * It too is represented by a fixed regulator. 1188 * 1189 * No 1.2V vddd-supply regulator is used. 1190 */ 1191 power-domains = <&clock_camcc TITAN_TOP_GDSC>; 1192 1193 vdddo-supply = <&vreg_lvs1a_1p8>; 1194 vdda-supply = <&cam3_avdd_2v8>; 1195 1196 status = "disable"; 1197 1198 port { 1199 ov7251_ep: endpoint { 1200 clock-lanes = <1>; 1201 data-lanes = <0 1>; 1202// remote-endpoint = <&csiphy3_ep>; 1203 }; 1204 }; 1205 }; 1206}; 1207