1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC 4 * 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a7796-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a7796-sysc.h> 11 12#define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 13 14/ { 15 compatible = "renesas,r8a7796"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 aliases { 20 i2c0 = &i2c0; 21 i2c1 = &i2c1; 22 i2c2 = &i2c2; 23 i2c3 = &i2c3; 24 i2c4 = &i2c4; 25 i2c5 = &i2c5; 26 i2c6 = &i2c6; 27 i2c7 = &i2c_dvfs; 28 }; 29 30 /* 31 * The external audio clocks are configured as 0 Hz fixed frequency 32 * clocks by default. 33 * Boards that provide audio clocks should override them. 34 */ 35 audio_clk_a: audio_clk_a { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 audio_clk_b: audio_clk_b { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 audio_clk_c: audio_clk_c { 48 compatible = "fixed-clock"; 49 #clock-cells = <0>; 50 clock-frequency = <0>; 51 }; 52 53 /* External CAN clock - to be overridden by boards that provide it */ 54 can_clk: can { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 60 cluster0_opp: opp_table0 { 61 compatible = "operating-points-v2"; 62 opp-shared; 63 64 opp-500000000 { 65 opp-hz = /bits/ 64 <500000000>; 66 opp-microvolt = <830000>; 67 clock-latency-ns = <300000>; 68 }; 69 opp-1000000000 { 70 opp-hz = /bits/ 64 <1000000000>; 71 opp-microvolt = <830000>; 72 clock-latency-ns = <300000>; 73 }; 74 opp-1500000000 { 75 opp-hz = /bits/ 64 <1500000000>; 76 opp-microvolt = <830000>; 77 clock-latency-ns = <300000>; 78 opp-suspend; 79 }; 80 opp-1600000000 { 81 opp-hz = /bits/ 64 <1600000000>; 82 opp-microvolt = <900000>; 83 clock-latency-ns = <300000>; 84 turbo-mode; 85 }; 86 opp-1700000000 { 87 opp-hz = /bits/ 64 <1700000000>; 88 opp-microvolt = <900000>; 89 clock-latency-ns = <300000>; 90 turbo-mode; 91 }; 92 opp-1800000000 { 93 opp-hz = /bits/ 64 <1800000000>; 94 opp-microvolt = <960000>; 95 clock-latency-ns = <300000>; 96 turbo-mode; 97 }; 98 }; 99 100 cluster1_opp: opp_table1 { 101 compatible = "operating-points-v2"; 102 opp-shared; 103 104 opp-800000000 { 105 opp-hz = /bits/ 64 <800000000>; 106 opp-microvolt = <820000>; 107 clock-latency-ns = <300000>; 108 }; 109 opp-1000000000 { 110 opp-hz = /bits/ 64 <1000000000>; 111 opp-microvolt = <820000>; 112 clock-latency-ns = <300000>; 113 }; 114 opp-1200000000 { 115 opp-hz = /bits/ 64 <1200000000>; 116 opp-microvolt = <820000>; 117 clock-latency-ns = <300000>; 118 }; 119 opp-1300000000 { 120 opp-hz = /bits/ 64 <1300000000>; 121 opp-microvolt = <820000>; 122 clock-latency-ns = <300000>; 123 turbo-mode; 124 }; 125 }; 126 127 cpus { 128 #address-cells = <1>; 129 #size-cells = <0>; 130 131 cpu-map { 132 cluster0 { 133 core0 { 134 cpu = <&a57_0>; 135 }; 136 core1 { 137 cpu = <&a57_1>; 138 }; 139 }; 140 141 cluster1 { 142 core0 { 143 cpu = <&a53_0>; 144 }; 145 core1 { 146 cpu = <&a53_1>; 147 }; 148 core2 { 149 cpu = <&a53_2>; 150 }; 151 core3 { 152 cpu = <&a53_3>; 153 }; 154 }; 155 }; 156 157 a57_0: cpu@0 { 158 compatible = "arm,cortex-a57"; 159 reg = <0x0>; 160 device_type = "cpu"; 161 power-domains = <&sysc R8A7796_PD_CA57_CPU0>; 162 next-level-cache = <&L2_CA57>; 163 enable-method = "psci"; 164 cpu-idle-states = <&CPU_SLEEP_0>; 165 dynamic-power-coefficient = <854>; 166 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; 167 operating-points-v2 = <&cluster0_opp>; 168 capacity-dmips-mhz = <1024>; 169 #cooling-cells = <2>; 170 }; 171 172 a57_1: cpu@1 { 173 compatible = "arm,cortex-a57"; 174 reg = <0x1>; 175 device_type = "cpu"; 176 power-domains = <&sysc R8A7796_PD_CA57_CPU1>; 177 next-level-cache = <&L2_CA57>; 178 enable-method = "psci"; 179 cpu-idle-states = <&CPU_SLEEP_0>; 180 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; 181 operating-points-v2 = <&cluster0_opp>; 182 capacity-dmips-mhz = <1024>; 183 #cooling-cells = <2>; 184 }; 185 186 a53_0: cpu@100 { 187 compatible = "arm,cortex-a53"; 188 reg = <0x100>; 189 device_type = "cpu"; 190 power-domains = <&sysc R8A7796_PD_CA53_CPU0>; 191 next-level-cache = <&L2_CA53>; 192 enable-method = "psci"; 193 cpu-idle-states = <&CPU_SLEEP_1>; 194 #cooling-cells = <2>; 195 dynamic-power-coefficient = <277>; 196 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 197 operating-points-v2 = <&cluster1_opp>; 198 capacity-dmips-mhz = <535>; 199 }; 200 201 a53_1: cpu@101 { 202 compatible = "arm,cortex-a53"; 203 reg = <0x101>; 204 device_type = "cpu"; 205 power-domains = <&sysc R8A7796_PD_CA53_CPU1>; 206 next-level-cache = <&L2_CA53>; 207 enable-method = "psci"; 208 cpu-idle-states = <&CPU_SLEEP_1>; 209 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 210 operating-points-v2 = <&cluster1_opp>; 211 capacity-dmips-mhz = <535>; 212 }; 213 214 a53_2: cpu@102 { 215 compatible = "arm,cortex-a53"; 216 reg = <0x102>; 217 device_type = "cpu"; 218 power-domains = <&sysc R8A7796_PD_CA53_CPU2>; 219 next-level-cache = <&L2_CA53>; 220 enable-method = "psci"; 221 cpu-idle-states = <&CPU_SLEEP_1>; 222 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 223 operating-points-v2 = <&cluster1_opp>; 224 capacity-dmips-mhz = <535>; 225 }; 226 227 a53_3: cpu@103 { 228 compatible = "arm,cortex-a53"; 229 reg = <0x103>; 230 device_type = "cpu"; 231 power-domains = <&sysc R8A7796_PD_CA53_CPU3>; 232 next-level-cache = <&L2_CA53>; 233 enable-method = "psci"; 234 cpu-idle-states = <&CPU_SLEEP_1>; 235 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 236 operating-points-v2 = <&cluster1_opp>; 237 capacity-dmips-mhz = <535>; 238 }; 239 240 L2_CA57: cache-controller-0 { 241 compatible = "cache"; 242 power-domains = <&sysc R8A7796_PD_CA57_SCU>; 243 cache-unified; 244 cache-level = <2>; 245 }; 246 247 L2_CA53: cache-controller-1 { 248 compatible = "cache"; 249 power-domains = <&sysc R8A7796_PD_CA53_SCU>; 250 cache-unified; 251 cache-level = <2>; 252 }; 253 254 idle-states { 255 entry-method = "psci"; 256 257 CPU_SLEEP_0: cpu-sleep-0 { 258 compatible = "arm,idle-state"; 259 arm,psci-suspend-param = <0x0010000>; 260 local-timer-stop; 261 entry-latency-us = <400>; 262 exit-latency-us = <500>; 263 min-residency-us = <4000>; 264 }; 265 266 CPU_SLEEP_1: cpu-sleep-1 { 267 compatible = "arm,idle-state"; 268 arm,psci-suspend-param = <0x0010000>; 269 local-timer-stop; 270 entry-latency-us = <700>; 271 exit-latency-us = <700>; 272 min-residency-us = <5000>; 273 }; 274 }; 275 }; 276 277 extal_clk: extal { 278 compatible = "fixed-clock"; 279 #clock-cells = <0>; 280 /* This value must be overridden by the board */ 281 clock-frequency = <0>; 282 }; 283 284 extalr_clk: extalr { 285 compatible = "fixed-clock"; 286 #clock-cells = <0>; 287 /* This value must be overridden by the board */ 288 clock-frequency = <0>; 289 }; 290 291 /* External PCIe clock - can be overridden by the board */ 292 pcie_bus_clk: pcie_bus { 293 compatible = "fixed-clock"; 294 #clock-cells = <0>; 295 clock-frequency = <0>; 296 }; 297 298 pmu_a53 { 299 compatible = "arm,cortex-a53-pmu"; 300 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 301 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 302 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 303 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 304 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; 305 }; 306 307 pmu_a57 { 308 compatible = "arm,cortex-a57-pmu"; 309 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 310 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 311 interrupt-affinity = <&a57_0>, <&a57_1>; 312 }; 313 314 psci { 315 compatible = "arm,psci-1.0", "arm,psci-0.2"; 316 method = "smc"; 317 }; 318 319 /* External SCIF clock - to be overridden by boards that provide it */ 320 scif_clk: scif { 321 compatible = "fixed-clock"; 322 #clock-cells = <0>; 323 clock-frequency = <0>; 324 }; 325 326 soc { 327 compatible = "simple-bus"; 328 interrupt-parent = <&gic>; 329 #address-cells = <2>; 330 #size-cells = <2>; 331 ranges; 332 333 rwdt: watchdog@e6020000 { 334 compatible = "renesas,r8a7796-wdt", 335 "renesas,rcar-gen3-wdt"; 336 reg = <0 0xe6020000 0 0x0c>; 337 clocks = <&cpg CPG_MOD 402>; 338 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 339 resets = <&cpg 402>; 340 status = "disabled"; 341 }; 342 343 gpio0: gpio@e6050000 { 344 compatible = "renesas,gpio-r8a7796", 345 "renesas,rcar-gen3-gpio"; 346 reg = <0 0xe6050000 0 0x50>; 347 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 348 #gpio-cells = <2>; 349 gpio-controller; 350 gpio-ranges = <&pfc 0 0 16>; 351 #interrupt-cells = <2>; 352 interrupt-controller; 353 clocks = <&cpg CPG_MOD 912>; 354 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 355 resets = <&cpg 912>; 356 }; 357 358 gpio1: gpio@e6051000 { 359 compatible = "renesas,gpio-r8a7796", 360 "renesas,rcar-gen3-gpio"; 361 reg = <0 0xe6051000 0 0x50>; 362 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 363 #gpio-cells = <2>; 364 gpio-controller; 365 gpio-ranges = <&pfc 0 32 29>; 366 #interrupt-cells = <2>; 367 interrupt-controller; 368 clocks = <&cpg CPG_MOD 911>; 369 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 370 resets = <&cpg 911>; 371 }; 372 373 gpio2: gpio@e6052000 { 374 compatible = "renesas,gpio-r8a7796", 375 "renesas,rcar-gen3-gpio"; 376 reg = <0 0xe6052000 0 0x50>; 377 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 378 #gpio-cells = <2>; 379 gpio-controller; 380 gpio-ranges = <&pfc 0 64 15>; 381 #interrupt-cells = <2>; 382 interrupt-controller; 383 clocks = <&cpg CPG_MOD 910>; 384 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 385 resets = <&cpg 910>; 386 }; 387 388 gpio3: gpio@e6053000 { 389 compatible = "renesas,gpio-r8a7796", 390 "renesas,rcar-gen3-gpio"; 391 reg = <0 0xe6053000 0 0x50>; 392 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 393 #gpio-cells = <2>; 394 gpio-controller; 395 gpio-ranges = <&pfc 0 96 16>; 396 #interrupt-cells = <2>; 397 interrupt-controller; 398 clocks = <&cpg CPG_MOD 909>; 399 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 400 resets = <&cpg 909>; 401 }; 402 403 gpio4: gpio@e6054000 { 404 compatible = "renesas,gpio-r8a7796", 405 "renesas,rcar-gen3-gpio"; 406 reg = <0 0xe6054000 0 0x50>; 407 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 408 #gpio-cells = <2>; 409 gpio-controller; 410 gpio-ranges = <&pfc 0 128 18>; 411 #interrupt-cells = <2>; 412 interrupt-controller; 413 clocks = <&cpg CPG_MOD 908>; 414 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 415 resets = <&cpg 908>; 416 }; 417 418 gpio5: gpio@e6055000 { 419 compatible = "renesas,gpio-r8a7796", 420 "renesas,rcar-gen3-gpio"; 421 reg = <0 0xe6055000 0 0x50>; 422 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 423 #gpio-cells = <2>; 424 gpio-controller; 425 gpio-ranges = <&pfc 0 160 26>; 426 #interrupt-cells = <2>; 427 interrupt-controller; 428 clocks = <&cpg CPG_MOD 907>; 429 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 430 resets = <&cpg 907>; 431 }; 432 433 gpio6: gpio@e6055400 { 434 compatible = "renesas,gpio-r8a7796", 435 "renesas,rcar-gen3-gpio"; 436 reg = <0 0xe6055400 0 0x50>; 437 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 438 #gpio-cells = <2>; 439 gpio-controller; 440 gpio-ranges = <&pfc 0 192 32>; 441 #interrupt-cells = <2>; 442 interrupt-controller; 443 clocks = <&cpg CPG_MOD 906>; 444 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 445 resets = <&cpg 906>; 446 }; 447 448 gpio7: gpio@e6055800 { 449 compatible = "renesas,gpio-r8a7796", 450 "renesas,rcar-gen3-gpio"; 451 reg = <0 0xe6055800 0 0x50>; 452 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 453 #gpio-cells = <2>; 454 gpio-controller; 455 gpio-ranges = <&pfc 0 224 4>; 456 #interrupt-cells = <2>; 457 interrupt-controller; 458 clocks = <&cpg CPG_MOD 905>; 459 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 460 resets = <&cpg 905>; 461 }; 462 463 pfc: pinctrl@e6060000 { 464 compatible = "renesas,pfc-r8a7796"; 465 reg = <0 0xe6060000 0 0x50c>; 466 }; 467 468 cmt0: timer@e60f0000 { 469 compatible = "renesas,r8a7796-cmt0", 470 "renesas,rcar-gen3-cmt0"; 471 reg = <0 0xe60f0000 0 0x1004>; 472 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 473 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 474 clocks = <&cpg CPG_MOD 303>; 475 clock-names = "fck"; 476 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 477 resets = <&cpg 303>; 478 status = "disabled"; 479 }; 480 481 cmt1: timer@e6130000 { 482 compatible = "renesas,r8a7796-cmt1", 483 "renesas,rcar-gen3-cmt1"; 484 reg = <0 0xe6130000 0 0x1004>; 485 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 486 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 487 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 488 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 489 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 490 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 491 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 492 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 493 clocks = <&cpg CPG_MOD 302>; 494 clock-names = "fck"; 495 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 496 resets = <&cpg 302>; 497 status = "disabled"; 498 }; 499 500 cmt2: timer@e6140000 { 501 compatible = "renesas,r8a7796-cmt1", 502 "renesas,rcar-gen3-cmt1"; 503 reg = <0 0xe6140000 0 0x1004>; 504 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 505 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 506 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 507 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 508 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 509 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 510 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 511 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 512 clocks = <&cpg CPG_MOD 301>; 513 clock-names = "fck"; 514 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 515 resets = <&cpg 301>; 516 status = "disabled"; 517 }; 518 519 cmt3: timer@e6148000 { 520 compatible = "renesas,r8a7796-cmt1", 521 "renesas,rcar-gen3-cmt1"; 522 reg = <0 0xe6148000 0 0x1004>; 523 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 524 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 525 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 526 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 527 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 528 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 529 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 530 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 531 clocks = <&cpg CPG_MOD 300>; 532 clock-names = "fck"; 533 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 534 resets = <&cpg 300>; 535 status = "disabled"; 536 }; 537 538 cpg: clock-controller@e6150000 { 539 compatible = "renesas,r8a7796-cpg-mssr"; 540 reg = <0 0xe6150000 0 0x1000>; 541 clocks = <&extal_clk>, <&extalr_clk>; 542 clock-names = "extal", "extalr"; 543 #clock-cells = <2>; 544 #power-domain-cells = <0>; 545 #reset-cells = <1>; 546 }; 547 548 rst: reset-controller@e6160000 { 549 compatible = "renesas,r8a7796-rst"; 550 reg = <0 0xe6160000 0 0x0200>; 551 }; 552 553 sysc: system-controller@e6180000 { 554 compatible = "renesas,r8a7796-sysc"; 555 reg = <0 0xe6180000 0 0x0400>; 556 #power-domain-cells = <1>; 557 }; 558 559 tsc: thermal@e6198000 { 560 compatible = "renesas,r8a7796-thermal"; 561 reg = <0 0xe6198000 0 0x100>, 562 <0 0xe61a0000 0 0x100>, 563 <0 0xe61a8000 0 0x100>; 564 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 565 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 566 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 567 clocks = <&cpg CPG_MOD 522>; 568 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 569 resets = <&cpg 522>; 570 #thermal-sensor-cells = <1>; 571 }; 572 573 intc_ex: interrupt-controller@e61c0000 { 574 compatible = "renesas,intc-ex-r8a7796", "renesas,irqc"; 575 #interrupt-cells = <2>; 576 interrupt-controller; 577 reg = <0 0xe61c0000 0 0x200>; 578 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 579 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 580 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 581 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 582 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 583 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 584 clocks = <&cpg CPG_MOD 407>; 585 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 586 resets = <&cpg 407>; 587 }; 588 589 i2c0: i2c@e6500000 { 590 #address-cells = <1>; 591 #size-cells = <0>; 592 compatible = "renesas,i2c-r8a7796", 593 "renesas,rcar-gen3-i2c"; 594 reg = <0 0xe6500000 0 0x40>; 595 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 596 clocks = <&cpg CPG_MOD 931>; 597 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 598 resets = <&cpg 931>; 599 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 600 <&dmac2 0x91>, <&dmac2 0x90>; 601 dma-names = "tx", "rx", "tx", "rx"; 602 i2c-scl-internal-delay-ns = <110>; 603 status = "disabled"; 604 }; 605 606 i2c1: i2c@e6508000 { 607 #address-cells = <1>; 608 #size-cells = <0>; 609 compatible = "renesas,i2c-r8a7796", 610 "renesas,rcar-gen3-i2c"; 611 reg = <0 0xe6508000 0 0x40>; 612 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 613 clocks = <&cpg CPG_MOD 930>; 614 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 615 resets = <&cpg 930>; 616 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 617 <&dmac2 0x93>, <&dmac2 0x92>; 618 dma-names = "tx", "rx", "tx", "rx"; 619 i2c-scl-internal-delay-ns = <6>; 620 status = "disabled"; 621 }; 622 623 i2c2: i2c@e6510000 { 624 #address-cells = <1>; 625 #size-cells = <0>; 626 compatible = "renesas,i2c-r8a7796", 627 "renesas,rcar-gen3-i2c"; 628 reg = <0 0xe6510000 0 0x40>; 629 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 630 clocks = <&cpg CPG_MOD 929>; 631 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 632 resets = <&cpg 929>; 633 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 634 <&dmac2 0x95>, <&dmac2 0x94>; 635 dma-names = "tx", "rx", "tx", "rx"; 636 i2c-scl-internal-delay-ns = <6>; 637 status = "disabled"; 638 }; 639 640 i2c3: i2c@e66d0000 { 641 #address-cells = <1>; 642 #size-cells = <0>; 643 compatible = "renesas,i2c-r8a7796", 644 "renesas,rcar-gen3-i2c"; 645 reg = <0 0xe66d0000 0 0x40>; 646 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 647 clocks = <&cpg CPG_MOD 928>; 648 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 649 resets = <&cpg 928>; 650 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 651 dma-names = "tx", "rx"; 652 i2c-scl-internal-delay-ns = <110>; 653 status = "disabled"; 654 }; 655 656 i2c4: i2c@e66d8000 { 657 #address-cells = <1>; 658 #size-cells = <0>; 659 compatible = "renesas,i2c-r8a7796", 660 "renesas,rcar-gen3-i2c"; 661 reg = <0 0xe66d8000 0 0x40>; 662 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 663 clocks = <&cpg CPG_MOD 927>; 664 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 665 resets = <&cpg 927>; 666 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 667 dma-names = "tx", "rx"; 668 i2c-scl-internal-delay-ns = <110>; 669 status = "disabled"; 670 }; 671 672 i2c5: i2c@e66e0000 { 673 #address-cells = <1>; 674 #size-cells = <0>; 675 compatible = "renesas,i2c-r8a7796", 676 "renesas,rcar-gen3-i2c"; 677 reg = <0 0xe66e0000 0 0x40>; 678 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 679 clocks = <&cpg CPG_MOD 919>; 680 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 681 resets = <&cpg 919>; 682 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 683 dma-names = "tx", "rx"; 684 i2c-scl-internal-delay-ns = <110>; 685 status = "disabled"; 686 }; 687 688 i2c6: i2c@e66e8000 { 689 #address-cells = <1>; 690 #size-cells = <0>; 691 compatible = "renesas,i2c-r8a7796", 692 "renesas,rcar-gen3-i2c"; 693 reg = <0 0xe66e8000 0 0x40>; 694 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 695 clocks = <&cpg CPG_MOD 918>; 696 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 697 resets = <&cpg 918>; 698 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 699 dma-names = "tx", "rx"; 700 i2c-scl-internal-delay-ns = <6>; 701 status = "disabled"; 702 }; 703 704 i2c_dvfs: i2c@e60b0000 { 705 #address-cells = <1>; 706 #size-cells = <0>; 707 compatible = "renesas,iic-r8a7796", 708 "renesas,rcar-gen3-iic", 709 "renesas,rmobile-iic"; 710 reg = <0 0xe60b0000 0 0x425>; 711 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 712 clocks = <&cpg CPG_MOD 926>; 713 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 714 resets = <&cpg 926>; 715 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 716 dma-names = "tx", "rx"; 717 status = "disabled"; 718 }; 719 720 hscif0: serial@e6540000 { 721 compatible = "renesas,hscif-r8a7796", 722 "renesas,rcar-gen3-hscif", 723 "renesas,hscif"; 724 reg = <0 0xe6540000 0 0x60>; 725 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 726 clocks = <&cpg CPG_MOD 520>, 727 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 728 <&scif_clk>; 729 clock-names = "fck", "brg_int", "scif_clk"; 730 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 731 <&dmac2 0x31>, <&dmac2 0x30>; 732 dma-names = "tx", "rx", "tx", "rx"; 733 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 734 resets = <&cpg 520>; 735 status = "disabled"; 736 }; 737 738 hscif1: serial@e6550000 { 739 compatible = "renesas,hscif-r8a7796", 740 "renesas,rcar-gen3-hscif", 741 "renesas,hscif"; 742 reg = <0 0xe6550000 0 0x60>; 743 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 744 clocks = <&cpg CPG_MOD 519>, 745 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 746 <&scif_clk>; 747 clock-names = "fck", "brg_int", "scif_clk"; 748 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 749 <&dmac2 0x33>, <&dmac2 0x32>; 750 dma-names = "tx", "rx", "tx", "rx"; 751 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 752 resets = <&cpg 519>; 753 status = "disabled"; 754 }; 755 756 hscif2: serial@e6560000 { 757 compatible = "renesas,hscif-r8a7796", 758 "renesas,rcar-gen3-hscif", 759 "renesas,hscif"; 760 reg = <0 0xe6560000 0 0x60>; 761 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 762 clocks = <&cpg CPG_MOD 518>, 763 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 764 <&scif_clk>; 765 clock-names = "fck", "brg_int", "scif_clk"; 766 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 767 <&dmac2 0x35>, <&dmac2 0x34>; 768 dma-names = "tx", "rx", "tx", "rx"; 769 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 770 resets = <&cpg 518>; 771 status = "disabled"; 772 }; 773 774 hscif3: serial@e66a0000 { 775 compatible = "renesas,hscif-r8a7796", 776 "renesas,rcar-gen3-hscif", 777 "renesas,hscif"; 778 reg = <0 0xe66a0000 0 0x60>; 779 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 780 clocks = <&cpg CPG_MOD 517>, 781 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 782 <&scif_clk>; 783 clock-names = "fck", "brg_int", "scif_clk"; 784 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 785 dma-names = "tx", "rx"; 786 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 787 resets = <&cpg 517>; 788 status = "disabled"; 789 }; 790 791 hscif4: serial@e66b0000 { 792 compatible = "renesas,hscif-r8a7796", 793 "renesas,rcar-gen3-hscif", 794 "renesas,hscif"; 795 reg = <0 0xe66b0000 0 0x60>; 796 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 797 clocks = <&cpg CPG_MOD 516>, 798 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 799 <&scif_clk>; 800 clock-names = "fck", "brg_int", "scif_clk"; 801 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 802 dma-names = "tx", "rx"; 803 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 804 resets = <&cpg 516>; 805 status = "disabled"; 806 }; 807 808 hsusb: usb@e6590000 { 809 compatible = "renesas,usbhs-r8a7796", 810 "renesas,rcar-gen3-usbhs"; 811 reg = <0 0xe6590000 0 0x200>; 812 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 813 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 814 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 815 <&usb_dmac1 0>, <&usb_dmac1 1>; 816 dma-names = "ch0", "ch1", "ch2", "ch3"; 817 renesas,buswait = <11>; 818 phys = <&usb2_phy0 3>; 819 phy-names = "usb"; 820 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 821 resets = <&cpg 704>, <&cpg 703>; 822 status = "disabled"; 823 }; 824 825 usb_dmac0: dma-controller@e65a0000 { 826 compatible = "renesas,r8a7796-usb-dmac", 827 "renesas,usb-dmac"; 828 reg = <0 0xe65a0000 0 0x100>; 829 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 831 interrupt-names = "ch0", "ch1"; 832 clocks = <&cpg CPG_MOD 330>; 833 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 834 resets = <&cpg 330>; 835 #dma-cells = <1>; 836 dma-channels = <2>; 837 }; 838 839 usb_dmac1: dma-controller@e65b0000 { 840 compatible = "renesas,r8a7796-usb-dmac", 841 "renesas,usb-dmac"; 842 reg = <0 0xe65b0000 0 0x100>; 843 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 844 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 845 interrupt-names = "ch0", "ch1"; 846 clocks = <&cpg CPG_MOD 331>; 847 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 848 resets = <&cpg 331>; 849 #dma-cells = <1>; 850 dma-channels = <2>; 851 }; 852 853 usb3_phy0: usb-phy@e65ee000 { 854 compatible = "renesas,r8a7796-usb3-phy", 855 "renesas,rcar-gen3-usb3-phy"; 856 reg = <0 0xe65ee000 0 0x90>; 857 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 858 <&usb_extal_clk>; 859 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 860 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 861 resets = <&cpg 328>; 862 #phy-cells = <0>; 863 status = "disabled"; 864 }; 865 866 arm_cc630p: crypto@e6601000 { 867 compatible = "arm,cryptocell-630p-ree"; 868 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 869 reg = <0x0 0xe6601000 0 0x1000>; 870 clocks = <&cpg CPG_MOD 229>; 871 resets = <&cpg 229>; 872 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 873 }; 874 875 dmac0: dma-controller@e6700000 { 876 compatible = "renesas,dmac-r8a7796", 877 "renesas,rcar-dmac"; 878 reg = <0 0xe6700000 0 0x10000>; 879 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 884 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 885 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 886 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 887 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 888 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 889 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 890 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 891 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 892 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 893 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 894 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 895 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 896 interrupt-names = "error", 897 "ch0", "ch1", "ch2", "ch3", 898 "ch4", "ch5", "ch6", "ch7", 899 "ch8", "ch9", "ch10", "ch11", 900 "ch12", "ch13", "ch14", "ch15"; 901 clocks = <&cpg CPG_MOD 219>; 902 clock-names = "fck"; 903 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 904 resets = <&cpg 219>; 905 #dma-cells = <1>; 906 dma-channels = <16>; 907 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 908 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 909 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 910 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 911 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 912 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 913 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 914 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 915 }; 916 917 dmac1: dma-controller@e7300000 { 918 compatible = "renesas,dmac-r8a7796", 919 "renesas,rcar-dmac"; 920 reg = <0 0xe7300000 0 0x10000>; 921 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 922 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 923 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 924 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 925 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 926 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 927 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 928 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 929 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 930 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 931 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 932 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 933 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 934 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 935 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 936 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 937 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 938 interrupt-names = "error", 939 "ch0", "ch1", "ch2", "ch3", 940 "ch4", "ch5", "ch6", "ch7", 941 "ch8", "ch9", "ch10", "ch11", 942 "ch12", "ch13", "ch14", "ch15"; 943 clocks = <&cpg CPG_MOD 218>; 944 clock-names = "fck"; 945 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 946 resets = <&cpg 218>; 947 #dma-cells = <1>; 948 dma-channels = <16>; 949 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 950 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 951 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 952 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 953 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 954 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 955 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 956 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 957 }; 958 959 dmac2: dma-controller@e7310000 { 960 compatible = "renesas,dmac-r8a7796", 961 "renesas,rcar-dmac"; 962 reg = <0 0xe7310000 0 0x10000>; 963 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 964 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 965 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 966 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 967 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 968 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 969 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 970 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 971 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 972 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 973 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 974 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 977 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 978 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 979 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 980 interrupt-names = "error", 981 "ch0", "ch1", "ch2", "ch3", 982 "ch4", "ch5", "ch6", "ch7", 983 "ch8", "ch9", "ch10", "ch11", 984 "ch12", "ch13", "ch14", "ch15"; 985 clocks = <&cpg CPG_MOD 217>; 986 clock-names = "fck"; 987 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 988 resets = <&cpg 217>; 989 #dma-cells = <1>; 990 dma-channels = <16>; 991 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 992 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 993 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 994 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 995 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 996 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 997 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 998 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 999 }; 1000 1001 ipmmu_ds0: iommu@e6740000 { 1002 compatible = "renesas,ipmmu-r8a7796"; 1003 reg = <0 0xe6740000 0 0x1000>; 1004 renesas,ipmmu-main = <&ipmmu_mm 0>; 1005 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1006 #iommu-cells = <1>; 1007 }; 1008 1009 ipmmu_ds1: iommu@e7740000 { 1010 compatible = "renesas,ipmmu-r8a7796"; 1011 reg = <0 0xe7740000 0 0x1000>; 1012 renesas,ipmmu-main = <&ipmmu_mm 1>; 1013 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1014 #iommu-cells = <1>; 1015 }; 1016 1017 ipmmu_hc: iommu@e6570000 { 1018 compatible = "renesas,ipmmu-r8a7796"; 1019 reg = <0 0xe6570000 0 0x1000>; 1020 renesas,ipmmu-main = <&ipmmu_mm 2>; 1021 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1022 #iommu-cells = <1>; 1023 }; 1024 1025 ipmmu_ir: iommu@ff8b0000 { 1026 compatible = "renesas,ipmmu-r8a7796"; 1027 reg = <0 0xff8b0000 0 0x1000>; 1028 renesas,ipmmu-main = <&ipmmu_mm 3>; 1029 power-domains = <&sysc R8A7796_PD_A3IR>; 1030 #iommu-cells = <1>; 1031 }; 1032 1033 ipmmu_mm: iommu@e67b0000 { 1034 compatible = "renesas,ipmmu-r8a7796"; 1035 reg = <0 0xe67b0000 0 0x1000>; 1036 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 1038 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1039 #iommu-cells = <1>; 1040 }; 1041 1042 ipmmu_mp: iommu@ec670000 { 1043 compatible = "renesas,ipmmu-r8a7796"; 1044 reg = <0 0xec670000 0 0x1000>; 1045 renesas,ipmmu-main = <&ipmmu_mm 4>; 1046 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1047 #iommu-cells = <1>; 1048 }; 1049 1050 ipmmu_pv0: iommu@fd800000 { 1051 compatible = "renesas,ipmmu-r8a7796"; 1052 reg = <0 0xfd800000 0 0x1000>; 1053 renesas,ipmmu-main = <&ipmmu_mm 5>; 1054 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1055 #iommu-cells = <1>; 1056 }; 1057 1058 ipmmu_pv1: iommu@fd950000 { 1059 compatible = "renesas,ipmmu-r8a7796"; 1060 reg = <0 0xfd950000 0 0x1000>; 1061 renesas,ipmmu-main = <&ipmmu_mm 6>; 1062 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1063 #iommu-cells = <1>; 1064 }; 1065 1066 ipmmu_rt: iommu@ffc80000 { 1067 compatible = "renesas,ipmmu-r8a7796"; 1068 reg = <0 0xffc80000 0 0x1000>; 1069 renesas,ipmmu-main = <&ipmmu_mm 7>; 1070 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1071 #iommu-cells = <1>; 1072 }; 1073 1074 ipmmu_vc0: iommu@fe6b0000 { 1075 compatible = "renesas,ipmmu-r8a7796"; 1076 reg = <0 0xfe6b0000 0 0x1000>; 1077 renesas,ipmmu-main = <&ipmmu_mm 8>; 1078 power-domains = <&sysc R8A7796_PD_A3VC>; 1079 #iommu-cells = <1>; 1080 }; 1081 1082 ipmmu_vi0: iommu@febd0000 { 1083 compatible = "renesas,ipmmu-r8a7796"; 1084 reg = <0 0xfebd0000 0 0x1000>; 1085 renesas,ipmmu-main = <&ipmmu_mm 9>; 1086 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1087 #iommu-cells = <1>; 1088 }; 1089 1090 avb: ethernet@e6800000 { 1091 compatible = "renesas,etheravb-r8a7796", 1092 "renesas,etheravb-rcar-gen3"; 1093 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1094 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1095 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1096 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1097 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1098 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1099 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1100 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1101 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1102 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1103 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1104 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1105 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1106 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1107 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1108 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1109 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1110 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1111 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1112 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1113 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1114 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1115 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1116 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1117 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1118 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1119 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1120 "ch4", "ch5", "ch6", "ch7", 1121 "ch8", "ch9", "ch10", "ch11", 1122 "ch12", "ch13", "ch14", "ch15", 1123 "ch16", "ch17", "ch18", "ch19", 1124 "ch20", "ch21", "ch22", "ch23", 1125 "ch24"; 1126 clocks = <&cpg CPG_MOD 812>; 1127 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1128 resets = <&cpg 812>; 1129 phy-mode = "rgmii"; 1130 iommus = <&ipmmu_ds0 16>; 1131 #address-cells = <1>; 1132 #size-cells = <0>; 1133 status = "disabled"; 1134 }; 1135 1136 can0: can@e6c30000 { 1137 compatible = "renesas,can-r8a7796", 1138 "renesas,rcar-gen3-can"; 1139 reg = <0 0xe6c30000 0 0x1000>; 1140 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1141 clocks = <&cpg CPG_MOD 916>, 1142 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1143 <&can_clk>; 1144 clock-names = "clkp1", "clkp2", "can_clk"; 1145 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1146 assigned-clock-rates = <40000000>; 1147 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1148 resets = <&cpg 916>; 1149 status = "disabled"; 1150 }; 1151 1152 can1: can@e6c38000 { 1153 compatible = "renesas,can-r8a7796", 1154 "renesas,rcar-gen3-can"; 1155 reg = <0 0xe6c38000 0 0x1000>; 1156 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1157 clocks = <&cpg CPG_MOD 915>, 1158 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1159 <&can_clk>; 1160 clock-names = "clkp1", "clkp2", "can_clk"; 1161 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1162 assigned-clock-rates = <40000000>; 1163 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1164 resets = <&cpg 915>; 1165 status = "disabled"; 1166 }; 1167 1168 canfd: can@e66c0000 { 1169 compatible = "renesas,r8a7796-canfd", 1170 "renesas,rcar-gen3-canfd"; 1171 reg = <0 0xe66c0000 0 0x8000>; 1172 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1173 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1174 clocks = <&cpg CPG_MOD 914>, 1175 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1176 <&can_clk>; 1177 clock-names = "fck", "canfd", "can_clk"; 1178 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1179 assigned-clock-rates = <40000000>; 1180 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1181 resets = <&cpg 914>; 1182 status = "disabled"; 1183 1184 channel0 { 1185 status = "disabled"; 1186 }; 1187 1188 channel1 { 1189 status = "disabled"; 1190 }; 1191 }; 1192 1193 pwm0: pwm@e6e30000 { 1194 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1195 reg = <0 0xe6e30000 0 8>; 1196 #pwm-cells = <2>; 1197 clocks = <&cpg CPG_MOD 523>; 1198 resets = <&cpg 523>; 1199 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1200 status = "disabled"; 1201 }; 1202 1203 pwm1: pwm@e6e31000 { 1204 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1205 reg = <0 0xe6e31000 0 8>; 1206 #pwm-cells = <2>; 1207 clocks = <&cpg CPG_MOD 523>; 1208 resets = <&cpg 523>; 1209 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1210 status = "disabled"; 1211 }; 1212 1213 pwm2: pwm@e6e32000 { 1214 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1215 reg = <0 0xe6e32000 0 8>; 1216 #pwm-cells = <2>; 1217 clocks = <&cpg CPG_MOD 523>; 1218 resets = <&cpg 523>; 1219 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1220 status = "disabled"; 1221 }; 1222 1223 pwm3: pwm@e6e33000 { 1224 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1225 reg = <0 0xe6e33000 0 8>; 1226 #pwm-cells = <2>; 1227 clocks = <&cpg CPG_MOD 523>; 1228 resets = <&cpg 523>; 1229 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1230 status = "disabled"; 1231 }; 1232 1233 pwm4: pwm@e6e34000 { 1234 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1235 reg = <0 0xe6e34000 0 8>; 1236 #pwm-cells = <2>; 1237 clocks = <&cpg CPG_MOD 523>; 1238 resets = <&cpg 523>; 1239 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1240 status = "disabled"; 1241 }; 1242 1243 pwm5: pwm@e6e35000 { 1244 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1245 reg = <0 0xe6e35000 0 8>; 1246 #pwm-cells = <2>; 1247 clocks = <&cpg CPG_MOD 523>; 1248 resets = <&cpg 523>; 1249 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1250 status = "disabled"; 1251 }; 1252 1253 pwm6: pwm@e6e36000 { 1254 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1255 reg = <0 0xe6e36000 0 8>; 1256 #pwm-cells = <2>; 1257 clocks = <&cpg CPG_MOD 523>; 1258 resets = <&cpg 523>; 1259 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1260 status = "disabled"; 1261 }; 1262 1263 scif0: serial@e6e60000 { 1264 compatible = "renesas,scif-r8a7796", 1265 "renesas,rcar-gen3-scif", "renesas,scif"; 1266 reg = <0 0xe6e60000 0 64>; 1267 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1268 clocks = <&cpg CPG_MOD 207>, 1269 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1270 <&scif_clk>; 1271 clock-names = "fck", "brg_int", "scif_clk"; 1272 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1273 <&dmac2 0x51>, <&dmac2 0x50>; 1274 dma-names = "tx", "rx", "tx", "rx"; 1275 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1276 resets = <&cpg 207>; 1277 status = "disabled"; 1278 }; 1279 1280 scif1: serial@e6e68000 { 1281 compatible = "renesas,scif-r8a7796", 1282 "renesas,rcar-gen3-scif", "renesas,scif"; 1283 reg = <0 0xe6e68000 0 64>; 1284 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1285 clocks = <&cpg CPG_MOD 206>, 1286 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1287 <&scif_clk>; 1288 clock-names = "fck", "brg_int", "scif_clk"; 1289 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1290 <&dmac2 0x53>, <&dmac2 0x52>; 1291 dma-names = "tx", "rx", "tx", "rx"; 1292 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1293 resets = <&cpg 206>; 1294 status = "disabled"; 1295 }; 1296 1297 scif2: serial@e6e88000 { 1298 compatible = "renesas,scif-r8a7796", 1299 "renesas,rcar-gen3-scif", "renesas,scif"; 1300 reg = <0 0xe6e88000 0 64>; 1301 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1302 clocks = <&cpg CPG_MOD 310>, 1303 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1304 <&scif_clk>; 1305 clock-names = "fck", "brg_int", "scif_clk"; 1306 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1307 <&dmac2 0x13>, <&dmac2 0x12>; 1308 dma-names = "tx", "rx", "tx", "rx"; 1309 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1310 resets = <&cpg 310>; 1311 status = "disabled"; 1312 }; 1313 1314 scif3: serial@e6c50000 { 1315 compatible = "renesas,scif-r8a7796", 1316 "renesas,rcar-gen3-scif", "renesas,scif"; 1317 reg = <0 0xe6c50000 0 64>; 1318 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1319 clocks = <&cpg CPG_MOD 204>, 1320 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1321 <&scif_clk>; 1322 clock-names = "fck", "brg_int", "scif_clk"; 1323 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1324 dma-names = "tx", "rx"; 1325 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1326 resets = <&cpg 204>; 1327 status = "disabled"; 1328 }; 1329 1330 scif4: serial@e6c40000 { 1331 compatible = "renesas,scif-r8a7796", 1332 "renesas,rcar-gen3-scif", "renesas,scif"; 1333 reg = <0 0xe6c40000 0 64>; 1334 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1335 clocks = <&cpg CPG_MOD 203>, 1336 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1337 <&scif_clk>; 1338 clock-names = "fck", "brg_int", "scif_clk"; 1339 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1340 dma-names = "tx", "rx"; 1341 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1342 resets = <&cpg 203>; 1343 status = "disabled"; 1344 }; 1345 1346 scif5: serial@e6f30000 { 1347 compatible = "renesas,scif-r8a7796", 1348 "renesas,rcar-gen3-scif", "renesas,scif"; 1349 reg = <0 0xe6f30000 0 64>; 1350 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1351 clocks = <&cpg CPG_MOD 202>, 1352 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1353 <&scif_clk>; 1354 clock-names = "fck", "brg_int", "scif_clk"; 1355 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1356 <&dmac2 0x5b>, <&dmac2 0x5a>; 1357 dma-names = "tx", "rx", "tx", "rx"; 1358 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1359 resets = <&cpg 202>; 1360 status = "disabled"; 1361 }; 1362 1363 tpu: pwm@e6e80000 { 1364 compatible = "renesas,tpu-r8a7796", "renesas,tpu"; 1365 reg = <0 0xe6e80000 0 0x148>; 1366 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1367 clocks = <&cpg CPG_MOD 304>; 1368 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1369 resets = <&cpg 304>; 1370 #pwm-cells = <3>; 1371 status = "disabled"; 1372 }; 1373 1374 msiof0: spi@e6e90000 { 1375 compatible = "renesas,msiof-r8a7796", 1376 "renesas,rcar-gen3-msiof"; 1377 reg = <0 0xe6e90000 0 0x0064>; 1378 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1379 clocks = <&cpg CPG_MOD 211>; 1380 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1381 <&dmac2 0x41>, <&dmac2 0x40>; 1382 dma-names = "tx", "rx", "tx", "rx"; 1383 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1384 resets = <&cpg 211>; 1385 #address-cells = <1>; 1386 #size-cells = <0>; 1387 status = "disabled"; 1388 }; 1389 1390 msiof1: spi@e6ea0000 { 1391 compatible = "renesas,msiof-r8a7796", 1392 "renesas,rcar-gen3-msiof"; 1393 reg = <0 0xe6ea0000 0 0x0064>; 1394 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1395 clocks = <&cpg CPG_MOD 210>; 1396 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1397 <&dmac2 0x43>, <&dmac2 0x42>; 1398 dma-names = "tx", "rx", "tx", "rx"; 1399 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1400 resets = <&cpg 210>; 1401 #address-cells = <1>; 1402 #size-cells = <0>; 1403 status = "disabled"; 1404 }; 1405 1406 msiof2: spi@e6c00000 { 1407 compatible = "renesas,msiof-r8a7796", 1408 "renesas,rcar-gen3-msiof"; 1409 reg = <0 0xe6c00000 0 0x0064>; 1410 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1411 clocks = <&cpg CPG_MOD 209>; 1412 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1413 dma-names = "tx", "rx"; 1414 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1415 resets = <&cpg 209>; 1416 #address-cells = <1>; 1417 #size-cells = <0>; 1418 status = "disabled"; 1419 }; 1420 1421 msiof3: spi@e6c10000 { 1422 compatible = "renesas,msiof-r8a7796", 1423 "renesas,rcar-gen3-msiof"; 1424 reg = <0 0xe6c10000 0 0x0064>; 1425 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1426 clocks = <&cpg CPG_MOD 208>; 1427 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1428 dma-names = "tx", "rx"; 1429 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1430 resets = <&cpg 208>; 1431 #address-cells = <1>; 1432 #size-cells = <0>; 1433 status = "disabled"; 1434 }; 1435 1436 vin0: video@e6ef0000 { 1437 compatible = "renesas,vin-r8a7796"; 1438 reg = <0 0xe6ef0000 0 0x1000>; 1439 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1440 clocks = <&cpg CPG_MOD 811>; 1441 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1442 resets = <&cpg 811>; 1443 renesas,id = <0>; 1444 status = "disabled"; 1445 1446 ports { 1447 #address-cells = <1>; 1448 #size-cells = <0>; 1449 1450 port@1 { 1451 #address-cells = <1>; 1452 #size-cells = <0>; 1453 1454 reg = <1>; 1455 1456 vin0csi20: endpoint@0 { 1457 reg = <0>; 1458 remote-endpoint = <&csi20vin0>; 1459 }; 1460 vin0csi40: endpoint@2 { 1461 reg = <2>; 1462 remote-endpoint = <&csi40vin0>; 1463 }; 1464 }; 1465 }; 1466 }; 1467 1468 vin1: video@e6ef1000 { 1469 compatible = "renesas,vin-r8a7796"; 1470 reg = <0 0xe6ef1000 0 0x1000>; 1471 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1472 clocks = <&cpg CPG_MOD 810>; 1473 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1474 resets = <&cpg 810>; 1475 renesas,id = <1>; 1476 status = "disabled"; 1477 1478 ports { 1479 #address-cells = <1>; 1480 #size-cells = <0>; 1481 1482 port@1 { 1483 #address-cells = <1>; 1484 #size-cells = <0>; 1485 1486 reg = <1>; 1487 1488 vin1csi20: endpoint@0 { 1489 reg = <0>; 1490 remote-endpoint = <&csi20vin1>; 1491 }; 1492 vin1csi40: endpoint@2 { 1493 reg = <2>; 1494 remote-endpoint = <&csi40vin1>; 1495 }; 1496 }; 1497 }; 1498 }; 1499 1500 vin2: video@e6ef2000 { 1501 compatible = "renesas,vin-r8a7796"; 1502 reg = <0 0xe6ef2000 0 0x1000>; 1503 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1504 clocks = <&cpg CPG_MOD 809>; 1505 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1506 resets = <&cpg 809>; 1507 renesas,id = <2>; 1508 status = "disabled"; 1509 1510 ports { 1511 #address-cells = <1>; 1512 #size-cells = <0>; 1513 1514 port@1 { 1515 #address-cells = <1>; 1516 #size-cells = <0>; 1517 1518 reg = <1>; 1519 1520 vin2csi20: endpoint@0 { 1521 reg = <0>; 1522 remote-endpoint = <&csi20vin2>; 1523 }; 1524 vin2csi40: endpoint@2 { 1525 reg = <2>; 1526 remote-endpoint = <&csi40vin2>; 1527 }; 1528 }; 1529 }; 1530 }; 1531 1532 vin3: video@e6ef3000 { 1533 compatible = "renesas,vin-r8a7796"; 1534 reg = <0 0xe6ef3000 0 0x1000>; 1535 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1536 clocks = <&cpg CPG_MOD 808>; 1537 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1538 resets = <&cpg 808>; 1539 renesas,id = <3>; 1540 status = "disabled"; 1541 1542 ports { 1543 #address-cells = <1>; 1544 #size-cells = <0>; 1545 1546 port@1 { 1547 #address-cells = <1>; 1548 #size-cells = <0>; 1549 1550 reg = <1>; 1551 1552 vin3csi20: endpoint@0 { 1553 reg = <0>; 1554 remote-endpoint = <&csi20vin3>; 1555 }; 1556 vin3csi40: endpoint@2 { 1557 reg = <2>; 1558 remote-endpoint = <&csi40vin3>; 1559 }; 1560 }; 1561 }; 1562 }; 1563 1564 vin4: video@e6ef4000 { 1565 compatible = "renesas,vin-r8a7796"; 1566 reg = <0 0xe6ef4000 0 0x1000>; 1567 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1568 clocks = <&cpg CPG_MOD 807>; 1569 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1570 resets = <&cpg 807>; 1571 renesas,id = <4>; 1572 status = "disabled"; 1573 1574 ports { 1575 #address-cells = <1>; 1576 #size-cells = <0>; 1577 1578 port@1 { 1579 #address-cells = <1>; 1580 #size-cells = <0>; 1581 1582 reg = <1>; 1583 1584 vin4csi20: endpoint@0 { 1585 reg = <0>; 1586 remote-endpoint = <&csi20vin4>; 1587 }; 1588 vin4csi40: endpoint@2 { 1589 reg = <2>; 1590 remote-endpoint = <&csi40vin4>; 1591 }; 1592 }; 1593 }; 1594 }; 1595 1596 vin5: video@e6ef5000 { 1597 compatible = "renesas,vin-r8a7796"; 1598 reg = <0 0xe6ef5000 0 0x1000>; 1599 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1600 clocks = <&cpg CPG_MOD 806>; 1601 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1602 resets = <&cpg 806>; 1603 renesas,id = <5>; 1604 status = "disabled"; 1605 1606 ports { 1607 #address-cells = <1>; 1608 #size-cells = <0>; 1609 1610 port@1 { 1611 #address-cells = <1>; 1612 #size-cells = <0>; 1613 1614 reg = <1>; 1615 1616 vin5csi20: endpoint@0 { 1617 reg = <0>; 1618 remote-endpoint = <&csi20vin5>; 1619 }; 1620 vin5csi40: endpoint@2 { 1621 reg = <2>; 1622 remote-endpoint = <&csi40vin5>; 1623 }; 1624 }; 1625 }; 1626 }; 1627 1628 vin6: video@e6ef6000 { 1629 compatible = "renesas,vin-r8a7796"; 1630 reg = <0 0xe6ef6000 0 0x1000>; 1631 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1632 clocks = <&cpg CPG_MOD 805>; 1633 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1634 resets = <&cpg 805>; 1635 renesas,id = <6>; 1636 status = "disabled"; 1637 1638 ports { 1639 #address-cells = <1>; 1640 #size-cells = <0>; 1641 1642 port@1 { 1643 #address-cells = <1>; 1644 #size-cells = <0>; 1645 1646 reg = <1>; 1647 1648 vin6csi20: endpoint@0 { 1649 reg = <0>; 1650 remote-endpoint = <&csi20vin6>; 1651 }; 1652 vin6csi40: endpoint@2 { 1653 reg = <2>; 1654 remote-endpoint = <&csi40vin6>; 1655 }; 1656 }; 1657 }; 1658 }; 1659 1660 vin7: video@e6ef7000 { 1661 compatible = "renesas,vin-r8a7796"; 1662 reg = <0 0xe6ef7000 0 0x1000>; 1663 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1664 clocks = <&cpg CPG_MOD 804>; 1665 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1666 resets = <&cpg 804>; 1667 renesas,id = <7>; 1668 status = "disabled"; 1669 1670 ports { 1671 #address-cells = <1>; 1672 #size-cells = <0>; 1673 1674 port@1 { 1675 #address-cells = <1>; 1676 #size-cells = <0>; 1677 1678 reg = <1>; 1679 1680 vin7csi20: endpoint@0 { 1681 reg = <0>; 1682 remote-endpoint = <&csi20vin7>; 1683 }; 1684 vin7csi40: endpoint@2 { 1685 reg = <2>; 1686 remote-endpoint = <&csi40vin7>; 1687 }; 1688 }; 1689 }; 1690 }; 1691 1692 drif00: rif@e6f40000 { 1693 compatible = "renesas,r8a7796-drif", 1694 "renesas,rcar-gen3-drif"; 1695 reg = <0 0xe6f40000 0 0x64>; 1696 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1697 clocks = <&cpg CPG_MOD 515>; 1698 clock-names = "fck"; 1699 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1700 dma-names = "rx", "rx"; 1701 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1702 resets = <&cpg 515>; 1703 renesas,bonding = <&drif01>; 1704 status = "disabled"; 1705 }; 1706 1707 drif01: rif@e6f50000 { 1708 compatible = "renesas,r8a7796-drif", 1709 "renesas,rcar-gen3-drif"; 1710 reg = <0 0xe6f50000 0 0x64>; 1711 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1712 clocks = <&cpg CPG_MOD 514>; 1713 clock-names = "fck"; 1714 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1715 dma-names = "rx", "rx"; 1716 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1717 resets = <&cpg 514>; 1718 renesas,bonding = <&drif00>; 1719 status = "disabled"; 1720 }; 1721 1722 drif10: rif@e6f60000 { 1723 compatible = "renesas,r8a7796-drif", 1724 "renesas,rcar-gen3-drif"; 1725 reg = <0 0xe6f60000 0 0x64>; 1726 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1727 clocks = <&cpg CPG_MOD 513>; 1728 clock-names = "fck"; 1729 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1730 dma-names = "rx", "rx"; 1731 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1732 resets = <&cpg 513>; 1733 renesas,bonding = <&drif11>; 1734 status = "disabled"; 1735 }; 1736 1737 drif11: rif@e6f70000 { 1738 compatible = "renesas,r8a7796-drif", 1739 "renesas,rcar-gen3-drif"; 1740 reg = <0 0xe6f70000 0 0x64>; 1741 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1742 clocks = <&cpg CPG_MOD 512>; 1743 clock-names = "fck"; 1744 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1745 dma-names = "rx", "rx"; 1746 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1747 resets = <&cpg 512>; 1748 renesas,bonding = <&drif10>; 1749 status = "disabled"; 1750 }; 1751 1752 drif20: rif@e6f80000 { 1753 compatible = "renesas,r8a7796-drif", 1754 "renesas,rcar-gen3-drif"; 1755 reg = <0 0xe6f80000 0 0x64>; 1756 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1757 clocks = <&cpg CPG_MOD 511>; 1758 clock-names = "fck"; 1759 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1760 dma-names = "rx", "rx"; 1761 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1762 resets = <&cpg 511>; 1763 renesas,bonding = <&drif21>; 1764 status = "disabled"; 1765 }; 1766 1767 drif21: rif@e6f90000 { 1768 compatible = "renesas,r8a7796-drif", 1769 "renesas,rcar-gen3-drif"; 1770 reg = <0 0xe6f90000 0 0x64>; 1771 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1772 clocks = <&cpg CPG_MOD 510>; 1773 clock-names = "fck"; 1774 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1775 dma-names = "rx", "rx"; 1776 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1777 resets = <&cpg 510>; 1778 renesas,bonding = <&drif20>; 1779 status = "disabled"; 1780 }; 1781 1782 drif30: rif@e6fa0000 { 1783 compatible = "renesas,r8a7796-drif", 1784 "renesas,rcar-gen3-drif"; 1785 reg = <0 0xe6fa0000 0 0x64>; 1786 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1787 clocks = <&cpg CPG_MOD 509>; 1788 clock-names = "fck"; 1789 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1790 dma-names = "rx", "rx"; 1791 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1792 resets = <&cpg 509>; 1793 renesas,bonding = <&drif31>; 1794 status = "disabled"; 1795 }; 1796 1797 drif31: rif@e6fb0000 { 1798 compatible = "renesas,r8a7796-drif", 1799 "renesas,rcar-gen3-drif"; 1800 reg = <0 0xe6fb0000 0 0x64>; 1801 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1802 clocks = <&cpg CPG_MOD 508>; 1803 clock-names = "fck"; 1804 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1805 dma-names = "rx", "rx"; 1806 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1807 resets = <&cpg 508>; 1808 renesas,bonding = <&drif30>; 1809 status = "disabled"; 1810 }; 1811 1812 rcar_sound: sound@ec500000 { 1813 /* 1814 * #sound-dai-cells is required 1815 * 1816 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1817 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1818 */ 1819 /* 1820 * #clock-cells is required for audio_clkout0/1/2/3 1821 * 1822 * clkout : #clock-cells = <0>; <&rcar_sound>; 1823 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1824 */ 1825 compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; 1826 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1827 <0 0xec5a0000 0 0x100>, /* ADG */ 1828 <0 0xec540000 0 0x1000>, /* SSIU */ 1829 <0 0xec541000 0 0x280>, /* SSI */ 1830 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1831 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1832 1833 clocks = <&cpg CPG_MOD 1005>, 1834 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1835 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1836 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1837 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1838 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1839 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1840 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1841 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1842 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1843 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1844 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1845 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1846 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1847 <&audio_clk_a>, <&audio_clk_b>, 1848 <&audio_clk_c>, 1849 <&cpg CPG_CORE R8A7796_CLK_S0D4>; 1850 clock-names = "ssi-all", 1851 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1852 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1853 "ssi.1", "ssi.0", 1854 "src.9", "src.8", "src.7", "src.6", 1855 "src.5", "src.4", "src.3", "src.2", 1856 "src.1", "src.0", 1857 "mix.1", "mix.0", 1858 "ctu.1", "ctu.0", 1859 "dvc.0", "dvc.1", 1860 "clk_a", "clk_b", "clk_c", "clk_i"; 1861 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1862 resets = <&cpg 1005>, 1863 <&cpg 1006>, <&cpg 1007>, 1864 <&cpg 1008>, <&cpg 1009>, 1865 <&cpg 1010>, <&cpg 1011>, 1866 <&cpg 1012>, <&cpg 1013>, 1867 <&cpg 1014>, <&cpg 1015>; 1868 reset-names = "ssi-all", 1869 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1870 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1871 "ssi.1", "ssi.0"; 1872 status = "disabled"; 1873 1874 rcar_sound,ctu { 1875 ctu00: ctu-0 { }; 1876 ctu01: ctu-1 { }; 1877 ctu02: ctu-2 { }; 1878 ctu03: ctu-3 { }; 1879 ctu10: ctu-4 { }; 1880 ctu11: ctu-5 { }; 1881 ctu12: ctu-6 { }; 1882 ctu13: ctu-7 { }; 1883 }; 1884 1885 rcar_sound,dvc { 1886 dvc0: dvc-0 { 1887 dmas = <&audma1 0xbc>; 1888 dma-names = "tx"; 1889 }; 1890 dvc1: dvc-1 { 1891 dmas = <&audma1 0xbe>; 1892 dma-names = "tx"; 1893 }; 1894 }; 1895 1896 rcar_sound,mix { 1897 mix0: mix-0 { }; 1898 mix1: mix-1 { }; 1899 }; 1900 1901 rcar_sound,src { 1902 src0: src-0 { 1903 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1904 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1905 dma-names = "rx", "tx"; 1906 }; 1907 src1: src-1 { 1908 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1909 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1910 dma-names = "rx", "tx"; 1911 }; 1912 src2: src-2 { 1913 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1914 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1915 dma-names = "rx", "tx"; 1916 }; 1917 src3: src-3 { 1918 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1919 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1920 dma-names = "rx", "tx"; 1921 }; 1922 src4: src-4 { 1923 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1924 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1925 dma-names = "rx", "tx"; 1926 }; 1927 src5: src-5 { 1928 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1929 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1930 dma-names = "rx", "tx"; 1931 }; 1932 src6: src-6 { 1933 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1934 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1935 dma-names = "rx", "tx"; 1936 }; 1937 src7: src-7 { 1938 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1939 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1940 dma-names = "rx", "tx"; 1941 }; 1942 src8: src-8 { 1943 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1944 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1945 dma-names = "rx", "tx"; 1946 }; 1947 src9: src-9 { 1948 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1949 dmas = <&audma0 0x97>, <&audma1 0xba>; 1950 dma-names = "rx", "tx"; 1951 }; 1952 }; 1953 1954 rcar_sound,ssi { 1955 ssi0: ssi-0 { 1956 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1957 dmas = <&audma0 0x01>, <&audma1 0x02>; 1958 dma-names = "rx", "tx"; 1959 }; 1960 ssi1: ssi-1 { 1961 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1962 dmas = <&audma0 0x03>, <&audma1 0x04>; 1963 dma-names = "rx", "tx"; 1964 }; 1965 ssi2: ssi-2 { 1966 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1967 dmas = <&audma0 0x05>, <&audma1 0x06>; 1968 dma-names = "rx", "tx"; 1969 }; 1970 ssi3: ssi-3 { 1971 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1972 dmas = <&audma0 0x07>, <&audma1 0x08>; 1973 dma-names = "rx", "tx"; 1974 }; 1975 ssi4: ssi-4 { 1976 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1977 dmas = <&audma0 0x09>, <&audma1 0x0a>; 1978 dma-names = "rx", "tx"; 1979 }; 1980 ssi5: ssi-5 { 1981 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1982 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 1983 dma-names = "rx", "tx"; 1984 }; 1985 ssi6: ssi-6 { 1986 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1987 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 1988 dma-names = "rx", "tx"; 1989 }; 1990 ssi7: ssi-7 { 1991 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1992 dmas = <&audma0 0x0f>, <&audma1 0x10>; 1993 dma-names = "rx", "tx"; 1994 }; 1995 ssi8: ssi-8 { 1996 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1997 dmas = <&audma0 0x11>, <&audma1 0x12>; 1998 dma-names = "rx", "tx"; 1999 }; 2000 ssi9: ssi-9 { 2001 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2002 dmas = <&audma0 0x13>, <&audma1 0x14>; 2003 dma-names = "rx", "tx"; 2004 }; 2005 }; 2006 2007 rcar_sound,ssiu { 2008 ssiu00: ssiu-0 { 2009 dmas = <&audma0 0x15>, <&audma1 0x16>; 2010 dma-names = "rx", "tx"; 2011 }; 2012 ssiu01: ssiu-1 { 2013 dmas = <&audma0 0x35>, <&audma1 0x36>; 2014 dma-names = "rx", "tx"; 2015 }; 2016 ssiu02: ssiu-2 { 2017 dmas = <&audma0 0x37>, <&audma1 0x38>; 2018 dma-names = "rx", "tx"; 2019 }; 2020 ssiu03: ssiu-3 { 2021 dmas = <&audma0 0x47>, <&audma1 0x48>; 2022 dma-names = "rx", "tx"; 2023 }; 2024 ssiu04: ssiu-4 { 2025 dmas = <&audma0 0x3F>, <&audma1 0x40>; 2026 dma-names = "rx", "tx"; 2027 }; 2028 ssiu05: ssiu-5 { 2029 dmas = <&audma0 0x43>, <&audma1 0x44>; 2030 dma-names = "rx", "tx"; 2031 }; 2032 ssiu06: ssiu-6 { 2033 dmas = <&audma0 0x4F>, <&audma1 0x50>; 2034 dma-names = "rx", "tx"; 2035 }; 2036 ssiu07: ssiu-7 { 2037 dmas = <&audma0 0x53>, <&audma1 0x54>; 2038 dma-names = "rx", "tx"; 2039 }; 2040 ssiu10: ssiu-8 { 2041 dmas = <&audma0 0x49>, <&audma1 0x4a>; 2042 dma-names = "rx", "tx"; 2043 }; 2044 ssiu11: ssiu-9 { 2045 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 2046 dma-names = "rx", "tx"; 2047 }; 2048 ssiu12: ssiu-10 { 2049 dmas = <&audma0 0x57>, <&audma1 0x58>; 2050 dma-names = "rx", "tx"; 2051 }; 2052 ssiu13: ssiu-11 { 2053 dmas = <&audma0 0x59>, <&audma1 0x5A>; 2054 dma-names = "rx", "tx"; 2055 }; 2056 ssiu14: ssiu-12 { 2057 dmas = <&audma0 0x5F>, <&audma1 0x60>; 2058 dma-names = "rx", "tx"; 2059 }; 2060 ssiu15: ssiu-13 { 2061 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 2062 dma-names = "rx", "tx"; 2063 }; 2064 ssiu16: ssiu-14 { 2065 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 2066 dma-names = "rx", "tx"; 2067 }; 2068 ssiu17: ssiu-15 { 2069 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 2070 dma-names = "rx", "tx"; 2071 }; 2072 ssiu20: ssiu-16 { 2073 dmas = <&audma0 0x63>, <&audma1 0x64>; 2074 dma-names = "rx", "tx"; 2075 }; 2076 ssiu21: ssiu-17 { 2077 dmas = <&audma0 0x67>, <&audma1 0x68>; 2078 dma-names = "rx", "tx"; 2079 }; 2080 ssiu22: ssiu-18 { 2081 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 2082 dma-names = "rx", "tx"; 2083 }; 2084 ssiu23: ssiu-19 { 2085 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 2086 dma-names = "rx", "tx"; 2087 }; 2088 ssiu24: ssiu-20 { 2089 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 2090 dma-names = "rx", "tx"; 2091 }; 2092 ssiu25: ssiu-21 { 2093 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 2094 dma-names = "rx", "tx"; 2095 }; 2096 ssiu26: ssiu-22 { 2097 dmas = <&audma0 0xED>, <&audma1 0xEE>; 2098 dma-names = "rx", "tx"; 2099 }; 2100 ssiu27: ssiu-23 { 2101 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 2102 dma-names = "rx", "tx"; 2103 }; 2104 ssiu30: ssiu-24 { 2105 dmas = <&audma0 0x6f>, <&audma1 0x70>; 2106 dma-names = "rx", "tx"; 2107 }; 2108 ssiu31: ssiu-25 { 2109 dmas = <&audma0 0x21>, <&audma1 0x22>; 2110 dma-names = "rx", "tx"; 2111 }; 2112 ssiu32: ssiu-26 { 2113 dmas = <&audma0 0x23>, <&audma1 0x24>; 2114 dma-names = "rx", "tx"; 2115 }; 2116 ssiu33: ssiu-27 { 2117 dmas = <&audma0 0x25>, <&audma1 0x26>; 2118 dma-names = "rx", "tx"; 2119 }; 2120 ssiu34: ssiu-28 { 2121 dmas = <&audma0 0x27>, <&audma1 0x28>; 2122 dma-names = "rx", "tx"; 2123 }; 2124 ssiu35: ssiu-29 { 2125 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2126 dma-names = "rx", "tx"; 2127 }; 2128 ssiu36: ssiu-30 { 2129 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2130 dma-names = "rx", "tx"; 2131 }; 2132 ssiu37: ssiu-31 { 2133 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2134 dma-names = "rx", "tx"; 2135 }; 2136 ssiu40: ssiu-32 { 2137 dmas = <&audma0 0x71>, <&audma1 0x72>; 2138 dma-names = "rx", "tx"; 2139 }; 2140 ssiu41: ssiu-33 { 2141 dmas = <&audma0 0x17>, <&audma1 0x18>; 2142 dma-names = "rx", "tx"; 2143 }; 2144 ssiu42: ssiu-34 { 2145 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2146 dma-names = "rx", "tx"; 2147 }; 2148 ssiu43: ssiu-35 { 2149 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2150 dma-names = "rx", "tx"; 2151 }; 2152 ssiu44: ssiu-36 { 2153 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2154 dma-names = "rx", "tx"; 2155 }; 2156 ssiu45: ssiu-37 { 2157 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2158 dma-names = "rx", "tx"; 2159 }; 2160 ssiu46: ssiu-38 { 2161 dmas = <&audma0 0x31>, <&audma1 0x32>; 2162 dma-names = "rx", "tx"; 2163 }; 2164 ssiu47: ssiu-39 { 2165 dmas = <&audma0 0x33>, <&audma1 0x34>; 2166 dma-names = "rx", "tx"; 2167 }; 2168 ssiu50: ssiu-40 { 2169 dmas = <&audma0 0x73>, <&audma1 0x74>; 2170 dma-names = "rx", "tx"; 2171 }; 2172 ssiu60: ssiu-41 { 2173 dmas = <&audma0 0x75>, <&audma1 0x76>; 2174 dma-names = "rx", "tx"; 2175 }; 2176 ssiu70: ssiu-42 { 2177 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2178 dma-names = "rx", "tx"; 2179 }; 2180 ssiu80: ssiu-43 { 2181 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2182 dma-names = "rx", "tx"; 2183 }; 2184 ssiu90: ssiu-44 { 2185 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2186 dma-names = "rx", "tx"; 2187 }; 2188 ssiu91: ssiu-45 { 2189 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2190 dma-names = "rx", "tx"; 2191 }; 2192 ssiu92: ssiu-46 { 2193 dmas = <&audma0 0x81>, <&audma1 0x82>; 2194 dma-names = "rx", "tx"; 2195 }; 2196 ssiu93: ssiu-47 { 2197 dmas = <&audma0 0x83>, <&audma1 0x84>; 2198 dma-names = "rx", "tx"; 2199 }; 2200 ssiu94: ssiu-48 { 2201 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2202 dma-names = "rx", "tx"; 2203 }; 2204 ssiu95: ssiu-49 { 2205 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2206 dma-names = "rx", "tx"; 2207 }; 2208 ssiu96: ssiu-50 { 2209 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2210 dma-names = "rx", "tx"; 2211 }; 2212 ssiu97: ssiu-51 { 2213 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2214 dma-names = "rx", "tx"; 2215 }; 2216 }; 2217 }; 2218 2219 audma0: dma-controller@ec700000 { 2220 compatible = "renesas,dmac-r8a7796", 2221 "renesas,rcar-dmac"; 2222 reg = <0 0xec700000 0 0x10000>; 2223 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2224 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2225 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2226 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2227 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2228 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2229 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2230 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2231 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2232 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2233 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2234 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2235 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2236 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2237 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2238 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2239 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2240 interrupt-names = "error", 2241 "ch0", "ch1", "ch2", "ch3", 2242 "ch4", "ch5", "ch6", "ch7", 2243 "ch8", "ch9", "ch10", "ch11", 2244 "ch12", "ch13", "ch14", "ch15"; 2245 clocks = <&cpg CPG_MOD 502>; 2246 clock-names = "fck"; 2247 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2248 resets = <&cpg 502>; 2249 #dma-cells = <1>; 2250 dma-channels = <16>; 2251 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 2252 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 2253 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 2254 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 2255 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 2256 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 2257 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 2258 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 2259 }; 2260 2261 audma1: dma-controller@ec720000 { 2262 compatible = "renesas,dmac-r8a7796", 2263 "renesas,rcar-dmac"; 2264 reg = <0 0xec720000 0 0x10000>; 2265 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2266 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2267 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2268 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2269 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2270 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2271 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2272 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2273 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2274 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2275 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2276 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2277 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2278 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2279 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2280 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2281 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2282 interrupt-names = "error", 2283 "ch0", "ch1", "ch2", "ch3", 2284 "ch4", "ch5", "ch6", "ch7", 2285 "ch8", "ch9", "ch10", "ch11", 2286 "ch12", "ch13", "ch14", "ch15"; 2287 clocks = <&cpg CPG_MOD 501>; 2288 clock-names = "fck"; 2289 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2290 resets = <&cpg 501>; 2291 #dma-cells = <1>; 2292 dma-channels = <16>; 2293 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, 2294 <&ipmmu_mp 18>, <&ipmmu_mp 19>, 2295 <&ipmmu_mp 20>, <&ipmmu_mp 21>, 2296 <&ipmmu_mp 22>, <&ipmmu_mp 23>, 2297 <&ipmmu_mp 24>, <&ipmmu_mp 25>, 2298 <&ipmmu_mp 26>, <&ipmmu_mp 27>, 2299 <&ipmmu_mp 28>, <&ipmmu_mp 29>, 2300 <&ipmmu_mp 30>, <&ipmmu_mp 31>; 2301 }; 2302 2303 xhci0: usb@ee000000 { 2304 compatible = "renesas,xhci-r8a7796", 2305 "renesas,rcar-gen3-xhci"; 2306 reg = <0 0xee000000 0 0xc00>; 2307 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2308 clocks = <&cpg CPG_MOD 328>; 2309 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2310 resets = <&cpg 328>; 2311 status = "disabled"; 2312 }; 2313 2314 usb3_peri0: usb@ee020000 { 2315 compatible = "renesas,r8a7796-usb3-peri", 2316 "renesas,rcar-gen3-usb3-peri"; 2317 reg = <0 0xee020000 0 0x400>; 2318 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2319 clocks = <&cpg CPG_MOD 328>; 2320 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2321 resets = <&cpg 328>; 2322 status = "disabled"; 2323 }; 2324 2325 ohci0: usb@ee080000 { 2326 compatible = "generic-ohci"; 2327 reg = <0 0xee080000 0 0x100>; 2328 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2329 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2330 phys = <&usb2_phy0 1>; 2331 phy-names = "usb"; 2332 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2333 resets = <&cpg 703>, <&cpg 704>; 2334 status = "disabled"; 2335 }; 2336 2337 ohci1: usb@ee0a0000 { 2338 compatible = "generic-ohci"; 2339 reg = <0 0xee0a0000 0 0x100>; 2340 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2341 clocks = <&cpg CPG_MOD 702>; 2342 phys = <&usb2_phy1 1>; 2343 phy-names = "usb"; 2344 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2345 resets = <&cpg 702>; 2346 status = "disabled"; 2347 }; 2348 2349 ehci0: usb@ee080100 { 2350 compatible = "generic-ehci"; 2351 reg = <0 0xee080100 0 0x100>; 2352 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2353 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2354 phys = <&usb2_phy0 2>; 2355 phy-names = "usb"; 2356 companion = <&ohci0>; 2357 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2358 resets = <&cpg 703>, <&cpg 704>; 2359 status = "disabled"; 2360 }; 2361 2362 ehci1: usb@ee0a0100 { 2363 compatible = "generic-ehci"; 2364 reg = <0 0xee0a0100 0 0x100>; 2365 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2366 clocks = <&cpg CPG_MOD 702>; 2367 phys = <&usb2_phy1 2>; 2368 phy-names = "usb"; 2369 companion = <&ohci1>; 2370 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2371 resets = <&cpg 702>; 2372 status = "disabled"; 2373 }; 2374 2375 usb2_phy0: usb-phy@ee080200 { 2376 compatible = "renesas,usb2-phy-r8a7796", 2377 "renesas,rcar-gen3-usb2-phy"; 2378 reg = <0 0xee080200 0 0x700>; 2379 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2380 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2381 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2382 resets = <&cpg 703>, <&cpg 704>; 2383 #phy-cells = <1>; 2384 status = "disabled"; 2385 }; 2386 2387 usb2_phy1: usb-phy@ee0a0200 { 2388 compatible = "renesas,usb2-phy-r8a7796", 2389 "renesas,rcar-gen3-usb2-phy"; 2390 reg = <0 0xee0a0200 0 0x700>; 2391 clocks = <&cpg CPG_MOD 702>; 2392 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2393 resets = <&cpg 702>; 2394 #phy-cells = <1>; 2395 status = "disabled"; 2396 }; 2397 2398 sdhi0: mmc@ee100000 { 2399 compatible = "renesas,sdhi-r8a7796", 2400 "renesas,rcar-gen3-sdhi"; 2401 reg = <0 0xee100000 0 0x2000>; 2402 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2403 clocks = <&cpg CPG_MOD 314>; 2404 max-frequency = <200000000>; 2405 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2406 resets = <&cpg 314>; 2407 iommus = <&ipmmu_ds1 32>; 2408 status = "disabled"; 2409 }; 2410 2411 sdhi1: mmc@ee120000 { 2412 compatible = "renesas,sdhi-r8a7796", 2413 "renesas,rcar-gen3-sdhi"; 2414 reg = <0 0xee120000 0 0x2000>; 2415 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2416 clocks = <&cpg CPG_MOD 313>; 2417 max-frequency = <200000000>; 2418 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2419 resets = <&cpg 313>; 2420 iommus = <&ipmmu_ds1 33>; 2421 status = "disabled"; 2422 }; 2423 2424 sdhi2: mmc@ee140000 { 2425 compatible = "renesas,sdhi-r8a7796", 2426 "renesas,rcar-gen3-sdhi"; 2427 reg = <0 0xee140000 0 0x2000>; 2428 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2429 clocks = <&cpg CPG_MOD 312>; 2430 max-frequency = <200000000>; 2431 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2432 resets = <&cpg 312>; 2433 iommus = <&ipmmu_ds1 34>; 2434 status = "disabled"; 2435 }; 2436 2437 sdhi3: mmc@ee160000 { 2438 compatible = "renesas,sdhi-r8a7796", 2439 "renesas,rcar-gen3-sdhi"; 2440 reg = <0 0xee160000 0 0x2000>; 2441 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2442 clocks = <&cpg CPG_MOD 311>; 2443 max-frequency = <200000000>; 2444 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2445 resets = <&cpg 311>; 2446 iommus = <&ipmmu_ds1 35>; 2447 status = "disabled"; 2448 }; 2449 2450 gic: interrupt-controller@f1010000 { 2451 compatible = "arm,gic-400"; 2452 #interrupt-cells = <3>; 2453 #address-cells = <0>; 2454 interrupt-controller; 2455 reg = <0x0 0xf1010000 0 0x1000>, 2456 <0x0 0xf1020000 0 0x20000>, 2457 <0x0 0xf1040000 0 0x20000>, 2458 <0x0 0xf1060000 0 0x20000>; 2459 interrupts = <GIC_PPI 9 2460 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 2461 clocks = <&cpg CPG_MOD 408>; 2462 clock-names = "clk"; 2463 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2464 resets = <&cpg 408>; 2465 }; 2466 2467 pciec0: pcie@fe000000 { 2468 compatible = "renesas,pcie-r8a7796", 2469 "renesas,pcie-rcar-gen3"; 2470 reg = <0 0xfe000000 0 0x80000>; 2471 #address-cells = <3>; 2472 #size-cells = <2>; 2473 bus-range = <0x00 0xff>; 2474 device_type = "pci"; 2475 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2476 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2477 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2478 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2479 /* Map all possible DDR as inbound ranges */ 2480 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2481 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2482 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2483 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2484 #interrupt-cells = <1>; 2485 interrupt-map-mask = <0 0 0 0>; 2486 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2487 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2488 clock-names = "pcie", "pcie_bus"; 2489 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2490 resets = <&cpg 319>; 2491 status = "disabled"; 2492 }; 2493 2494 pciec1: pcie@ee800000 { 2495 compatible = "renesas,pcie-r8a7796", 2496 "renesas,pcie-rcar-gen3"; 2497 reg = <0 0xee800000 0 0x80000>; 2498 #address-cells = <3>; 2499 #size-cells = <2>; 2500 bus-range = <0x00 0xff>; 2501 device_type = "pci"; 2502 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2503 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2504 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2505 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2506 /* Map all possible DDR as inbound ranges */ 2507 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2508 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2509 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2510 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2511 #interrupt-cells = <1>; 2512 interrupt-map-mask = <0 0 0 0>; 2513 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2514 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2515 clock-names = "pcie", "pcie_bus"; 2516 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2517 resets = <&cpg 318>; 2518 status = "disabled"; 2519 }; 2520 2521 imr-lx4@fe860000 { 2522 compatible = "renesas,r8a7796-imr-lx4", 2523 "renesas,imr-lx4"; 2524 reg = <0 0xfe860000 0 0x2000>; 2525 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2526 clocks = <&cpg CPG_MOD 823>; 2527 power-domains = <&sysc R8A7796_PD_A3VC>; 2528 resets = <&cpg 823>; 2529 }; 2530 2531 imr-lx4@fe870000 { 2532 compatible = "renesas,r8a7796-imr-lx4", 2533 "renesas,imr-lx4"; 2534 reg = <0 0xfe870000 0 0x2000>; 2535 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2536 clocks = <&cpg CPG_MOD 822>; 2537 power-domains = <&sysc R8A7796_PD_A3VC>; 2538 resets = <&cpg 822>; 2539 }; 2540 2541 fdp1@fe940000 { 2542 compatible = "renesas,fdp1"; 2543 reg = <0 0xfe940000 0 0x2400>; 2544 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2545 clocks = <&cpg CPG_MOD 119>; 2546 power-domains = <&sysc R8A7796_PD_A3VC>; 2547 resets = <&cpg 119>; 2548 renesas,fcp = <&fcpf0>; 2549 }; 2550 2551 fcpf0: fcp@fe950000 { 2552 compatible = "renesas,fcpf"; 2553 reg = <0 0xfe950000 0 0x200>; 2554 clocks = <&cpg CPG_MOD 615>; 2555 power-domains = <&sysc R8A7796_PD_A3VC>; 2556 resets = <&cpg 615>; 2557 }; 2558 2559 fcpvb0: fcp@fe96f000 { 2560 compatible = "renesas,fcpv"; 2561 reg = <0 0xfe96f000 0 0x200>; 2562 clocks = <&cpg CPG_MOD 607>; 2563 power-domains = <&sysc R8A7796_PD_A3VC>; 2564 resets = <&cpg 607>; 2565 }; 2566 2567 fcpvi0: fcp@fe9af000 { 2568 compatible = "renesas,fcpv"; 2569 reg = <0 0xfe9af000 0 0x200>; 2570 clocks = <&cpg CPG_MOD 611>; 2571 power-domains = <&sysc R8A7796_PD_A3VC>; 2572 resets = <&cpg 611>; 2573 iommus = <&ipmmu_vc0 19>; 2574 }; 2575 2576 fcpvd0: fcp@fea27000 { 2577 compatible = "renesas,fcpv"; 2578 reg = <0 0xfea27000 0 0x200>; 2579 clocks = <&cpg CPG_MOD 603>; 2580 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2581 resets = <&cpg 603>; 2582 iommus = <&ipmmu_vi0 8>; 2583 }; 2584 2585 fcpvd1: fcp@fea2f000 { 2586 compatible = "renesas,fcpv"; 2587 reg = <0 0xfea2f000 0 0x200>; 2588 clocks = <&cpg CPG_MOD 602>; 2589 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2590 resets = <&cpg 602>; 2591 iommus = <&ipmmu_vi0 9>; 2592 }; 2593 2594 fcpvd2: fcp@fea37000 { 2595 compatible = "renesas,fcpv"; 2596 reg = <0 0xfea37000 0 0x200>; 2597 clocks = <&cpg CPG_MOD 601>; 2598 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2599 resets = <&cpg 601>; 2600 iommus = <&ipmmu_vi0 10>; 2601 }; 2602 2603 vspb: vsp@fe960000 { 2604 compatible = "renesas,vsp2"; 2605 reg = <0 0xfe960000 0 0x8000>; 2606 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2607 clocks = <&cpg CPG_MOD 626>; 2608 power-domains = <&sysc R8A7796_PD_A3VC>; 2609 resets = <&cpg 626>; 2610 2611 renesas,fcp = <&fcpvb0>; 2612 }; 2613 2614 vspd0: vsp@fea20000 { 2615 compatible = "renesas,vsp2"; 2616 reg = <0 0xfea20000 0 0x5000>; 2617 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2618 clocks = <&cpg CPG_MOD 623>; 2619 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2620 resets = <&cpg 623>; 2621 2622 renesas,fcp = <&fcpvd0>; 2623 }; 2624 2625 vspd1: vsp@fea28000 { 2626 compatible = "renesas,vsp2"; 2627 reg = <0 0xfea28000 0 0x5000>; 2628 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2629 clocks = <&cpg CPG_MOD 622>; 2630 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2631 resets = <&cpg 622>; 2632 2633 renesas,fcp = <&fcpvd1>; 2634 }; 2635 2636 vspd2: vsp@fea30000 { 2637 compatible = "renesas,vsp2"; 2638 reg = <0 0xfea30000 0 0x5000>; 2639 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2640 clocks = <&cpg CPG_MOD 621>; 2641 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2642 resets = <&cpg 621>; 2643 2644 renesas,fcp = <&fcpvd2>; 2645 }; 2646 2647 vspi0: vsp@fe9a0000 { 2648 compatible = "renesas,vsp2"; 2649 reg = <0 0xfe9a0000 0 0x8000>; 2650 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2651 clocks = <&cpg CPG_MOD 631>; 2652 power-domains = <&sysc R8A7796_PD_A3VC>; 2653 resets = <&cpg 631>; 2654 2655 renesas,fcp = <&fcpvi0>; 2656 }; 2657 2658 cmm0: cmm@fea40000 { 2659 compatible = "renesas,r8a7796-cmm", 2660 "renesas,rcar-gen3-cmm"; 2661 reg = <0 0xfea40000 0 0x1000>; 2662 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2663 clocks = <&cpg CPG_MOD 711>; 2664 resets = <&cpg 711>; 2665 }; 2666 2667 cmm1: cmm@fea50000 { 2668 compatible = "renesas,r8a7796-cmm", 2669 "renesas,rcar-gen3-cmm"; 2670 reg = <0 0xfea50000 0 0x1000>; 2671 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2672 clocks = <&cpg CPG_MOD 710>; 2673 resets = <&cpg 710>; 2674 }; 2675 2676 cmm2: cmm@fea60000 { 2677 compatible = "renesas,r8a7796-cmm", 2678 "renesas,rcar-gen3-cmm"; 2679 reg = <0 0xfea60000 0 0x1000>; 2680 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2681 clocks = <&cpg CPG_MOD 709>; 2682 resets = <&cpg 709>; 2683 }; 2684 2685 csi20: csi2@fea80000 { 2686 compatible = "renesas,r8a7796-csi2"; 2687 reg = <0 0xfea80000 0 0x10000>; 2688 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2689 clocks = <&cpg CPG_MOD 714>; 2690 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2691 resets = <&cpg 714>; 2692 status = "disabled"; 2693 2694 ports { 2695 #address-cells = <1>; 2696 #size-cells = <0>; 2697 2698 port@1 { 2699 #address-cells = <1>; 2700 #size-cells = <0>; 2701 2702 reg = <1>; 2703 2704 csi20vin0: endpoint@0 { 2705 reg = <0>; 2706 remote-endpoint = <&vin0csi20>; 2707 }; 2708 csi20vin1: endpoint@1 { 2709 reg = <1>; 2710 remote-endpoint = <&vin1csi20>; 2711 }; 2712 csi20vin2: endpoint@2 { 2713 reg = <2>; 2714 remote-endpoint = <&vin2csi20>; 2715 }; 2716 csi20vin3: endpoint@3 { 2717 reg = <3>; 2718 remote-endpoint = <&vin3csi20>; 2719 }; 2720 csi20vin4: endpoint@4 { 2721 reg = <4>; 2722 remote-endpoint = <&vin4csi20>; 2723 }; 2724 csi20vin5: endpoint@5 { 2725 reg = <5>; 2726 remote-endpoint = <&vin5csi20>; 2727 }; 2728 csi20vin6: endpoint@6 { 2729 reg = <6>; 2730 remote-endpoint = <&vin6csi20>; 2731 }; 2732 csi20vin7: endpoint@7 { 2733 reg = <7>; 2734 remote-endpoint = <&vin7csi20>; 2735 }; 2736 }; 2737 }; 2738 }; 2739 2740 csi40: csi2@feaa0000 { 2741 compatible = "renesas,r8a7796-csi2"; 2742 reg = <0 0xfeaa0000 0 0x10000>; 2743 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2744 clocks = <&cpg CPG_MOD 716>; 2745 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2746 resets = <&cpg 716>; 2747 status = "disabled"; 2748 2749 ports { 2750 #address-cells = <1>; 2751 #size-cells = <0>; 2752 2753 port@1 { 2754 #address-cells = <1>; 2755 #size-cells = <0>; 2756 2757 reg = <1>; 2758 2759 csi40vin0: endpoint@0 { 2760 reg = <0>; 2761 remote-endpoint = <&vin0csi40>; 2762 }; 2763 csi40vin1: endpoint@1 { 2764 reg = <1>; 2765 remote-endpoint = <&vin1csi40>; 2766 }; 2767 csi40vin2: endpoint@2 { 2768 reg = <2>; 2769 remote-endpoint = <&vin2csi40>; 2770 }; 2771 csi40vin3: endpoint@3 { 2772 reg = <3>; 2773 remote-endpoint = <&vin3csi40>; 2774 }; 2775 csi40vin4: endpoint@4 { 2776 reg = <4>; 2777 remote-endpoint = <&vin4csi40>; 2778 }; 2779 csi40vin5: endpoint@5 { 2780 reg = <5>; 2781 remote-endpoint = <&vin5csi40>; 2782 }; 2783 csi40vin6: endpoint@6 { 2784 reg = <6>; 2785 remote-endpoint = <&vin6csi40>; 2786 }; 2787 csi40vin7: endpoint@7 { 2788 reg = <7>; 2789 remote-endpoint = <&vin7csi40>; 2790 }; 2791 }; 2792 2793 }; 2794 }; 2795 2796 hdmi0: hdmi@fead0000 { 2797 compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi"; 2798 reg = <0 0xfead0000 0 0x10000>; 2799 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2800 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>; 2801 clock-names = "iahb", "isfr"; 2802 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2803 resets = <&cpg 729>; 2804 status = "disabled"; 2805 2806 ports { 2807 #address-cells = <1>; 2808 #size-cells = <0>; 2809 port@0 { 2810 reg = <0>; 2811 dw_hdmi0_in: endpoint { 2812 remote-endpoint = <&du_out_hdmi0>; 2813 }; 2814 }; 2815 port@1 { 2816 reg = <1>; 2817 }; 2818 port@2 { 2819 /* HDMI sound */ 2820 reg = <2>; 2821 }; 2822 }; 2823 }; 2824 2825 du: display@feb00000 { 2826 compatible = "renesas,du-r8a7796"; 2827 reg = <0 0xfeb00000 0 0x70000>; 2828 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2829 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2830 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 2831 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2832 <&cpg CPG_MOD 722>; 2833 clock-names = "du.0", "du.1", "du.2"; 2834 resets = <&cpg 724>, <&cpg 722>; 2835 reset-names = "du.0", "du.2"; 2836 2837 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>; 2838 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>; 2839 2840 status = "disabled"; 2841 2842 ports { 2843 #address-cells = <1>; 2844 #size-cells = <0>; 2845 2846 port@0 { 2847 reg = <0>; 2848 du_out_rgb: endpoint { 2849 }; 2850 }; 2851 port@1 { 2852 reg = <1>; 2853 du_out_hdmi0: endpoint { 2854 remote-endpoint = <&dw_hdmi0_in>; 2855 }; 2856 }; 2857 port@2 { 2858 reg = <2>; 2859 du_out_lvds0: endpoint { 2860 remote-endpoint = <&lvds0_in>; 2861 }; 2862 }; 2863 }; 2864 }; 2865 2866 lvds0: lvds@feb90000 { 2867 compatible = "renesas,r8a7796-lvds"; 2868 reg = <0 0xfeb90000 0 0x14>; 2869 clocks = <&cpg CPG_MOD 727>; 2870 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2871 resets = <&cpg 727>; 2872 status = "disabled"; 2873 2874 ports { 2875 #address-cells = <1>; 2876 #size-cells = <0>; 2877 2878 port@0 { 2879 reg = <0>; 2880 lvds0_in: endpoint { 2881 remote-endpoint = <&du_out_lvds0>; 2882 }; 2883 }; 2884 port@1 { 2885 reg = <1>; 2886 lvds0_out: endpoint { 2887 }; 2888 }; 2889 }; 2890 }; 2891 2892 prr: chipid@fff00044 { 2893 compatible = "renesas,prr"; 2894 reg = <0 0xfff00044 0 4>; 2895 }; 2896 }; 2897 2898 thermal-zones { 2899 sensor_thermal1: sensor-thermal1 { 2900 polling-delay-passive = <250>; 2901 polling-delay = <1000>; 2902 thermal-sensors = <&tsc 0>; 2903 sustainable-power = <3874>; 2904 2905 trips { 2906 sensor1_crit: sensor1-crit { 2907 temperature = <120000>; 2908 hysteresis = <1000>; 2909 type = "critical"; 2910 }; 2911 }; 2912 }; 2913 2914 sensor_thermal2: sensor-thermal2 { 2915 polling-delay-passive = <250>; 2916 polling-delay = <1000>; 2917 thermal-sensors = <&tsc 1>; 2918 sustainable-power = <3874>; 2919 2920 trips { 2921 sensor2_crit: sensor2-crit { 2922 temperature = <120000>; 2923 hysteresis = <1000>; 2924 type = "critical"; 2925 }; 2926 }; 2927 }; 2928 2929 sensor_thermal3: sensor-thermal3 { 2930 polling-delay-passive = <250>; 2931 polling-delay = <1000>; 2932 thermal-sensors = <&tsc 2>; 2933 sustainable-power = <3874>; 2934 2935 cooling-maps { 2936 map0 { 2937 trip = <&target>; 2938 cooling-device = <&a57_0 2 4>; 2939 contribution = <1024>; 2940 }; 2941 map1 { 2942 trip = <&target>; 2943 cooling-device = <&a53_0 0 2>; 2944 contribution = <1024>; 2945 }; 2946 }; 2947 trips { 2948 target: trip-point1 { 2949 temperature = <100000>; 2950 hysteresis = <1000>; 2951 type = "passive"; 2952 }; 2953 2954 sensor3_crit: sensor3-crit { 2955 temperature = <120000>; 2956 hysteresis = <1000>; 2957 type = "critical"; 2958 }; 2959 }; 2960 }; 2961 }; 2962 2963 timer { 2964 compatible = "arm,armv8-timer"; 2965 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2966 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2967 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2968 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; 2969 }; 2970 2971 /* External USB clocks - can be overridden by the board */ 2972 usb3s0_clk: usb3s0 { 2973 compatible = "fixed-clock"; 2974 #clock-cells = <0>; 2975 clock-frequency = <0>; 2976 }; 2977 2978 usb_extal_clk: usb_extal { 2979 compatible = "fixed-clock"; 2980 #clock-cells = <0>; 2981 clock-frequency = <0>; 2982 }; 2983}; 2984