1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC 4 * 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77961-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77961-sysc.h> 11 12#define CPG_AUDIO_CLK_I R8A77961_CLK_S0D4 13 14/ { 15 compatible = "renesas,r8a77961"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 /* 20 * The external audio clocks are configured as 0 Hz fixed frequency 21 * clocks by default. 22 * Boards that provide audio clocks should override them. 23 */ 24 audio_clk_a: audio_clk_a { 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; 27 clock-frequency = <0>; 28 }; 29 30 audio_clk_b: audio_clk_b { 31 compatible = "fixed-clock"; 32 #clock-cells = <0>; 33 clock-frequency = <0>; 34 }; 35 36 audio_clk_c: audio_clk_c { 37 compatible = "fixed-clock"; 38 #clock-cells = <0>; 39 clock-frequency = <0>; 40 }; 41 42 /* External CAN clock - to be overridden by boards that provide it */ 43 can_clk: can { 44 compatible = "fixed-clock"; 45 #clock-cells = <0>; 46 clock-frequency = <0>; 47 }; 48 49 cluster0_opp: opp_table0 { 50 compatible = "operating-points-v2"; 51 opp-shared; 52 53 opp-500000000 { 54 opp-hz = /bits/ 64 <500000000>; 55 opp-microvolt = <830000>; 56 clock-latency-ns = <300000>; 57 }; 58 opp-1000000000 { 59 opp-hz = /bits/ 64 <1000000000>; 60 opp-microvolt = <830000>; 61 clock-latency-ns = <300000>; 62 }; 63 opp-1500000000 { 64 opp-hz = /bits/ 64 <1500000000>; 65 opp-microvolt = <830000>; 66 clock-latency-ns = <300000>; 67 opp-suspend; 68 }; 69 opp-1600000000 { 70 opp-hz = /bits/ 64 <1600000000>; 71 opp-microvolt = <900000>; 72 clock-latency-ns = <300000>; 73 turbo-mode; 74 }; 75 opp-1700000000 { 76 opp-hz = /bits/ 64 <1700000000>; 77 opp-microvolt = <900000>; 78 clock-latency-ns = <300000>; 79 turbo-mode; 80 }; 81 opp-1800000000 { 82 opp-hz = /bits/ 64 <1800000000>; 83 opp-microvolt = <960000>; 84 clock-latency-ns = <300000>; 85 turbo-mode; 86 }; 87 }; 88 89 cluster1_opp: opp_table1 { 90 compatible = "operating-points-v2"; 91 opp-shared; 92 93 opp-800000000 { 94 opp-hz = /bits/ 64 <800000000>; 95 opp-microvolt = <820000>; 96 clock-latency-ns = <300000>; 97 }; 98 opp-1000000000 { 99 opp-hz = /bits/ 64 <1000000000>; 100 opp-microvolt = <820000>; 101 clock-latency-ns = <300000>; 102 }; 103 opp-1200000000 { 104 opp-hz = /bits/ 64 <1200000000>; 105 opp-microvolt = <820000>; 106 clock-latency-ns = <300000>; 107 }; 108 opp-1300000000 { 109 opp-hz = /bits/ 64 <1300000000>; 110 opp-microvolt = <820000>; 111 clock-latency-ns = <300000>; 112 turbo-mode; 113 }; 114 }; 115 116 cpus { 117 #address-cells = <1>; 118 #size-cells = <0>; 119 120 cpu-map { 121 cluster0 { 122 core0 { 123 cpu = <&a57_0>; 124 }; 125 core1 { 126 cpu = <&a57_1>; 127 }; 128 }; 129 130 cluster1 { 131 core0 { 132 cpu = <&a53_0>; 133 }; 134 core1 { 135 cpu = <&a53_1>; 136 }; 137 core2 { 138 cpu = <&a53_2>; 139 }; 140 core3 { 141 cpu = <&a53_3>; 142 }; 143 }; 144 }; 145 146 a57_0: cpu@0 { 147 compatible = "arm,cortex-a57"; 148 reg = <0x0>; 149 device_type = "cpu"; 150 power-domains = <&sysc R8A77961_PD_CA57_CPU0>; 151 next-level-cache = <&L2_CA57>; 152 enable-method = "psci"; 153 cpu-idle-states = <&CPU_SLEEP_0>; 154 dynamic-power-coefficient = <854>; 155 clocks = <&cpg CPG_CORE R8A77961_CLK_Z>; 156 operating-points-v2 = <&cluster0_opp>; 157 capacity-dmips-mhz = <1024>; 158 #cooling-cells = <2>; 159 }; 160 161 a57_1: cpu@1 { 162 compatible = "arm,cortex-a57"; 163 reg = <0x1>; 164 device_type = "cpu"; 165 power-domains = <&sysc R8A77961_PD_CA57_CPU1>; 166 next-level-cache = <&L2_CA57>; 167 enable-method = "psci"; 168 cpu-idle-states = <&CPU_SLEEP_0>; 169 clocks = <&cpg CPG_CORE R8A77961_CLK_Z>; 170 operating-points-v2 = <&cluster0_opp>; 171 capacity-dmips-mhz = <1024>; 172 #cooling-cells = <2>; 173 }; 174 175 a53_0: cpu@100 { 176 compatible = "arm,cortex-a53"; 177 reg = <0x100>; 178 device_type = "cpu"; 179 power-domains = <&sysc R8A77961_PD_CA53_CPU0>; 180 next-level-cache = <&L2_CA53>; 181 enable-method = "psci"; 182 cpu-idle-states = <&CPU_SLEEP_1>; 183 #cooling-cells = <2>; 184 dynamic-power-coefficient = <277>; 185 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 186 operating-points-v2 = <&cluster1_opp>; 187 capacity-dmips-mhz = <535>; 188 }; 189 190 a53_1: cpu@101 { 191 compatible = "arm,cortex-a53"; 192 reg = <0x101>; 193 device_type = "cpu"; 194 power-domains = <&sysc R8A77961_PD_CA53_CPU1>; 195 next-level-cache = <&L2_CA53>; 196 enable-method = "psci"; 197 cpu-idle-states = <&CPU_SLEEP_1>; 198 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 199 operating-points-v2 = <&cluster1_opp>; 200 capacity-dmips-mhz = <535>; 201 }; 202 203 a53_2: cpu@102 { 204 compatible = "arm,cortex-a53"; 205 reg = <0x102>; 206 device_type = "cpu"; 207 power-domains = <&sysc R8A77961_PD_CA53_CPU2>; 208 next-level-cache = <&L2_CA53>; 209 enable-method = "psci"; 210 cpu-idle-states = <&CPU_SLEEP_1>; 211 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 212 operating-points-v2 = <&cluster1_opp>; 213 capacity-dmips-mhz = <535>; 214 }; 215 216 a53_3: cpu@103 { 217 compatible = "arm,cortex-a53"; 218 reg = <0x103>; 219 device_type = "cpu"; 220 power-domains = <&sysc R8A77961_PD_CA53_CPU3>; 221 next-level-cache = <&L2_CA53>; 222 enable-method = "psci"; 223 cpu-idle-states = <&CPU_SLEEP_1>; 224 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 225 operating-points-v2 = <&cluster1_opp>; 226 capacity-dmips-mhz = <535>; 227 }; 228 229 L2_CA57: cache-controller-0 { 230 compatible = "cache"; 231 power-domains = <&sysc R8A77961_PD_CA57_SCU>; 232 cache-unified; 233 cache-level = <2>; 234 }; 235 236 L2_CA53: cache-controller-1 { 237 compatible = "cache"; 238 power-domains = <&sysc R8A77961_PD_CA53_SCU>; 239 cache-unified; 240 cache-level = <2>; 241 }; 242 243 idle-states { 244 entry-method = "psci"; 245 246 CPU_SLEEP_0: cpu-sleep-0 { 247 compatible = "arm,idle-state"; 248 arm,psci-suspend-param = <0x0010000>; 249 local-timer-stop; 250 entry-latency-us = <400>; 251 exit-latency-us = <500>; 252 min-residency-us = <4000>; 253 }; 254 255 CPU_SLEEP_1: cpu-sleep-1 { 256 compatible = "arm,idle-state"; 257 arm,psci-suspend-param = <0x0010000>; 258 local-timer-stop; 259 entry-latency-us = <700>; 260 exit-latency-us = <700>; 261 min-residency-us = <5000>; 262 }; 263 }; 264 }; 265 266 extal_clk: extal { 267 compatible = "fixed-clock"; 268 #clock-cells = <0>; 269 /* This value must be overridden by the board */ 270 clock-frequency = <0>; 271 }; 272 273 extalr_clk: extalr { 274 compatible = "fixed-clock"; 275 #clock-cells = <0>; 276 /* This value must be overridden by the board */ 277 clock-frequency = <0>; 278 }; 279 280 /* External PCIe clock - can be overridden by the board */ 281 pcie_bus_clk: pcie_bus { 282 compatible = "fixed-clock"; 283 #clock-cells = <0>; 284 clock-frequency = <0>; 285 }; 286 287 pmu_a53 { 288 compatible = "arm,cortex-a53-pmu"; 289 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 290 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 291 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 292 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 293 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; 294 }; 295 296 pmu_a57 { 297 compatible = "arm,cortex-a57-pmu"; 298 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 299 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 300 interrupt-affinity = <&a57_0>, <&a57_1>; 301 }; 302 303 psci { 304 compatible = "arm,psci-1.0", "arm,psci-0.2"; 305 method = "smc"; 306 }; 307 308 /* External SCIF clock - to be overridden by boards that provide it */ 309 scif_clk: scif { 310 compatible = "fixed-clock"; 311 #clock-cells = <0>; 312 clock-frequency = <0>; 313 }; 314 315 soc { 316 compatible = "simple-bus"; 317 interrupt-parent = <&gic>; 318 #address-cells = <2>; 319 #size-cells = <2>; 320 ranges; 321 322 rwdt: watchdog@e6020000 { 323 compatible = "renesas,r8a77961-wdt", 324 "renesas,rcar-gen3-wdt"; 325 reg = <0 0xe6020000 0 0x0c>; 326 clocks = <&cpg CPG_MOD 402>; 327 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 328 resets = <&cpg 402>; 329 status = "disabled"; 330 }; 331 332 gpio0: gpio@e6050000 { 333 compatible = "renesas,gpio-r8a77961", 334 "renesas,rcar-gen3-gpio"; 335 reg = <0 0xe6050000 0 0x50>; 336 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 337 #gpio-cells = <2>; 338 gpio-controller; 339 gpio-ranges = <&pfc 0 0 16>; 340 #interrupt-cells = <2>; 341 interrupt-controller; 342 clocks = <&cpg CPG_MOD 912>; 343 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 344 resets = <&cpg 912>; 345 }; 346 347 gpio1: gpio@e6051000 { 348 compatible = "renesas,gpio-r8a77961", 349 "renesas,rcar-gen3-gpio"; 350 reg = <0 0xe6051000 0 0x50>; 351 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 352 #gpio-cells = <2>; 353 gpio-controller; 354 gpio-ranges = <&pfc 0 32 29>; 355 #interrupt-cells = <2>; 356 interrupt-controller; 357 clocks = <&cpg CPG_MOD 911>; 358 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 359 resets = <&cpg 911>; 360 }; 361 362 gpio2: gpio@e6052000 { 363 compatible = "renesas,gpio-r8a77961", 364 "renesas,rcar-gen3-gpio"; 365 reg = <0 0xe6052000 0 0x50>; 366 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 367 #gpio-cells = <2>; 368 gpio-controller; 369 gpio-ranges = <&pfc 0 64 15>; 370 #interrupt-cells = <2>; 371 interrupt-controller; 372 clocks = <&cpg CPG_MOD 910>; 373 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 374 resets = <&cpg 910>; 375 }; 376 377 gpio3: gpio@e6053000 { 378 compatible = "renesas,gpio-r8a77961", 379 "renesas,rcar-gen3-gpio"; 380 reg = <0 0xe6053000 0 0x50>; 381 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 382 #gpio-cells = <2>; 383 gpio-controller; 384 gpio-ranges = <&pfc 0 96 16>; 385 #interrupt-cells = <2>; 386 interrupt-controller; 387 clocks = <&cpg CPG_MOD 909>; 388 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 389 resets = <&cpg 909>; 390 }; 391 392 gpio4: gpio@e6054000 { 393 compatible = "renesas,gpio-r8a77961", 394 "renesas,rcar-gen3-gpio"; 395 reg = <0 0xe6054000 0 0x50>; 396 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 397 #gpio-cells = <2>; 398 gpio-controller; 399 gpio-ranges = <&pfc 0 128 18>; 400 #interrupt-cells = <2>; 401 interrupt-controller; 402 clocks = <&cpg CPG_MOD 908>; 403 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 404 resets = <&cpg 908>; 405 }; 406 407 gpio5: gpio@e6055000 { 408 compatible = "renesas,gpio-r8a77961", 409 "renesas,rcar-gen3-gpio"; 410 reg = <0 0xe6055000 0 0x50>; 411 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 412 #gpio-cells = <2>; 413 gpio-controller; 414 gpio-ranges = <&pfc 0 160 26>; 415 #interrupt-cells = <2>; 416 interrupt-controller; 417 clocks = <&cpg CPG_MOD 907>; 418 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 419 resets = <&cpg 907>; 420 }; 421 422 gpio6: gpio@e6055400 { 423 compatible = "renesas,gpio-r8a77961", 424 "renesas,rcar-gen3-gpio"; 425 reg = <0 0xe6055400 0 0x50>; 426 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 427 #gpio-cells = <2>; 428 gpio-controller; 429 gpio-ranges = <&pfc 0 192 32>; 430 #interrupt-cells = <2>; 431 interrupt-controller; 432 clocks = <&cpg CPG_MOD 906>; 433 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 434 resets = <&cpg 906>; 435 }; 436 437 gpio7: gpio@e6055800 { 438 compatible = "renesas,gpio-r8a77961", 439 "renesas,rcar-gen3-gpio"; 440 reg = <0 0xe6055800 0 0x50>; 441 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 442 #gpio-cells = <2>; 443 gpio-controller; 444 gpio-ranges = <&pfc 0 224 4>; 445 #interrupt-cells = <2>; 446 interrupt-controller; 447 clocks = <&cpg CPG_MOD 905>; 448 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 449 resets = <&cpg 905>; 450 }; 451 452 pfc: pinctrl@e6060000 { 453 compatible = "renesas,pfc-r8a77961"; 454 reg = <0 0xe6060000 0 0x50c>; 455 }; 456 457 cpg: clock-controller@e6150000 { 458 compatible = "renesas,r8a77961-cpg-mssr"; 459 reg = <0 0xe6150000 0 0x1000>; 460 clocks = <&extal_clk>, <&extalr_clk>; 461 clock-names = "extal", "extalr"; 462 #clock-cells = <2>; 463 #power-domain-cells = <0>; 464 #reset-cells = <1>; 465 }; 466 467 rst: reset-controller@e6160000 { 468 compatible = "renesas,r8a77961-rst"; 469 reg = <0 0xe6160000 0 0x0200>; 470 }; 471 472 sysc: system-controller@e6180000 { 473 compatible = "renesas,r8a77961-sysc"; 474 reg = <0 0xe6180000 0 0x0400>; 475 #power-domain-cells = <1>; 476 }; 477 478 tsc: thermal@e6198000 { 479 compatible = "renesas,r8a77961-thermal"; 480 reg = <0 0xe6198000 0 0x100>, 481 <0 0xe61a0000 0 0x100>, 482 <0 0xe61a8000 0 0x100>; 483 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 484 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 485 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 486 clocks = <&cpg CPG_MOD 522>; 487 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 488 resets = <&cpg 522>; 489 #thermal-sensor-cells = <1>; 490 }; 491 492 intc_ex: interrupt-controller@e61c0000 { 493 #interrupt-cells = <2>; 494 interrupt-controller; 495 reg = <0 0xe61c0000 0 0x200>; 496 /* placeholder */ 497 }; 498 499 i2c0: i2c@e6500000 { 500 #address-cells = <1>; 501 #size-cells = <0>; 502 compatible = "renesas,i2c-r8a77961", 503 "renesas,rcar-gen3-i2c"; 504 reg = <0 0xe6500000 0 0x40>; 505 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 506 clocks = <&cpg CPG_MOD 931>; 507 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 508 resets = <&cpg 931>; 509 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 510 <&dmac2 0x91>, <&dmac2 0x90>; 511 dma-names = "tx", "rx", "tx", "rx"; 512 i2c-scl-internal-delay-ns = <110>; 513 status = "disabled"; 514 }; 515 516 i2c1: i2c@e6508000 { 517 #address-cells = <1>; 518 #size-cells = <0>; 519 compatible = "renesas,i2c-r8a77961", 520 "renesas,rcar-gen3-i2c"; 521 reg = <0 0xe6508000 0 0x40>; 522 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 523 clocks = <&cpg CPG_MOD 930>; 524 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 525 resets = <&cpg 930>; 526 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 527 <&dmac2 0x93>, <&dmac2 0x92>; 528 dma-names = "tx", "rx", "tx", "rx"; 529 i2c-scl-internal-delay-ns = <6>; 530 status = "disabled"; 531 }; 532 533 i2c2: i2c@e6510000 { 534 #address-cells = <1>; 535 #size-cells = <0>; 536 compatible = "renesas,i2c-r8a77961", 537 "renesas,rcar-gen3-i2c"; 538 reg = <0 0xe6510000 0 0x40>; 539 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 540 clocks = <&cpg CPG_MOD 929>; 541 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 542 resets = <&cpg 929>; 543 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 544 <&dmac2 0x95>, <&dmac2 0x94>; 545 dma-names = "tx", "rx", "tx", "rx"; 546 i2c-scl-internal-delay-ns = <6>; 547 status = "disabled"; 548 }; 549 550 i2c3: i2c@e66d0000 { 551 #address-cells = <1>; 552 #size-cells = <0>; 553 compatible = "renesas,i2c-r8a77961", 554 "renesas,rcar-gen3-i2c"; 555 reg = <0 0xe66d0000 0 0x40>; 556 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 557 clocks = <&cpg CPG_MOD 928>; 558 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 559 resets = <&cpg 928>; 560 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 561 dma-names = "tx", "rx"; 562 i2c-scl-internal-delay-ns = <110>; 563 status = "disabled"; 564 }; 565 566 i2c4: i2c@e66d8000 { 567 #address-cells = <1>; 568 #size-cells = <0>; 569 compatible = "renesas,i2c-r8a77961", 570 "renesas,rcar-gen3-i2c"; 571 reg = <0 0xe66d8000 0 0x40>; 572 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 573 clocks = <&cpg CPG_MOD 927>; 574 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 575 resets = <&cpg 927>; 576 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 577 dma-names = "tx", "rx"; 578 i2c-scl-internal-delay-ns = <110>; 579 status = "disabled"; 580 }; 581 582 i2c5: i2c@e66e0000 { 583 #address-cells = <1>; 584 #size-cells = <0>; 585 compatible = "renesas,i2c-r8a77961", 586 "renesas,rcar-gen3-i2c"; 587 reg = <0 0xe66e0000 0 0x40>; 588 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 589 clocks = <&cpg CPG_MOD 919>; 590 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 591 resets = <&cpg 919>; 592 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 593 dma-names = "tx", "rx"; 594 i2c-scl-internal-delay-ns = <110>; 595 status = "disabled"; 596 }; 597 598 i2c6: i2c@e66e8000 { 599 #address-cells = <1>; 600 #size-cells = <0>; 601 compatible = "renesas,i2c-r8a77961", 602 "renesas,rcar-gen3-i2c"; 603 reg = <0 0xe66e8000 0 0x40>; 604 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 605 clocks = <&cpg CPG_MOD 918>; 606 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 607 resets = <&cpg 918>; 608 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 609 dma-names = "tx", "rx"; 610 i2c-scl-internal-delay-ns = <6>; 611 status = "disabled"; 612 }; 613 614 i2c_dvfs: i2c@e60b0000 { 615 #address-cells = <1>; 616 #size-cells = <0>; 617 compatible = "renesas,iic-r8a77961", 618 "renesas,rcar-gen3-iic", 619 "renesas,rmobile-iic"; 620 reg = <0 0xe60b0000 0 0x425>; 621 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 622 clocks = <&cpg CPG_MOD 926>; 623 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 624 resets = <&cpg 926>; 625 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 626 dma-names = "tx", "rx"; 627 status = "disabled"; 628 }; 629 630 hscif0: serial@e6540000 { 631 compatible = "renesas,hscif-r8a77961", 632 "renesas,rcar-gen3-hscif", 633 "renesas,hscif"; 634 reg = <0 0xe6540000 0 0x60>; 635 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 636 clocks = <&cpg CPG_MOD 520>, 637 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 638 <&scif_clk>; 639 clock-names = "fck", "brg_int", "scif_clk"; 640 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 641 <&dmac2 0x31>, <&dmac2 0x30>; 642 dma-names = "tx", "rx", "tx", "rx"; 643 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 644 resets = <&cpg 520>; 645 status = "disabled"; 646 }; 647 648 hscif1: serial@e6550000 { 649 compatible = "renesas,hscif-r8a77961", 650 "renesas,rcar-gen3-hscif", 651 "renesas,hscif"; 652 reg = <0 0xe6550000 0 0x60>; 653 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 654 clocks = <&cpg CPG_MOD 519>, 655 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 656 <&scif_clk>; 657 clock-names = "fck", "brg_int", "scif_clk"; 658 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 659 <&dmac2 0x33>, <&dmac2 0x32>; 660 dma-names = "tx", "rx", "tx", "rx"; 661 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 662 resets = <&cpg 519>; 663 status = "disabled"; 664 }; 665 666 hscif2: serial@e6560000 { 667 compatible = "renesas,hscif-r8a77961", 668 "renesas,rcar-gen3-hscif", 669 "renesas,hscif"; 670 reg = <0 0xe6560000 0 0x60>; 671 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 672 clocks = <&cpg CPG_MOD 518>, 673 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 674 <&scif_clk>; 675 clock-names = "fck", "brg_int", "scif_clk"; 676 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 677 <&dmac2 0x35>, <&dmac2 0x34>; 678 dma-names = "tx", "rx", "tx", "rx"; 679 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 680 resets = <&cpg 518>; 681 status = "disabled"; 682 }; 683 684 hscif3: serial@e66a0000 { 685 compatible = "renesas,hscif-r8a77961", 686 "renesas,rcar-gen3-hscif", 687 "renesas,hscif"; 688 reg = <0 0xe66a0000 0 0x60>; 689 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 690 clocks = <&cpg CPG_MOD 517>, 691 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 692 <&scif_clk>; 693 clock-names = "fck", "brg_int", "scif_clk"; 694 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 695 dma-names = "tx", "rx"; 696 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 697 resets = <&cpg 517>; 698 status = "disabled"; 699 }; 700 701 hscif4: serial@e66b0000 { 702 compatible = "renesas,hscif-r8a77961", 703 "renesas,rcar-gen3-hscif", 704 "renesas,hscif"; 705 reg = <0 0xe66b0000 0 0x60>; 706 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 707 clocks = <&cpg CPG_MOD 516>, 708 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 709 <&scif_clk>; 710 clock-names = "fck", "brg_int", "scif_clk"; 711 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 712 dma-names = "tx", "rx"; 713 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 714 resets = <&cpg 516>; 715 status = "disabled"; 716 }; 717 718 hsusb: usb@e6590000 { 719 compatible = "renesas,usbhs-r8a77961", 720 "renesas,rcar-gen3-usbhs"; 721 reg = <0 0xe6590000 0 0x200>; 722 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 723 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 724 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 725 <&usb_dmac1 0>, <&usb_dmac1 1>; 726 dma-names = "ch0", "ch1", "ch2", "ch3"; 727 renesas,buswait = <11>; 728 phys = <&usb2_phy0 3>; 729 phy-names = "usb"; 730 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 731 resets = <&cpg 704>, <&cpg 703>; 732 status = "disabled"; 733 }; 734 735 usb_dmac0: dma-controller@e65a0000 { 736 compatible = "renesas,r8a77961-usb-dmac", 737 "renesas,usb-dmac"; 738 reg = <0 0xe65a0000 0 0x100>; 739 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 740 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 741 interrupt-names = "ch0", "ch1"; 742 clocks = <&cpg CPG_MOD 330>; 743 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 744 resets = <&cpg 330>; 745 #dma-cells = <1>; 746 dma-channels = <2>; 747 }; 748 749 usb_dmac1: dma-controller@e65b0000 { 750 compatible = "renesas,r8a77961-usb-dmac", 751 "renesas,usb-dmac"; 752 reg = <0 0xe65b0000 0 0x100>; 753 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 754 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 755 interrupt-names = "ch0", "ch1"; 756 clocks = <&cpg CPG_MOD 331>; 757 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 758 resets = <&cpg 331>; 759 #dma-cells = <1>; 760 dma-channels = <2>; 761 }; 762 763 usb3_phy0: usb-phy@e65ee000 { 764 compatible = "renesas,r8a77961-usb3-phy", 765 "renesas,rcar-gen3-usb3-phy"; 766 reg = <0 0xe65ee000 0 0x90>; 767 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 768 <&usb_extal_clk>; 769 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 770 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 771 resets = <&cpg 328>; 772 #phy-cells = <0>; 773 status = "disabled"; 774 }; 775 776 arm_cc630p: crypto@e6601000 { 777 compatible = "arm,cryptocell-630p-ree"; 778 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 779 reg = <0x0 0xe6601000 0 0x1000>; 780 clocks = <&cpg CPG_MOD 229>; 781 resets = <&cpg 229>; 782 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 783 }; 784 785 dmac0: dma-controller@e6700000 { 786 compatible = "renesas,dmac-r8a77961", 787 "renesas,rcar-dmac"; 788 reg = <0 0xe6700000 0 0x10000>; 789 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 790 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 791 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 792 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 793 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 794 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 795 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 796 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 797 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 798 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 799 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 800 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 801 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 802 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 803 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 804 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 805 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 806 interrupt-names = "error", 807 "ch0", "ch1", "ch2", "ch3", 808 "ch4", "ch5", "ch6", "ch7", 809 "ch8", "ch9", "ch10", "ch11", 810 "ch12", "ch13", "ch14", "ch15"; 811 clocks = <&cpg CPG_MOD 219>; 812 clock-names = "fck"; 813 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 814 resets = <&cpg 219>; 815 #dma-cells = <1>; 816 dma-channels = <16>; 817 }; 818 819 dmac1: dma-controller@e7300000 { 820 compatible = "renesas,dmac-r8a77961", 821 "renesas,rcar-dmac"; 822 reg = <0 0xe7300000 0 0x10000>; 823 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 832 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 833 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 834 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 835 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 836 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 837 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 838 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 839 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 840 interrupt-names = "error", 841 "ch0", "ch1", "ch2", "ch3", 842 "ch4", "ch5", "ch6", "ch7", 843 "ch8", "ch9", "ch10", "ch11", 844 "ch12", "ch13", "ch14", "ch15"; 845 clocks = <&cpg CPG_MOD 218>; 846 clock-names = "fck"; 847 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 848 resets = <&cpg 218>; 849 #dma-cells = <1>; 850 dma-channels = <16>; 851 }; 852 853 dmac2: dma-controller@e7310000 { 854 compatible = "renesas,dmac-r8a77961", 855 "renesas,rcar-dmac"; 856 reg = <0 0xe7310000 0 0x10000>; 857 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 874 interrupt-names = "error", 875 "ch0", "ch1", "ch2", "ch3", 876 "ch4", "ch5", "ch6", "ch7", 877 "ch8", "ch9", "ch10", "ch11", 878 "ch12", "ch13", "ch14", "ch15"; 879 clocks = <&cpg CPG_MOD 217>; 880 clock-names = "fck"; 881 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 882 resets = <&cpg 217>; 883 #dma-cells = <1>; 884 dma-channels = <16>; 885 }; 886 887 ipmmu_ds0: iommu@e6740000 { 888 compatible = "renesas,ipmmu-r8a77961"; 889 reg = <0 0xe6740000 0 0x1000>; 890 renesas,ipmmu-main = <&ipmmu_mm 0>; 891 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 892 #iommu-cells = <1>; 893 }; 894 895 ipmmu_ds1: iommu@e7740000 { 896 compatible = "renesas,ipmmu-r8a77961"; 897 reg = <0 0xe7740000 0 0x1000>; 898 renesas,ipmmu-main = <&ipmmu_mm 1>; 899 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 900 #iommu-cells = <1>; 901 }; 902 903 ipmmu_hc: iommu@e6570000 { 904 compatible = "renesas,ipmmu-r8a77961"; 905 reg = <0 0xe6570000 0 0x1000>; 906 renesas,ipmmu-main = <&ipmmu_mm 2>; 907 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 908 #iommu-cells = <1>; 909 }; 910 911 ipmmu_ir: iommu@ff8b0000 { 912 compatible = "renesas,ipmmu-r8a77961"; 913 reg = <0 0xff8b0000 0 0x1000>; 914 renesas,ipmmu-main = <&ipmmu_mm 3>; 915 power-domains = <&sysc R8A77961_PD_A3IR>; 916 #iommu-cells = <1>; 917 }; 918 919 ipmmu_mm: iommu@e67b0000 { 920 compatible = "renesas,ipmmu-r8a77961"; 921 reg = <0 0xe67b0000 0 0x1000>; 922 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 923 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 924 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 925 #iommu-cells = <1>; 926 }; 927 928 ipmmu_mp: iommu@ec670000 { 929 compatible = "renesas,ipmmu-r8a77961"; 930 reg = <0 0xec670000 0 0x1000>; 931 renesas,ipmmu-main = <&ipmmu_mm 4>; 932 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 933 #iommu-cells = <1>; 934 }; 935 936 ipmmu_pv0: iommu@fd800000 { 937 compatible = "renesas,ipmmu-r8a77961"; 938 reg = <0 0xfd800000 0 0x1000>; 939 renesas,ipmmu-main = <&ipmmu_mm 5>; 940 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 941 #iommu-cells = <1>; 942 }; 943 944 ipmmu_pv1: iommu@fd950000 { 945 compatible = "renesas,ipmmu-r8a77961"; 946 reg = <0 0xfd950000 0 0x1000>; 947 renesas,ipmmu-main = <&ipmmu_mm 6>; 948 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 949 #iommu-cells = <1>; 950 }; 951 952 ipmmu_rt: iommu@ffc80000 { 953 compatible = "renesas,ipmmu-r8a77961"; 954 reg = <0 0xffc80000 0 0x1000>; 955 renesas,ipmmu-main = <&ipmmu_mm 7>; 956 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 957 #iommu-cells = <1>; 958 }; 959 960 ipmmu_vc0: iommu@fe6b0000 { 961 compatible = "renesas,ipmmu-r8a77961"; 962 reg = <0 0xfe6b0000 0 0x1000>; 963 renesas,ipmmu-main = <&ipmmu_mm 8>; 964 power-domains = <&sysc R8A77961_PD_A3VC>; 965 #iommu-cells = <1>; 966 }; 967 968 ipmmu_vi0: iommu@febd0000 { 969 compatible = "renesas,ipmmu-r8a77961"; 970 reg = <0 0xfebd0000 0 0x1000>; 971 renesas,ipmmu-main = <&ipmmu_mm 9>; 972 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 973 #iommu-cells = <1>; 974 }; 975 976 avb: ethernet@e6800000 { 977 compatible = "renesas,etheravb-r8a77961", 978 "renesas,etheravb-rcar-gen3"; 979 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 980 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 981 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 982 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 983 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 984 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 985 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 986 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 987 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 996 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 997 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 998 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 999 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1000 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1001 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1002 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1003 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1004 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1005 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1006 "ch4", "ch5", "ch6", "ch7", 1007 "ch8", "ch9", "ch10", "ch11", 1008 "ch12", "ch13", "ch14", "ch15", 1009 "ch16", "ch17", "ch18", "ch19", 1010 "ch20", "ch21", "ch22", "ch23", 1011 "ch24"; 1012 clocks = <&cpg CPG_MOD 812>; 1013 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1014 resets = <&cpg 812>; 1015 phy-mode = "rgmii"; 1016 #address-cells = <1>; 1017 #size-cells = <0>; 1018 status = "disabled"; 1019 }; 1020 1021 pwm0: pwm@e6e30000 { 1022 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1023 reg = <0 0xe6e30000 0 8>; 1024 #pwm-cells = <2>; 1025 clocks = <&cpg CPG_MOD 523>; 1026 resets = <&cpg 523>; 1027 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1028 status = "disabled"; 1029 }; 1030 1031 pwm1: pwm@e6e31000 { 1032 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1033 reg = <0 0xe6e31000 0 8>; 1034 #pwm-cells = <2>; 1035 clocks = <&cpg CPG_MOD 523>; 1036 resets = <&cpg 523>; 1037 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1038 status = "disabled"; 1039 }; 1040 1041 pwm2: pwm@e6e32000 { 1042 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1043 reg = <0 0xe6e32000 0 8>; 1044 #pwm-cells = <2>; 1045 clocks = <&cpg CPG_MOD 523>; 1046 resets = <&cpg 523>; 1047 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1048 status = "disabled"; 1049 }; 1050 1051 pwm3: pwm@e6e33000 { 1052 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1053 reg = <0 0xe6e33000 0 8>; 1054 #pwm-cells = <2>; 1055 clocks = <&cpg CPG_MOD 523>; 1056 resets = <&cpg 523>; 1057 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1058 status = "disabled"; 1059 }; 1060 1061 pwm4: pwm@e6e34000 { 1062 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1063 reg = <0 0xe6e34000 0 8>; 1064 #pwm-cells = <2>; 1065 clocks = <&cpg CPG_MOD 523>; 1066 resets = <&cpg 523>; 1067 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1068 status = "disabled"; 1069 }; 1070 1071 pwm5: pwm@e6e35000 { 1072 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1073 reg = <0 0xe6e35000 0 8>; 1074 #pwm-cells = <2>; 1075 clocks = <&cpg CPG_MOD 523>; 1076 resets = <&cpg 523>; 1077 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1078 status = "disabled"; 1079 }; 1080 1081 pwm6: pwm@e6e36000 { 1082 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1083 reg = <0 0xe6e36000 0 8>; 1084 #pwm-cells = <2>; 1085 clocks = <&cpg CPG_MOD 523>; 1086 resets = <&cpg 523>; 1087 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1088 status = "disabled"; 1089 }; 1090 1091 scif0: serial@e6e60000 { 1092 compatible = "renesas,scif-r8a77961", 1093 "renesas,rcar-gen3-scif", "renesas,scif"; 1094 reg = <0 0xe6e60000 0 64>; 1095 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1096 clocks = <&cpg CPG_MOD 207>, 1097 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1098 <&scif_clk>; 1099 clock-names = "fck", "brg_int", "scif_clk"; 1100 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1101 <&dmac2 0x51>, <&dmac2 0x50>; 1102 dma-names = "tx", "rx", "tx", "rx"; 1103 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1104 resets = <&cpg 207>; 1105 status = "disabled"; 1106 }; 1107 1108 scif1: serial@e6e68000 { 1109 compatible = "renesas,scif-r8a77961", 1110 "renesas,rcar-gen3-scif", "renesas,scif"; 1111 reg = <0 0xe6e68000 0 64>; 1112 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1113 clocks = <&cpg CPG_MOD 206>, 1114 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1115 <&scif_clk>; 1116 clock-names = "fck", "brg_int", "scif_clk"; 1117 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1118 <&dmac2 0x53>, <&dmac2 0x52>; 1119 dma-names = "tx", "rx", "tx", "rx"; 1120 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1121 resets = <&cpg 206>; 1122 status = "disabled"; 1123 }; 1124 1125 scif2: serial@e6e88000 { 1126 compatible = "renesas,scif-r8a77961", 1127 "renesas,rcar-gen3-scif", "renesas,scif"; 1128 reg = <0 0xe6e88000 0 64>; 1129 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1130 clocks = <&cpg CPG_MOD 310>, 1131 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1132 <&scif_clk>; 1133 clock-names = "fck", "brg_int", "scif_clk"; 1134 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1135 <&dmac2 0x13>, <&dmac2 0x12>; 1136 dma-names = "tx", "rx", "tx", "rx"; 1137 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1138 resets = <&cpg 310>; 1139 status = "disabled"; 1140 }; 1141 1142 scif3: serial@e6c50000 { 1143 compatible = "renesas,scif-r8a77961", 1144 "renesas,rcar-gen3-scif", "renesas,scif"; 1145 reg = <0 0xe6c50000 0 64>; 1146 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1147 clocks = <&cpg CPG_MOD 204>, 1148 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1149 <&scif_clk>; 1150 clock-names = "fck", "brg_int", "scif_clk"; 1151 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1152 dma-names = "tx", "rx"; 1153 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1154 resets = <&cpg 204>; 1155 status = "disabled"; 1156 }; 1157 1158 scif4: serial@e6c40000 { 1159 compatible = "renesas,scif-r8a77961", 1160 "renesas,rcar-gen3-scif", "renesas,scif"; 1161 reg = <0 0xe6c40000 0 64>; 1162 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1163 clocks = <&cpg CPG_MOD 203>, 1164 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1165 <&scif_clk>; 1166 clock-names = "fck", "brg_int", "scif_clk"; 1167 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1168 dma-names = "tx", "rx"; 1169 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1170 resets = <&cpg 203>; 1171 status = "disabled"; 1172 }; 1173 1174 scif5: serial@e6f30000 { 1175 compatible = "renesas,scif-r8a77961", 1176 "renesas,rcar-gen3-scif", "renesas,scif"; 1177 reg = <0 0xe6f30000 0 64>; 1178 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1179 clocks = <&cpg CPG_MOD 202>, 1180 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1181 <&scif_clk>; 1182 clock-names = "fck", "brg_int", "scif_clk"; 1183 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1184 <&dmac2 0x5b>, <&dmac2 0x5a>; 1185 dma-names = "tx", "rx", "tx", "rx"; 1186 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1187 resets = <&cpg 202>; 1188 status = "disabled"; 1189 }; 1190 1191 vin0: video@e6ef0000 { 1192 reg = <0 0xe6ef0000 0 0x1000>; 1193 /* placeholder */ 1194 }; 1195 1196 vin1: video@e6ef1000 { 1197 reg = <0 0xe6ef1000 0 0x1000>; 1198 /* placeholder */ 1199 }; 1200 1201 vin2: video@e6ef2000 { 1202 reg = <0 0xe6ef2000 0 0x1000>; 1203 /* placeholder */ 1204 }; 1205 1206 vin3: video@e6ef3000 { 1207 reg = <0 0xe6ef3000 0 0x1000>; 1208 /* placeholder */ 1209 }; 1210 1211 vin4: video@e6ef4000 { 1212 reg = <0 0xe6ef4000 0 0x1000>; 1213 /* placeholder */ 1214 }; 1215 1216 vin5: video@e6ef5000 { 1217 reg = <0 0xe6ef5000 0 0x1000>; 1218 /* placeholder */ 1219 }; 1220 1221 vin6: video@e6ef6000 { 1222 reg = <0 0xe6ef6000 0 0x1000>; 1223 /* placeholder */ 1224 }; 1225 1226 vin7: video@e6ef7000 { 1227 reg = <0 0xe6ef7000 0 0x1000>; 1228 /* placeholder */ 1229 }; 1230 1231 rcar_sound: sound@ec500000 { 1232 /* 1233 * #sound-dai-cells is required 1234 * 1235 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1236 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1237 */ 1238 /* 1239 * #clock-cells is required for audio_clkout0/1/2/3 1240 * 1241 * clkout : #clock-cells = <0>; <&rcar_sound>; 1242 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1243 */ 1244 compatible = "renesas,rcar_sound-r8a77961", "renesas,rcar_sound-gen3"; 1245 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1246 <0 0xec5a0000 0 0x100>, /* ADG */ 1247 <0 0xec540000 0 0x1000>, /* SSIU */ 1248 <0 0xec541000 0 0x280>, /* SSI */ 1249 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1250 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1251 1252 clocks = <&cpg CPG_MOD 1005>, 1253 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1254 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1255 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1256 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1257 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1258 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1259 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1260 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1261 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1262 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1263 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1264 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1265 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1266 <&audio_clk_a>, <&audio_clk_b>, 1267 <&audio_clk_c>, 1268 <&cpg CPG_CORE R8A77961_CLK_S0D4>; 1269 clock-names = "ssi-all", 1270 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1271 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1272 "ssi.1", "ssi.0", 1273 "src.9", "src.8", "src.7", "src.6", 1274 "src.5", "src.4", "src.3", "src.2", 1275 "src.1", "src.0", 1276 "mix.1", "mix.0", 1277 "ctu.1", "ctu.0", 1278 "dvc.0", "dvc.1", 1279 "clk_a", "clk_b", "clk_c", "clk_i"; 1280 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1281 resets = <&cpg 1005>, 1282 <&cpg 1006>, <&cpg 1007>, 1283 <&cpg 1008>, <&cpg 1009>, 1284 <&cpg 1010>, <&cpg 1011>, 1285 <&cpg 1012>, <&cpg 1013>, 1286 <&cpg 1014>, <&cpg 1015>; 1287 reset-names = "ssi-all", 1288 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1289 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1290 "ssi.1", "ssi.0"; 1291 status = "disabled"; 1292 1293 rcar_sound,ctu { 1294 ctu00: ctu-0 { }; 1295 ctu01: ctu-1 { }; 1296 ctu02: ctu-2 { }; 1297 ctu03: ctu-3 { }; 1298 ctu10: ctu-4 { }; 1299 ctu11: ctu-5 { }; 1300 ctu12: ctu-6 { }; 1301 ctu13: ctu-7 { }; 1302 }; 1303 1304 rcar_sound,dvc { 1305 dvc0: dvc-0 { 1306 dmas = <&audma1 0xbc>; 1307 dma-names = "tx"; 1308 }; 1309 dvc1: dvc-1 { 1310 dmas = <&audma1 0xbe>; 1311 dma-names = "tx"; 1312 }; 1313 }; 1314 1315 rcar_sound,mix { 1316 mix0: mix-0 { }; 1317 mix1: mix-1 { }; 1318 }; 1319 1320 rcar_sound,src { 1321 src0: src-0 { 1322 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1323 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1324 dma-names = "rx", "tx"; 1325 }; 1326 src1: src-1 { 1327 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1328 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1329 dma-names = "rx", "tx"; 1330 }; 1331 src2: src-2 { 1332 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1333 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1334 dma-names = "rx", "tx"; 1335 }; 1336 src3: src-3 { 1337 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1338 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1339 dma-names = "rx", "tx"; 1340 }; 1341 src4: src-4 { 1342 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1343 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1344 dma-names = "rx", "tx"; 1345 }; 1346 src5: src-5 { 1347 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1348 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1349 dma-names = "rx", "tx"; 1350 }; 1351 src6: src-6 { 1352 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1353 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1354 dma-names = "rx", "tx"; 1355 }; 1356 src7: src-7 { 1357 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1358 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1359 dma-names = "rx", "tx"; 1360 }; 1361 src8: src-8 { 1362 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1363 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1364 dma-names = "rx", "tx"; 1365 }; 1366 src9: src-9 { 1367 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1368 dmas = <&audma0 0x97>, <&audma1 0xba>; 1369 dma-names = "rx", "tx"; 1370 }; 1371 }; 1372 1373 rcar_sound,ssi { 1374 ssi0: ssi-0 { 1375 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1376 dmas = <&audma0 0x01>, <&audma1 0x02>; 1377 dma-names = "rx", "tx"; 1378 }; 1379 ssi1: ssi-1 { 1380 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1381 dmas = <&audma0 0x03>, <&audma1 0x04>; 1382 dma-names = "rx", "tx"; 1383 }; 1384 ssi2: ssi-2 { 1385 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1386 dmas = <&audma0 0x05>, <&audma1 0x06>; 1387 dma-names = "rx", "tx"; 1388 }; 1389 ssi3: ssi-3 { 1390 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1391 dmas = <&audma0 0x07>, <&audma1 0x08>; 1392 dma-names = "rx", "tx"; 1393 }; 1394 ssi4: ssi-4 { 1395 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1396 dmas = <&audma0 0x09>, <&audma1 0x0a>; 1397 dma-names = "rx", "tx"; 1398 }; 1399 ssi5: ssi-5 { 1400 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1401 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 1402 dma-names = "rx", "tx"; 1403 }; 1404 ssi6: ssi-6 { 1405 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1406 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 1407 dma-names = "rx", "tx"; 1408 }; 1409 ssi7: ssi-7 { 1410 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1411 dmas = <&audma0 0x0f>, <&audma1 0x10>; 1412 dma-names = "rx", "tx"; 1413 }; 1414 ssi8: ssi-8 { 1415 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1416 dmas = <&audma0 0x11>, <&audma1 0x12>; 1417 dma-names = "rx", "tx"; 1418 }; 1419 ssi9: ssi-9 { 1420 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1421 dmas = <&audma0 0x13>, <&audma1 0x14>; 1422 dma-names = "rx", "tx"; 1423 }; 1424 }; 1425 1426 rcar_sound,ssiu { 1427 ssiu00: ssiu-0 { 1428 dmas = <&audma0 0x15>, <&audma1 0x16>; 1429 dma-names = "rx", "tx"; 1430 }; 1431 ssiu01: ssiu-1 { 1432 dmas = <&audma0 0x35>, <&audma1 0x36>; 1433 dma-names = "rx", "tx"; 1434 }; 1435 ssiu02: ssiu-2 { 1436 dmas = <&audma0 0x37>, <&audma1 0x38>; 1437 dma-names = "rx", "tx"; 1438 }; 1439 ssiu03: ssiu-3 { 1440 dmas = <&audma0 0x47>, <&audma1 0x48>; 1441 dma-names = "rx", "tx"; 1442 }; 1443 ssiu04: ssiu-4 { 1444 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1445 dma-names = "rx", "tx"; 1446 }; 1447 ssiu05: ssiu-5 { 1448 dmas = <&audma0 0x43>, <&audma1 0x44>; 1449 dma-names = "rx", "tx"; 1450 }; 1451 ssiu06: ssiu-6 { 1452 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1453 dma-names = "rx", "tx"; 1454 }; 1455 ssiu07: ssiu-7 { 1456 dmas = <&audma0 0x53>, <&audma1 0x54>; 1457 dma-names = "rx", "tx"; 1458 }; 1459 ssiu10: ssiu-8 { 1460 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1461 dma-names = "rx", "tx"; 1462 }; 1463 ssiu11: ssiu-9 { 1464 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1465 dma-names = "rx", "tx"; 1466 }; 1467 ssiu12: ssiu-10 { 1468 dmas = <&audma0 0x57>, <&audma1 0x58>; 1469 dma-names = "rx", "tx"; 1470 }; 1471 ssiu13: ssiu-11 { 1472 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1473 dma-names = "rx", "tx"; 1474 }; 1475 ssiu14: ssiu-12 { 1476 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1477 dma-names = "rx", "tx"; 1478 }; 1479 ssiu15: ssiu-13 { 1480 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1481 dma-names = "rx", "tx"; 1482 }; 1483 ssiu16: ssiu-14 { 1484 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1485 dma-names = "rx", "tx"; 1486 }; 1487 ssiu17: ssiu-15 { 1488 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1489 dma-names = "rx", "tx"; 1490 }; 1491 ssiu20: ssiu-16 { 1492 dmas = <&audma0 0x63>, <&audma1 0x64>; 1493 dma-names = "rx", "tx"; 1494 }; 1495 ssiu21: ssiu-17 { 1496 dmas = <&audma0 0x67>, <&audma1 0x68>; 1497 dma-names = "rx", "tx"; 1498 }; 1499 ssiu22: ssiu-18 { 1500 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1501 dma-names = "rx", "tx"; 1502 }; 1503 ssiu23: ssiu-19 { 1504 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1505 dma-names = "rx", "tx"; 1506 }; 1507 ssiu24: ssiu-20 { 1508 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1509 dma-names = "rx", "tx"; 1510 }; 1511 ssiu25: ssiu-21 { 1512 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1513 dma-names = "rx", "tx"; 1514 }; 1515 ssiu26: ssiu-22 { 1516 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1517 dma-names = "rx", "tx"; 1518 }; 1519 ssiu27: ssiu-23 { 1520 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1521 dma-names = "rx", "tx"; 1522 }; 1523 ssiu30: ssiu-24 { 1524 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1525 dma-names = "rx", "tx"; 1526 }; 1527 ssiu31: ssiu-25 { 1528 dmas = <&audma0 0x21>, <&audma1 0x22>; 1529 dma-names = "rx", "tx"; 1530 }; 1531 ssiu32: ssiu-26 { 1532 dmas = <&audma0 0x23>, <&audma1 0x24>; 1533 dma-names = "rx", "tx"; 1534 }; 1535 ssiu33: ssiu-27 { 1536 dmas = <&audma0 0x25>, <&audma1 0x26>; 1537 dma-names = "rx", "tx"; 1538 }; 1539 ssiu34: ssiu-28 { 1540 dmas = <&audma0 0x27>, <&audma1 0x28>; 1541 dma-names = "rx", "tx"; 1542 }; 1543 ssiu35: ssiu-29 { 1544 dmas = <&audma0 0x29>, <&audma1 0x2A>; 1545 dma-names = "rx", "tx"; 1546 }; 1547 ssiu36: ssiu-30 { 1548 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 1549 dma-names = "rx", "tx"; 1550 }; 1551 ssiu37: ssiu-31 { 1552 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 1553 dma-names = "rx", "tx"; 1554 }; 1555 ssiu40: ssiu-32 { 1556 dmas = <&audma0 0x71>, <&audma1 0x72>; 1557 dma-names = "rx", "tx"; 1558 }; 1559 ssiu41: ssiu-33 { 1560 dmas = <&audma0 0x17>, <&audma1 0x18>; 1561 dma-names = "rx", "tx"; 1562 }; 1563 ssiu42: ssiu-34 { 1564 dmas = <&audma0 0x19>, <&audma1 0x1A>; 1565 dma-names = "rx", "tx"; 1566 }; 1567 ssiu43: ssiu-35 { 1568 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 1569 dma-names = "rx", "tx"; 1570 }; 1571 ssiu44: ssiu-36 { 1572 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 1573 dma-names = "rx", "tx"; 1574 }; 1575 ssiu45: ssiu-37 { 1576 dmas = <&audma0 0x1F>, <&audma1 0x20>; 1577 dma-names = "rx", "tx"; 1578 }; 1579 ssiu46: ssiu-38 { 1580 dmas = <&audma0 0x31>, <&audma1 0x32>; 1581 dma-names = "rx", "tx"; 1582 }; 1583 ssiu47: ssiu-39 { 1584 dmas = <&audma0 0x33>, <&audma1 0x34>; 1585 dma-names = "rx", "tx"; 1586 }; 1587 ssiu50: ssiu-40 { 1588 dmas = <&audma0 0x73>, <&audma1 0x74>; 1589 dma-names = "rx", "tx"; 1590 }; 1591 ssiu60: ssiu-41 { 1592 dmas = <&audma0 0x75>, <&audma1 0x76>; 1593 dma-names = "rx", "tx"; 1594 }; 1595 ssiu70: ssiu-42 { 1596 dmas = <&audma0 0x79>, <&audma1 0x7a>; 1597 dma-names = "rx", "tx"; 1598 }; 1599 ssiu80: ssiu-43 { 1600 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 1601 dma-names = "rx", "tx"; 1602 }; 1603 ssiu90: ssiu-44 { 1604 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 1605 dma-names = "rx", "tx"; 1606 }; 1607 ssiu91: ssiu-45 { 1608 dmas = <&audma0 0x7F>, <&audma1 0x80>; 1609 dma-names = "rx", "tx"; 1610 }; 1611 ssiu92: ssiu-46 { 1612 dmas = <&audma0 0x81>, <&audma1 0x82>; 1613 dma-names = "rx", "tx"; 1614 }; 1615 ssiu93: ssiu-47 { 1616 dmas = <&audma0 0x83>, <&audma1 0x84>; 1617 dma-names = "rx", "tx"; 1618 }; 1619 ssiu94: ssiu-48 { 1620 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 1621 dma-names = "rx", "tx"; 1622 }; 1623 ssiu95: ssiu-49 { 1624 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 1625 dma-names = "rx", "tx"; 1626 }; 1627 ssiu96: ssiu-50 { 1628 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 1629 dma-names = "rx", "tx"; 1630 }; 1631 ssiu97: ssiu-51 { 1632 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 1633 dma-names = "rx", "tx"; 1634 }; 1635 }; 1636 }; 1637 1638 audma0: dma-controller@ec700000 { 1639 compatible = "renesas,dmac-r8a77961", 1640 "renesas,rcar-dmac"; 1641 reg = <0 0xec700000 0 0x10000>; 1642 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1643 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1644 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1645 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1646 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1647 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1648 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1649 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1650 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1651 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1652 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1653 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1654 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1655 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1656 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1657 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1658 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1659 interrupt-names = "error", 1660 "ch0", "ch1", "ch2", "ch3", 1661 "ch4", "ch5", "ch6", "ch7", 1662 "ch8", "ch9", "ch10", "ch11", 1663 "ch12", "ch13", "ch14", "ch15"; 1664 clocks = <&cpg CPG_MOD 502>; 1665 clock-names = "fck"; 1666 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1667 resets = <&cpg 502>; 1668 #dma-cells = <1>; 1669 dma-channels = <16>; 1670 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1671 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1672 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1673 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1674 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1675 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1676 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1677 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1678 }; 1679 1680 audma1: dma-controller@ec720000 { 1681 compatible = "renesas,dmac-r8a77961", 1682 "renesas,rcar-dmac"; 1683 reg = <0 0xec720000 0 0x10000>; 1684 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 1685 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 1686 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 1687 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 1688 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 1689 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 1690 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 1691 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 1692 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 1693 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 1694 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 1695 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1696 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 1697 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 1698 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 1699 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 1700 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 1701 interrupt-names = "error", 1702 "ch0", "ch1", "ch2", "ch3", 1703 "ch4", "ch5", "ch6", "ch7", 1704 "ch8", "ch9", "ch10", "ch11", 1705 "ch12", "ch13", "ch14", "ch15"; 1706 clocks = <&cpg CPG_MOD 501>; 1707 clock-names = "fck"; 1708 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1709 resets = <&cpg 501>; 1710 #dma-cells = <1>; 1711 dma-channels = <16>; 1712 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, 1713 <&ipmmu_mp 18>, <&ipmmu_mp 19>, 1714 <&ipmmu_mp 20>, <&ipmmu_mp 21>, 1715 <&ipmmu_mp 22>, <&ipmmu_mp 23>, 1716 <&ipmmu_mp 24>, <&ipmmu_mp 25>, 1717 <&ipmmu_mp 26>, <&ipmmu_mp 27>, 1718 <&ipmmu_mp 28>, <&ipmmu_mp 29>, 1719 <&ipmmu_mp 30>, <&ipmmu_mp 31>; 1720 }; 1721 1722 xhci0: usb@ee000000 { 1723 compatible = "renesas,xhci-r8a77961", 1724 "renesas,rcar-gen3-xhci"; 1725 reg = <0 0xee000000 0 0xc00>; 1726 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1727 clocks = <&cpg CPG_MOD 328>; 1728 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1729 resets = <&cpg 328>; 1730 status = "disabled"; 1731 }; 1732 1733 usb3_peri0: usb@ee020000 { 1734 compatible = "renesas,r8a77961-usb3-peri", 1735 "renesas,rcar-gen3-usb3-peri"; 1736 reg = <0 0xee020000 0 0x400>; 1737 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1738 clocks = <&cpg CPG_MOD 328>; 1739 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1740 resets = <&cpg 328>; 1741 status = "disabled"; 1742 }; 1743 1744 ohci0: usb@ee080000 { 1745 compatible = "generic-ohci"; 1746 reg = <0 0xee080000 0 0x100>; 1747 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1748 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1749 phys = <&usb2_phy0 1>; 1750 phy-names = "usb"; 1751 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1752 resets = <&cpg 703>, <&cpg 704>; 1753 status = "disabled"; 1754 }; 1755 1756 ohci1: usb@ee0a0000 { 1757 compatible = "generic-ohci"; 1758 reg = <0 0xee0a0000 0 0x100>; 1759 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1760 clocks = <&cpg CPG_MOD 702>; 1761 phys = <&usb2_phy1 1>; 1762 phy-names = "usb"; 1763 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1764 resets = <&cpg 702>; 1765 status = "disabled"; 1766 }; 1767 1768 ehci0: usb@ee080100 { 1769 compatible = "generic-ehci"; 1770 reg = <0 0xee080100 0 0x100>; 1771 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1772 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1773 phys = <&usb2_phy0 2>; 1774 phy-names = "usb"; 1775 companion = <&ohci0>; 1776 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1777 resets = <&cpg 703>, <&cpg 704>; 1778 status = "disabled"; 1779 }; 1780 1781 ehci1: usb@ee0a0100 { 1782 compatible = "generic-ehci"; 1783 reg = <0 0xee0a0100 0 0x100>; 1784 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1785 clocks = <&cpg CPG_MOD 702>; 1786 phys = <&usb2_phy1 2>; 1787 phy-names = "usb"; 1788 companion = <&ohci1>; 1789 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1790 resets = <&cpg 702>; 1791 status = "disabled"; 1792 }; 1793 1794 usb2_phy0: usb-phy@ee080200 { 1795 compatible = "renesas,usb2-phy-r8a77961", 1796 "renesas,rcar-gen3-usb2-phy"; 1797 reg = <0 0xee080200 0 0x700>; 1798 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1799 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1800 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1801 resets = <&cpg 703>, <&cpg 704>; 1802 #phy-cells = <1>; 1803 status = "disabled"; 1804 }; 1805 1806 usb2_phy1: usb-phy@ee0a0200 { 1807 compatible = "renesas,usb2-phy-r8a77961", 1808 "renesas,rcar-gen3-usb2-phy"; 1809 reg = <0 0xee0a0200 0 0x700>; 1810 clocks = <&cpg CPG_MOD 702>; 1811 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1812 resets = <&cpg 702>; 1813 #phy-cells = <1>; 1814 status = "disabled"; 1815 }; 1816 1817 sdhi0: mmc@ee100000 { 1818 compatible = "renesas,sdhi-r8a77961", 1819 "renesas,rcar-gen3-sdhi"; 1820 reg = <0 0xee100000 0 0x2000>; 1821 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1822 clocks = <&cpg CPG_MOD 314>; 1823 max-frequency = <200000000>; 1824 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1825 resets = <&cpg 314>; 1826 status = "disabled"; 1827 }; 1828 1829 sdhi1: mmc@ee120000 { 1830 compatible = "renesas,sdhi-r8a77961", 1831 "renesas,rcar-gen3-sdhi"; 1832 reg = <0 0xee120000 0 0x2000>; 1833 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1834 clocks = <&cpg CPG_MOD 313>; 1835 max-frequency = <200000000>; 1836 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1837 resets = <&cpg 313>; 1838 status = "disabled"; 1839 }; 1840 1841 sdhi2: mmc@ee140000 { 1842 compatible = "renesas,sdhi-r8a77961", 1843 "renesas,rcar-gen3-sdhi"; 1844 reg = <0 0xee140000 0 0x2000>; 1845 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1846 clocks = <&cpg CPG_MOD 312>; 1847 max-frequency = <200000000>; 1848 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1849 resets = <&cpg 312>; 1850 status = "disabled"; 1851 }; 1852 1853 sdhi3: mmc@ee160000 { 1854 compatible = "renesas,sdhi-r8a77961", 1855 "renesas,rcar-gen3-sdhi"; 1856 reg = <0 0xee160000 0 0x2000>; 1857 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1858 clocks = <&cpg CPG_MOD 311>; 1859 max-frequency = <200000000>; 1860 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1861 resets = <&cpg 311>; 1862 status = "disabled"; 1863 }; 1864 1865 gic: interrupt-controller@f1010000 { 1866 compatible = "arm,gic-400"; 1867 #interrupt-cells = <3>; 1868 #address-cells = <0>; 1869 interrupt-controller; 1870 reg = <0x0 0xf1010000 0 0x1000>, 1871 <0x0 0xf1020000 0 0x20000>, 1872 <0x0 0xf1040000 0 0x20000>, 1873 <0x0 0xf1060000 0 0x20000>; 1874 interrupts = <GIC_PPI 9 1875 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 1876 clocks = <&cpg CPG_MOD 408>; 1877 clock-names = "clk"; 1878 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1879 resets = <&cpg 408>; 1880 }; 1881 1882 pciec0: pcie@fe000000 { 1883 compatible = "renesas,pcie-r8a77961", 1884 "renesas,pcie-rcar-gen3"; 1885 reg = <0 0xfe000000 0 0x80000>; 1886 #address-cells = <3>; 1887 #size-cells = <2>; 1888 bus-range = <0x00 0xff>; 1889 device_type = "pci"; 1890 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1891 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1892 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1893 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1894 /* Map all possible DDR as inbound ranges */ 1895 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 1896 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1897 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1898 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1899 #interrupt-cells = <1>; 1900 interrupt-map-mask = <0 0 0 0>; 1901 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1902 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1903 clock-names = "pcie", "pcie_bus"; 1904 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1905 resets = <&cpg 319>; 1906 status = "disabled"; 1907 }; 1908 1909 pciec1: pcie@ee800000 { 1910 compatible = "renesas,pcie-r8a77961", 1911 "renesas,pcie-rcar-gen3"; 1912 reg = <0 0xee800000 0 0x80000>; 1913 #address-cells = <3>; 1914 #size-cells = <2>; 1915 bus-range = <0x00 0xff>; 1916 device_type = "pci"; 1917 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 1918 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 1919 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 1920 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 1921 /* Map all possible DDR as inbound ranges */ 1922 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 1923 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 1924 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 1925 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 1926 #interrupt-cells = <1>; 1927 interrupt-map-mask = <0 0 0 0>; 1928 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 1929 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 1930 clock-names = "pcie", "pcie_bus"; 1931 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1932 resets = <&cpg 318>; 1933 status = "disabled"; 1934 }; 1935 1936 fcpf0: fcp@fe950000 { 1937 compatible = "renesas,fcpf"; 1938 reg = <0 0xfe950000 0 0x200>; 1939 clocks = <&cpg CPG_MOD 615>; 1940 power-domains = <&sysc R8A77961_PD_A3VC>; 1941 resets = <&cpg 615>; 1942 }; 1943 1944 fcpvb0: fcp@fe96f000 { 1945 compatible = "renesas,fcpv"; 1946 reg = <0 0xfe96f000 0 0x200>; 1947 clocks = <&cpg CPG_MOD 607>; 1948 power-domains = <&sysc R8A77961_PD_A3VC>; 1949 resets = <&cpg 607>; 1950 }; 1951 1952 fcpvi0: fcp@fe9af000 { 1953 compatible = "renesas,fcpv"; 1954 reg = <0 0xfe9af000 0 0x200>; 1955 clocks = <&cpg CPG_MOD 611>; 1956 power-domains = <&sysc R8A77961_PD_A3VC>; 1957 resets = <&cpg 611>; 1958 iommus = <&ipmmu_vc0 19>; 1959 }; 1960 1961 fcpvd0: fcp@fea27000 { 1962 compatible = "renesas,fcpv"; 1963 reg = <0 0xfea27000 0 0x200>; 1964 clocks = <&cpg CPG_MOD 603>; 1965 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1966 resets = <&cpg 603>; 1967 iommus = <&ipmmu_vi0 8>; 1968 }; 1969 1970 fcpvd1: fcp@fea2f000 { 1971 compatible = "renesas,fcpv"; 1972 reg = <0 0xfea2f000 0 0x200>; 1973 clocks = <&cpg CPG_MOD 602>; 1974 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1975 resets = <&cpg 602>; 1976 iommus = <&ipmmu_vi0 9>; 1977 }; 1978 1979 fcpvd2: fcp@fea37000 { 1980 compatible = "renesas,fcpv"; 1981 reg = <0 0xfea37000 0 0x200>; 1982 clocks = <&cpg CPG_MOD 601>; 1983 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1984 resets = <&cpg 601>; 1985 iommus = <&ipmmu_vi0 10>; 1986 }; 1987 1988 vspb: vsp@fe960000 { 1989 compatible = "renesas,vsp2"; 1990 reg = <0 0xfe960000 0 0x8000>; 1991 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1992 clocks = <&cpg CPG_MOD 626>; 1993 power-domains = <&sysc R8A77961_PD_A3VC>; 1994 resets = <&cpg 626>; 1995 1996 renesas,fcp = <&fcpvb0>; 1997 }; 1998 1999 vspd0: vsp@fea20000 { 2000 compatible = "renesas,vsp2"; 2001 reg = <0 0xfea20000 0 0x5000>; 2002 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2003 clocks = <&cpg CPG_MOD 623>; 2004 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2005 resets = <&cpg 623>; 2006 2007 renesas,fcp = <&fcpvd0>; 2008 }; 2009 2010 vspd1: vsp@fea28000 { 2011 compatible = "renesas,vsp2"; 2012 reg = <0 0xfea28000 0 0x5000>; 2013 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2014 clocks = <&cpg CPG_MOD 622>; 2015 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2016 resets = <&cpg 622>; 2017 2018 renesas,fcp = <&fcpvd1>; 2019 }; 2020 2021 vspd2: vsp@fea30000 { 2022 compatible = "renesas,vsp2"; 2023 reg = <0 0xfea30000 0 0x5000>; 2024 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2025 clocks = <&cpg CPG_MOD 621>; 2026 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2027 resets = <&cpg 621>; 2028 2029 renesas,fcp = <&fcpvd2>; 2030 }; 2031 2032 vspi0: vsp@fe9a0000 { 2033 compatible = "renesas,vsp2"; 2034 reg = <0 0xfe9a0000 0 0x8000>; 2035 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2036 clocks = <&cpg CPG_MOD 631>; 2037 power-domains = <&sysc R8A77961_PD_A3VC>; 2038 resets = <&cpg 631>; 2039 2040 renesas,fcp = <&fcpvi0>; 2041 }; 2042 2043 csi20: csi2@fea80000 { 2044 reg = <0 0xfea80000 0 0x10000>; 2045 /* placeholder */ 2046 2047 ports { 2048 #address-cells = <1>; 2049 #size-cells = <0>; 2050 2051 port@1 { 2052 #address-cells = <1>; 2053 #size-cells = <0>; 2054 reg = <1>; 2055 }; 2056 }; 2057 }; 2058 2059 csi40: csi2@feaa0000 { 2060 reg = <0 0xfeaa0000 0 0x10000>; 2061 /* placeholder */ 2062 2063 ports { 2064 #address-cells = <1>; 2065 #size-cells = <0>; 2066 2067 port@1 { 2068 #address-cells = <1>; 2069 #size-cells = <0>; 2070 2071 reg = <1>; 2072 }; 2073 }; 2074 }; 2075 2076 hdmi0: hdmi@fead0000 { 2077 compatible = "renesas,r8a77961-hdmi", "renesas,rcar-gen3-hdmi"; 2078 reg = <0 0xfead0000 0 0x10000>; 2079 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2080 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A77961_CLK_HDMI>; 2081 clock-names = "iahb", "isfr"; 2082 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2083 resets = <&cpg 729>; 2084 status = "disabled"; 2085 2086 ports { 2087 #address-cells = <1>; 2088 #size-cells = <0>; 2089 port@0 { 2090 reg = <0>; 2091 dw_hdmi0_in: endpoint { 2092 remote-endpoint = <&du_out_hdmi0>; 2093 }; 2094 }; 2095 port@1 { 2096 reg = <1>; 2097 }; 2098 port@2 { 2099 /* HDMI sound */ 2100 reg = <2>; 2101 }; 2102 }; 2103 }; 2104 2105 du: display@feb00000 { 2106 compatible = "renesas,du-r8a77961"; 2107 reg = <0 0xfeb00000 0 0x70000>; 2108 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2109 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2110 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 2111 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2112 <&cpg CPG_MOD 722>; 2113 clock-names = "du.0", "du.1", "du.2"; 2114 resets = <&cpg 724>, <&cpg 722>; 2115 reset-names = "du.0", "du.2"; 2116 2117 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>; 2118 status = "disabled"; 2119 2120 ports { 2121 #address-cells = <1>; 2122 #size-cells = <0>; 2123 2124 port@0 { 2125 reg = <0>; 2126 du_out_rgb: endpoint { 2127 }; 2128 }; 2129 port@1 { 2130 reg = <1>; 2131 du_out_hdmi0: endpoint { 2132 remote-endpoint = <&dw_hdmi0_in>; 2133 }; 2134 }; 2135 port@2 { 2136 reg = <2>; 2137 du_out_lvds0: endpoint { 2138 }; 2139 }; 2140 }; 2141 }; 2142 2143 prr: chipid@fff00044 { 2144 compatible = "renesas,prr"; 2145 reg = <0 0xfff00044 0 4>; 2146 }; 2147 }; 2148 2149 thermal-zones { 2150 sensor_thermal1: sensor-thermal1 { 2151 polling-delay-passive = <250>; 2152 polling-delay = <1000>; 2153 thermal-sensors = <&tsc 0>; 2154 sustainable-power = <3874>; 2155 2156 trips { 2157 sensor1_crit: sensor1-crit { 2158 temperature = <120000>; 2159 hysteresis = <1000>; 2160 type = "critical"; 2161 }; 2162 }; 2163 }; 2164 2165 sensor_thermal2: sensor-thermal2 { 2166 polling-delay-passive = <250>; 2167 polling-delay = <1000>; 2168 thermal-sensors = <&tsc 1>; 2169 sustainable-power = <3874>; 2170 2171 trips { 2172 sensor2_crit: sensor2-crit { 2173 temperature = <120000>; 2174 hysteresis = <1000>; 2175 type = "critical"; 2176 }; 2177 }; 2178 }; 2179 2180 sensor_thermal3: sensor-thermal3 { 2181 polling-delay-passive = <250>; 2182 polling-delay = <1000>; 2183 thermal-sensors = <&tsc 2>; 2184 sustainable-power = <3874>; 2185 2186 cooling-maps { 2187 map0 { 2188 trip = <&target>; 2189 cooling-device = <&a57_0 2 4>; 2190 contribution = <1024>; 2191 }; 2192 map1 { 2193 trip = <&target>; 2194 cooling-device = <&a53_0 0 2>; 2195 contribution = <1024>; 2196 }; 2197 }; 2198 trips { 2199 target: trip-point1 { 2200 temperature = <100000>; 2201 hysteresis = <1000>; 2202 type = "passive"; 2203 }; 2204 2205 sensor3_crit: sensor3-crit { 2206 temperature = <120000>; 2207 hysteresis = <1000>; 2208 type = "critical"; 2209 }; 2210 }; 2211 }; 2212 }; 2213 2214 timer { 2215 compatible = "arm,armv8-timer"; 2216 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2217 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2218 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2219 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; 2220 }; 2221 2222 /* External USB clocks - can be overridden by the board */ 2223 usb3s0_clk: usb3s0 { 2224 compatible = "fixed-clock"; 2225 #clock-cells = <0>; 2226 clock-frequency = <0>; 2227 }; 2228 2229 usb_extal_clk: usb_extal { 2230 compatible = "fixed-clock"; 2231 #clock-cells = <0>; 2232 clock-frequency = <0>; 2233 }; 2234}; 2235