1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH 4 */ 5 6#include <dt-bindings/pwm/pwm.h> 7#include "rk3399.dtsi" 8#include "rk3399-opp.dtsi" 9 10/ { 11 leds { 12 compatible = "gpio-leds"; 13 pinctrl-names = "default"; 14 pinctrl-0 = <&module_led_pin>; 15 16 module_led: led-0 { 17 label = "module_led"; 18 gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>; 19 linux,default-trigger = "heartbeat"; 20 panic-indicator; 21 }; 22 }; 23 24 /* 25 * Overwrite the opp-table for CPUB as this board uses a different 26 * regulator (FAN53555) that only allows 10mV steps and therefore 27 * can't reach the operation point target voltages from rk3399-opp.dtsi 28 */ 29 /delete-node/ opp-table1; 30 cluster1_opp: opp-table1 { 31 compatible = "operating-points-v2"; 32 opp-shared; 33 34 opp00 { 35 opp-hz = /bits/ 64 <408000000>; 36 opp-microvolt = <800000>; 37 clock-latency-ns = <40000>; 38 }; 39 opp01 { 40 opp-hz = /bits/ 64 <600000000>; 41 opp-microvolt = <800000>; 42 }; 43 opp02 { 44 opp-hz = /bits/ 64 <816000000>; 45 opp-microvolt = <830000>; 46 opp-suspend; 47 }; 48 opp03 { 49 opp-hz = /bits/ 64 <1008000000>; 50 opp-microvolt = <880000>; 51 }; 52 opp04 { 53 opp-hz = /bits/ 64 <1200000000>; 54 opp-microvolt = <950000>; 55 }; 56 opp05 { 57 opp-hz = /bits/ 64 <1416000000>; 58 opp-microvolt = <1030000>; 59 }; 60 opp06 { 61 opp-hz = /bits/ 64 <1608000000>; 62 opp-microvolt = <1100000>; 63 }; 64 opp07 { 65 opp-hz = /bits/ 64 <1800000000>; 66 opp-microvolt = <1200000>; 67 }; 68 opp08 { 69 opp-hz = /bits/ 64 <1992000000>; 70 opp-microvolt = <1230000>; 71 turbo-mode; 72 }; 73 }; 74 75 clkin_gmac: external-gmac-clock { 76 compatible = "fixed-clock"; 77 clock-frequency = <125000000>; 78 clock-output-names = "clkin_gmac"; 79 #clock-cells = <0>; 80 }; 81 82 vcc1v2_phy: vcc1v2-phy { 83 compatible = "regulator-fixed"; 84 regulator-name = "vcc1v2_phy"; 85 regulator-always-on; 86 regulator-boot-on; 87 regulator-min-microvolt = <1200000>; 88 regulator-max-microvolt = <1200000>; 89 vin-supply = <&vcc5v0_sys>; 90 }; 91 92 vcc3v3_sys: vcc3v3-sys { 93 compatible = "regulator-fixed"; 94 regulator-name = "vcc3v3_sys"; 95 regulator-always-on; 96 regulator-boot-on; 97 regulator-min-microvolt = <3300000>; 98 regulator-max-microvolt = <3300000>; 99 vin-supply = <&vcc5v0_sys>; 100 }; 101 102 vcc5v0_host: vcc5v0-host-regulator { 103 compatible = "regulator-fixed"; 104 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; 105 pinctrl-names = "default"; 106 pinctrl-0 = <&vcc5v0_host_en>; 107 regulator-name = "vcc5v0_host"; 108 regulator-always-on; 109 vin-supply = <&vcc5v0_sys>; 110 }; 111 112 vcc5v0_sys: vcc5v0-sys { 113 compatible = "regulator-fixed"; 114 regulator-name = "vcc5v0_sys"; 115 regulator-always-on; 116 regulator-boot-on; 117 regulator-min-microvolt = <5000000>; 118 regulator-max-microvolt = <5000000>; 119 }; 120}; 121 122&cpu_b0 { 123 cpu-supply = <&vdd_cpu_b>; 124}; 125 126&cpu_b1 { 127 cpu-supply = <&vdd_cpu_b>; 128}; 129 130&cpu_l0 { 131 cpu-supply = <&vdd_cpu_l>; 132}; 133 134&cpu_l1 { 135 cpu-supply = <&vdd_cpu_l>; 136}; 137 138&cpu_l2 { 139 cpu-supply = <&vdd_cpu_l>; 140}; 141 142&cpu_l3 { 143 cpu-supply = <&vdd_cpu_l>; 144}; 145 146&emmc_phy { 147 status = "okay"; 148 drive-impedance-ohm = <33>; 149}; 150 151&gmac { 152 assigned-clocks = <&cru SCLK_RMII_SRC>; 153 assigned-clock-parents = <&clkin_gmac>; 154 clock_in_out = "input"; 155 phy-supply = <&vcc1v2_phy>; 156 phy-mode = "rgmii"; 157 pinctrl-names = "default"; 158 pinctrl-0 = <&rgmii_pins>; 159 snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; 160 snps,reset-active-low; 161 snps,reset-delays-us = <0 10000 50000>; 162 tx_delay = <0x10>; 163 rx_delay = <0x10>; 164 status = "okay"; 165}; 166 167&gpu { 168 mali-supply = <&vdd_gpu>; 169 status = "okay"; 170}; 171 172&i2c0 { 173 status = "okay"; 174 i2c-scl-rising-time-ns = <168>; 175 i2c-scl-falling-time-ns = <4>; 176 clock-frequency = <400000>; 177 178 rk808: pmic@1b { 179 compatible = "rockchip,rk808"; 180 reg = <0x1b>; 181 interrupt-parent = <&gpio1>; 182 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; 183 #clock-cells = <1>; 184 clock-output-names = "xin32k", "rk808-clkout2"; 185 pinctrl-names = "default"; 186 pinctrl-0 = <&pmic_int_l>; 187 rockchip,system-power-controller; 188 wakeup-source; 189 190 vcc1-supply = <&vcc5v0_sys>; 191 vcc2-supply = <&vcc5v0_sys>; 192 vcc3-supply = <&vcc5v0_sys>; 193 vcc4-supply = <&vcc5v0_sys>; 194 vcc6-supply = <&vcc5v0_sys>; 195 vcc7-supply = <&vcc5v0_sys>; 196 vcc8-supply = <&vcc3v3_sys>; 197 vcc9-supply = <&vcc5v0_sys>; 198 vcc10-supply = <&vcc5v0_sys>; 199 vcc11-supply = <&vcc5v0_sys>; 200 vcc12-supply = <&vcc3v3_sys>; 201 vddio-supply = <&vcc1v8_pmu>; 202 203 regulators { 204 vdd_center: DCDC_REG1 { 205 regulator-name = "vdd_center"; 206 regulator-min-microvolt = <750000>; 207 regulator-max-microvolt = <1350000>; 208 regulator-ramp-delay = <6001>; 209 regulator-always-on; 210 regulator-boot-on; 211 regulator-state-mem { 212 regulator-off-in-suspend; 213 }; 214 }; 215 216 vdd_cpu_l: DCDC_REG2 { 217 regulator-name = "vdd_cpu_l"; 218 regulator-min-microvolt = <750000>; 219 regulator-max-microvolt = <1350000>; 220 regulator-ramp-delay = <6001>; 221 regulator-always-on; 222 regulator-boot-on; 223 regulator-state-mem { 224 regulator-off-in-suspend; 225 }; 226 }; 227 228 vcc_ddr: DCDC_REG3 { 229 regulator-name = "vcc_ddr"; 230 regulator-always-on; 231 regulator-boot-on; 232 regulator-state-mem { 233 regulator-on-in-suspend; 234 }; 235 }; 236 237 vcc_1v8: DCDC_REG4 { 238 regulator-name = "vcc_1v8"; 239 regulator-min-microvolt = <1800000>; 240 regulator-max-microvolt = <1800000>; 241 regulator-always-on; 242 regulator-boot-on; 243 regulator-state-mem { 244 regulator-on-in-suspend; 245 regulator-suspend-microvolt = <1800000>; 246 }; 247 }; 248 249 vcc_ldo1: LDO_REG1 { 250 regulator-name = "vcc_ldo1"; 251 regulator-min-microvolt = <1800000>; 252 regulator-max-microvolt = <1800000>; 253 regulator-boot-on; 254 regulator-state-mem { 255 regulator-off-in-suspend; 256 }; 257 }; 258 259 vcc1v8_hdmi: LDO_REG2 { 260 regulator-name = "vcc1v8_hdmi"; 261 regulator-min-microvolt = <1800000>; 262 regulator-max-microvolt = <1800000>; 263 regulator-always-on; 264 regulator-boot-on; 265 regulator-state-mem { 266 regulator-off-in-suspend; 267 }; 268 }; 269 270 vcc1v8_pmu: LDO_REG3 { 271 regulator-name = "vcc1v8_pmu"; 272 regulator-min-microvolt = <1800000>; 273 regulator-max-microvolt = <1800000>; 274 regulator-always-on; 275 regulator-boot-on; 276 regulator-state-mem { 277 regulator-on-in-suspend; 278 regulator-suspend-microvolt = <1800000>; 279 }; 280 }; 281 282 vcc_sd: LDO_REG4 { 283 regulator-name = "vcc_sd"; 284 regulator-min-microvolt = <1800000>; 285 regulator-max-microvolt = <3000000>; 286 regulator-always-on; 287 regulator-boot-on; 288 regulator-state-mem { 289 regulator-on-in-suspend; 290 regulator-suspend-microvolt = <3000000>; 291 }; 292 }; 293 294 vcc_ldo5: LDO_REG5 { 295 regulator-name = "vcc_ldo5"; 296 regulator-min-microvolt = <3000000>; 297 regulator-max-microvolt = <3000000>; 298 regulator-boot-on; 299 regulator-state-mem { 300 regulator-off-in-suspend; 301 }; 302 }; 303 304 vcc_ldo6: LDO_REG6 { 305 regulator-name = "vcc_ldo6"; 306 regulator-min-microvolt = <1500000>; 307 regulator-max-microvolt = <1500000>; 308 regulator-boot-on; 309 regulator-state-mem { 310 regulator-off-in-suspend; 311 }; 312 }; 313 314 vcc0v9_hdmi: LDO_REG7 { 315 regulator-name = "vcc0v9_hdmi"; 316 regulator-min-microvolt = <900000>; 317 regulator-max-microvolt = <900000>; 318 regulator-always-on; 319 regulator-boot-on; 320 regulator-state-mem { 321 regulator-off-in-suspend; 322 }; 323 }; 324 325 vcc_efuse: LDO_REG8 { 326 regulator-name = "vcc_efuse"; 327 regulator-min-microvolt = <1800000>; 328 regulator-max-microvolt = <1800000>; 329 regulator-always-on; 330 regulator-boot-on; 331 regulator-state-mem { 332 regulator-off-in-suspend; 333 }; 334 }; 335 336 vcc3v3_s3: SWITCH_REG1 { 337 regulator-name = "vcc3v3_s3"; 338 regulator-always-on; 339 regulator-boot-on; 340 regulator-state-mem { 341 regulator-off-in-suspend; 342 }; 343 }; 344 345 vcc3v3_s0: SWITCH_REG2 { 346 regulator-name = "vcc3v3_s0"; 347 regulator-always-on; 348 regulator-boot-on; 349 regulator-state-mem { 350 regulator-off-in-suspend; 351 }; 352 }; 353 }; 354 }; 355 356 vdd_gpu: regulator@60 { 357 compatible = "fcs,fan53555"; 358 reg = <0x60>; 359 fcs,suspend-voltage-selector = <1>; 360 regulator-name = "vdd_gpu"; 361 regulator-min-microvolt = <600000>; 362 regulator-max-microvolt = <1230000>; 363 regulator-ramp-delay = <1000>; 364 regulator-always-on; 365 regulator-boot-on; 366 vin-supply = <&vcc5v0_sys>; 367 }; 368}; 369 370&i2c7 { 371 status = "okay"; 372 clock-frequency = <400000>; 373 374 fan: fan@18 { 375 compatible = "ti,amc6821"; 376 reg = <0x18>; 377 #cooling-cells = <2>; 378 }; 379 380 rtc_twi: rtc@6f { 381 compatible = "isil,isl1208"; 382 reg = <0x6f>; 383 }; 384}; 385 386&i2c8 { 387 status = "okay"; 388 clock-frequency = <400000>; 389 390 vdd_cpu_b: regulator@60 { 391 compatible = "fcs,fan53555"; 392 reg = <0x60>; 393 vin-supply = <&vcc5v0_sys>; 394 regulator-name = "vdd_cpu_b"; 395 regulator-min-microvolt = <600000>; 396 regulator-max-microvolt = <1230000>; 397 regulator-ramp-delay = <1000>; 398 fcs,suspend-voltage-selector = <1>; 399 regulator-always-on; 400 regulator-boot-on; 401 }; 402}; 403 404&i2s0 { 405 pinctrl-0 = <&i2s0_2ch_bus>; 406 rockchip,playback-channels = <2>; 407 rockchip,capture-channels = <2>; 408 status = "okay"; 409}; 410 411/* 412 * As Q7 does not specify neither a global nor a RX clock for I2S these 413 * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO. 414 * Therefore we have to redefine the i2s0_2ch_bus definition to prevent 415 * conflicts. 416 */ 417&i2s0_2ch_bus { 418 rockchip,pins = 419 <3 RK_PD0 1 &pcfg_pull_none>, 420 <3 RK_PD2 1 &pcfg_pull_none>, 421 <3 RK_PD3 1 &pcfg_pull_none>, 422 <3 RK_PD7 1 &pcfg_pull_none>; 423}; 424 425&io_domains { 426 status = "okay"; 427 bt656-supply = <&vcc_1v8>; 428 audio-supply = <&vcc_1v8>; 429 sdmmc-supply = <&vcc_sd>; 430 gpio1830-supply = <&vcc_1v8>; 431}; 432 433&pmu_io_domains { 434 status = "okay"; 435 pmu1830-supply = <&vcc_1v8>; 436}; 437 438&pwm2 { 439 status = "okay"; 440}; 441 442&pinctrl { 443 i2c8 { 444 i2c8_xfer_a: i2c8-xfer { 445 rockchip,pins = 446 <1 RK_PC4 1 &pcfg_pull_up>, 447 <1 RK_PC5 1 &pcfg_pull_up>; 448 }; 449 }; 450 451 leds { 452 module_led_pin: module-led-pin { 453 rockchip,pins = 454 <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 455 }; 456 }; 457 458 pmic { 459 pmic_int_l: pmic-int-l { 460 rockchip,pins = 461 <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; 462 }; 463 }; 464 465 usb2 { 466 vcc5v0_host_en: vcc5v0-host-en { 467 rockchip,pins = 468 <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 469 }; 470 }; 471}; 472 473&sdhci { 474 /* 475 * Signal integrity isn't great at 200MHz but 100MHz has proven stable 476 * enough. 477 */ 478 max-frequency = <100000000>; 479 480 bus-width = <8>; 481 mmc-hs400-1_8v; 482 mmc-hs400-enhanced-strobe; 483 non-removable; 484 status = "okay"; 485}; 486 487&sdmmc { 488 vqmmc-supply = <&vcc_sd>; 489}; 490 491&spi1 { 492 status = "okay"; 493 494 norflash: flash@0 { 495 compatible = "jedec,spi-nor"; 496 reg = <0>; 497 spi-max-frequency = <50000000>; 498 }; 499}; 500 501&tcphy1 { 502 status = "okay"; 503}; 504 505&tsadc { 506 rockchip,hw-tshut-mode = <1>; 507 rockchip,hw-tshut-polarity = <1>; 508 status = "okay"; 509}; 510 511&u2phy1 { 512 status = "okay"; 513 514 u2phy1_otg: otg-port { 515 status = "okay"; 516 }; 517 518 u2phy1_host: host-port { 519 phy-supply = <&vcc5v0_host>; 520 status = "okay"; 521 }; 522}; 523 524&usbdrd3_1 { 525 status = "okay"; 526}; 527 528&usbdrd_dwc3_1 { 529 status = "okay"; 530 dr_mode = "host"; 531}; 532 533&usb_host1_ehci { 534 status = "okay"; 535}; 536 537&usb_host1_ohci { 538 status = "okay"; 539}; 540