1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2012 ARM Ltd.
4 * Author: Catalin Marinas <catalin.marinas@arm.com>
5 */
6
7 #include <linux/gfp.h>
8 #include <linux/cache.h>
9 #include <linux/dma-map-ops.h>
10 #include <linux/dma-iommu.h>
11 #include <xen/xen.h>
12 #include <xen/swiotlb-xen.h>
13 #include <trace/hooks/iommu.h>
14
15 #include <asm/cacheflush.h>
16
arch_sync_dma_for_device(phys_addr_t paddr,size_t size,enum dma_data_direction dir)17 void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
18 enum dma_data_direction dir)
19 {
20 __dma_map_area(phys_to_virt(paddr), size, dir);
21 }
22
arch_sync_dma_for_cpu(phys_addr_t paddr,size_t size,enum dma_data_direction dir)23 void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
24 enum dma_data_direction dir)
25 {
26 __dma_unmap_area(phys_to_virt(paddr), size, dir);
27 }
28
arch_dma_prep_coherent(struct page * page,size_t size)29 void arch_dma_prep_coherent(struct page *page, size_t size)
30 {
31 __dma_flush_area(page_address(page), size);
32 }
33
34 #ifdef CONFIG_IOMMU_DMA
arch_teardown_dma_ops(struct device * dev)35 void arch_teardown_dma_ops(struct device *dev)
36 {
37 dev->dma_ops = NULL;
38 }
39 #endif
40
arch_setup_dma_ops(struct device * dev,u64 dma_base,u64 size,const struct iommu_ops * iommu,bool coherent)41 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
42 const struct iommu_ops *iommu, bool coherent)
43 {
44 int cls = cache_line_size_of_cpu();
45
46 WARN_TAINT(!coherent && cls > ARCH_DMA_MINALIGN,
47 TAINT_CPU_OUT_OF_SPEC,
48 "%s %s: ARCH_DMA_MINALIGN smaller than CTR_EL0.CWG (%d < %d)",
49 dev_driver_string(dev), dev_name(dev),
50 ARCH_DMA_MINALIGN, cls);
51
52 dev->dma_coherent = coherent;
53 if (iommu) {
54 iommu_setup_dma_ops(dev, dma_base, size);
55 trace_android_vh_iommu_setup_dma_ops(dev, dma_base, size);
56 trace_android_rvh_iommu_setup_dma_ops(dev, dma_base, size);
57 }
58
59 #ifdef CONFIG_XEN
60 if (xen_initial_domain())
61 dev->dma_ops = &xen_swiotlb_dma_ops;
62 #endif
63 }
64