1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 *
4 * Copyright 2012 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
5 */
6
7 #include <linux/types.h>
8 #include <linux/string.h>
9 #include <linux/kvm.h>
10 #include <linux/kvm_host.h>
11 #include <linux/kernel.h>
12 #include <asm/lppaca.h>
13 #include <asm/opal.h>
14 #include <asm/mce.h>
15 #include <asm/machdep.h>
16 #include <asm/cputhreads.h>
17 #include <asm/hmi.h>
18 #include <asm/kvm_ppc.h>
19
20 /* SRR1 bits for machine check on POWER7 */
21 #define SRR1_MC_LDSTERR (1ul << (63-42))
22 #define SRR1_MC_IFETCH_SH (63-45)
23 #define SRR1_MC_IFETCH_MASK 0x7
24 #define SRR1_MC_IFETCH_SLBPAR 2 /* SLB parity error */
25 #define SRR1_MC_IFETCH_SLBMULTI 3 /* SLB multi-hit */
26 #define SRR1_MC_IFETCH_SLBPARMULTI 4 /* SLB parity + multi-hit */
27 #define SRR1_MC_IFETCH_TLBMULTI 5 /* I-TLB multi-hit */
28
29 /* DSISR bits for machine check on POWER7 */
30 #define DSISR_MC_DERAT_MULTI 0x800 /* D-ERAT multi-hit */
31 #define DSISR_MC_TLB_MULTI 0x400 /* D-TLB multi-hit */
32 #define DSISR_MC_SLB_PARITY 0x100 /* SLB parity error */
33 #define DSISR_MC_SLB_MULTI 0x080 /* SLB multi-hit */
34 #define DSISR_MC_SLB_PARMULTI 0x040 /* SLB parity + multi-hit */
35
36 /* POWER7 SLB flush and reload */
reload_slb(struct kvm_vcpu * vcpu)37 static void reload_slb(struct kvm_vcpu *vcpu)
38 {
39 struct slb_shadow *slb;
40 unsigned long i, n;
41
42 /* First clear out SLB */
43 asm volatile("slbmte %0,%0; slbia" : : "r" (0));
44
45 /* Do they have an SLB shadow buffer registered? */
46 slb = vcpu->arch.slb_shadow.pinned_addr;
47 if (!slb)
48 return;
49
50 /* Sanity check */
51 n = min_t(u32, be32_to_cpu(slb->persistent), SLB_MIN_SIZE);
52 if ((void *) &slb->save_area[n] > vcpu->arch.slb_shadow.pinned_end)
53 return;
54
55 /* Load up the SLB from that */
56 for (i = 0; i < n; ++i) {
57 unsigned long rb = be64_to_cpu(slb->save_area[i].esid);
58 unsigned long rs = be64_to_cpu(slb->save_area[i].vsid);
59
60 rb = (rb & ~0xFFFul) | i; /* insert entry number */
61 asm volatile("slbmte %0,%1" : : "r" (rs), "r" (rb));
62 }
63 }
64
65 /*
66 * On POWER7, see if we can handle a machine check that occurred inside
67 * the guest in real mode, without switching to the host partition.
68 */
kvmppc_realmode_mc_power7(struct kvm_vcpu * vcpu)69 static void kvmppc_realmode_mc_power7(struct kvm_vcpu *vcpu)
70 {
71 unsigned long srr1 = vcpu->arch.shregs.msr;
72 struct machine_check_event mce_evt;
73 long handled = 1;
74
75 if (srr1 & SRR1_MC_LDSTERR) {
76 /* error on load/store */
77 unsigned long dsisr = vcpu->arch.shregs.dsisr;
78
79 if (dsisr & (DSISR_MC_SLB_PARMULTI | DSISR_MC_SLB_MULTI |
80 DSISR_MC_SLB_PARITY | DSISR_MC_DERAT_MULTI)) {
81 /* flush and reload SLB; flushes D-ERAT too */
82 reload_slb(vcpu);
83 dsisr &= ~(DSISR_MC_SLB_PARMULTI | DSISR_MC_SLB_MULTI |
84 DSISR_MC_SLB_PARITY | DSISR_MC_DERAT_MULTI);
85 }
86 if (dsisr & DSISR_MC_TLB_MULTI) {
87 tlbiel_all_lpid(vcpu->kvm->arch.radix);
88 dsisr &= ~DSISR_MC_TLB_MULTI;
89 }
90 /* Any other errors we don't understand? */
91 if (dsisr & 0xffffffffUL)
92 handled = 0;
93 }
94
95 switch ((srr1 >> SRR1_MC_IFETCH_SH) & SRR1_MC_IFETCH_MASK) {
96 case 0:
97 break;
98 case SRR1_MC_IFETCH_SLBPAR:
99 case SRR1_MC_IFETCH_SLBMULTI:
100 case SRR1_MC_IFETCH_SLBPARMULTI:
101 reload_slb(vcpu);
102 break;
103 case SRR1_MC_IFETCH_TLBMULTI:
104 tlbiel_all_lpid(vcpu->kvm->arch.radix);
105 break;
106 default:
107 handled = 0;
108 }
109
110 /*
111 * Now get the event and stash it in the vcpu struct so it can
112 * be handled by the primary thread in virtual mode. We can't
113 * call machine_check_queue_event() here if we are running on
114 * an offline secondary thread.
115 */
116 if (get_mce_event(&mce_evt, MCE_EVENT_RELEASE)) {
117 if (handled && mce_evt.version == MCE_V1)
118 mce_evt.disposition = MCE_DISPOSITION_RECOVERED;
119 } else {
120 memset(&mce_evt, 0, sizeof(mce_evt));
121 }
122
123 vcpu->arch.mce_evt = mce_evt;
124 }
125
kvmppc_realmode_machine_check(struct kvm_vcpu * vcpu)126 void kvmppc_realmode_machine_check(struct kvm_vcpu *vcpu)
127 {
128 kvmppc_realmode_mc_power7(vcpu);
129 }
130
131 /* Check if dynamic split is in force and return subcore size accordingly. */
kvmppc_cur_subcore_size(void)132 static inline int kvmppc_cur_subcore_size(void)
133 {
134 if (local_paca->kvm_hstate.kvm_split_mode)
135 return local_paca->kvm_hstate.kvm_split_mode->subcore_size;
136
137 return threads_per_subcore;
138 }
139
kvmppc_subcore_enter_guest(void)140 void kvmppc_subcore_enter_guest(void)
141 {
142 int thread_id, subcore_id;
143
144 thread_id = cpu_thread_in_core(local_paca->paca_index);
145 subcore_id = thread_id / kvmppc_cur_subcore_size();
146
147 local_paca->sibling_subcore_state->in_guest[subcore_id] = 1;
148 }
149 EXPORT_SYMBOL_GPL(kvmppc_subcore_enter_guest);
150
kvmppc_subcore_exit_guest(void)151 void kvmppc_subcore_exit_guest(void)
152 {
153 int thread_id, subcore_id;
154
155 thread_id = cpu_thread_in_core(local_paca->paca_index);
156 subcore_id = thread_id / kvmppc_cur_subcore_size();
157
158 local_paca->sibling_subcore_state->in_guest[subcore_id] = 0;
159 }
160 EXPORT_SYMBOL_GPL(kvmppc_subcore_exit_guest);
161
kvmppc_tb_resync_required(void)162 static bool kvmppc_tb_resync_required(void)
163 {
164 if (test_and_set_bit(CORE_TB_RESYNC_REQ_BIT,
165 &local_paca->sibling_subcore_state->flags))
166 return false;
167
168 return true;
169 }
170
kvmppc_tb_resync_done(void)171 static void kvmppc_tb_resync_done(void)
172 {
173 clear_bit(CORE_TB_RESYNC_REQ_BIT,
174 &local_paca->sibling_subcore_state->flags);
175 }
176
177 /*
178 * kvmppc_realmode_hmi_handler() is called only by primary thread during
179 * guest exit path.
180 *
181 * There are multiple reasons why HMI could occur, one of them is
182 * Timebase (TB) error. If this HMI is due to TB error, then TB would
183 * have been in stopped state. The opal hmi handler Will fix it and
184 * restore the TB value with host timebase value. For HMI caused due
185 * to non-TB errors, opal hmi handler will not touch/restore TB register
186 * and hence there won't be any change in TB value.
187 *
188 * Since we are not sure about the cause of this HMI, we can't be sure
189 * about the content of TB register whether it holds guest or host timebase
190 * value. Hence the idea is to resync the TB on every HMI, so that we
191 * know about the exact state of the TB value. Resync TB call will
192 * restore TB to host timebase.
193 *
194 * Things to consider:
195 * - On TB error, HMI interrupt is reported on all the threads of the core
196 * that has encountered TB error irrespective of split-core mode.
197 * - The very first thread on the core that get chance to fix TB error
198 * would rsync the TB with local chipTOD value.
199 * - The resync TB is a core level action i.e. it will sync all the TBs
200 * in that core independent of split-core mode. This means if we trigger
201 * TB sync from a thread from one subcore, it would affect TB values of
202 * sibling subcores of the same core.
203 *
204 * All threads need to co-ordinate before making opal hmi handler.
205 * All threads will use sibling_subcore_state->in_guest[] (shared by all
206 * threads in the core) in paca which holds information about whether
207 * sibling subcores are in Guest mode or host mode. The in_guest[] array
208 * is of size MAX_SUBCORE_PER_CORE=4, indexed using subcore id to set/unset
209 * subcore status. Only primary threads from each subcore is responsible
210 * to set/unset its designated array element while entering/exiting the
211 * guset.
212 *
213 * After invoking opal hmi handler call, one of the thread (of entire core)
214 * will need to resync the TB. Bit 63 from subcore state bitmap flags
215 * (sibling_subcore_state->flags) will be used to co-ordinate between
216 * primary threads to decide who takes up the responsibility.
217 *
218 * This is what we do:
219 * - Primary thread from each subcore tries to set resync required bit[63]
220 * of paca->sibling_subcore_state->flags.
221 * - The first primary thread that is able to set the flag takes the
222 * responsibility of TB resync. (Let us call it as thread leader)
223 * - All other threads which are in host will call
224 * wait_for_subcore_guest_exit() and wait for in_guest[0-3] from
225 * paca->sibling_subcore_state to get cleared.
226 * - All the primary thread will clear its subcore status from subcore
227 * state in_guest[] array respectively.
228 * - Once all primary threads clear in_guest[0-3], all of them will invoke
229 * opal hmi handler.
230 * - Now all threads will wait for TB resync to complete by invoking
231 * wait_for_tb_resync() except the thread leader.
232 * - Thread leader will do a TB resync by invoking opal_resync_timebase()
233 * call and the it will clear the resync required bit.
234 * - All other threads will now come out of resync wait loop and proceed
235 * with individual execution.
236 * - On return of this function, primary thread will signal all
237 * secondary threads to proceed.
238 * - All secondary threads will eventually call opal hmi handler on
239 * their exit path.
240 *
241 * Returns 1 if the timebase offset should be applied, 0 if not.
242 */
243
kvmppc_realmode_hmi_handler(void)244 long kvmppc_realmode_hmi_handler(void)
245 {
246 bool resync_req;
247
248 local_paca->hmi_irqs++;
249
250 if (hmi_handle_debugtrig(NULL) >= 0)
251 return 1;
252
253 /*
254 * By now primary thread has already completed guest->host
255 * partition switch but haven't signaled secondaries yet.
256 * All the secondary threads on this subcore is waiting
257 * for primary thread to signal them to go ahead.
258 *
259 * For threads from subcore which isn't in guest, they all will
260 * wait until all other subcores on this core exit the guest.
261 *
262 * Now set the resync required bit. If you are the first to
263 * set this bit then kvmppc_tb_resync_required() function will
264 * return true. For rest all other subcores
265 * kvmppc_tb_resync_required() will return false.
266 *
267 * If resync_req == true, then this thread is responsible to
268 * initiate TB resync after hmi handler has completed.
269 * All other threads on this core will wait until this thread
270 * clears the resync required bit flag.
271 */
272 resync_req = kvmppc_tb_resync_required();
273
274 /* Reset the subcore status to indicate it has exited guest */
275 kvmppc_subcore_exit_guest();
276
277 /*
278 * Wait for other subcores on this core to exit the guest.
279 * All the primary threads and threads from subcore that are
280 * not in guest will wait here until all subcores are out
281 * of guest context.
282 */
283 wait_for_subcore_guest_exit();
284
285 /*
286 * At this point we are sure that primary threads from each
287 * subcore on this core have completed guest->host partition
288 * switch. Now it is safe to call HMI handler.
289 */
290 if (ppc_md.hmi_exception_early)
291 ppc_md.hmi_exception_early(NULL);
292
293 /*
294 * Check if this thread is responsible to resync TB.
295 * All other threads will wait until this thread completes the
296 * TB resync.
297 */
298 if (resync_req) {
299 opal_resync_timebase();
300 /* Reset TB resync req bit */
301 kvmppc_tb_resync_done();
302 } else {
303 wait_for_tb_resync();
304 }
305
306 /*
307 * Reset tb_offset_applied so the guest exit code won't try
308 * to subtract the previous timebase offset from the timebase.
309 */
310 if (local_paca->kvm_hstate.kvm_vcore)
311 local_paca->kvm_hstate.kvm_vcore->tb_offset_applied = 0;
312
313 return 0;
314 }
315