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1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * pata_cypress.c 	- Cypress PATA for new ATA layer
4  *			  (C) 2006 Red Hat Inc
5  *			  Alan Cox
6  *
7  * Based heavily on
8  * linux/drivers/ide/pci/cy82c693.c		Version 0.40	Sep. 10, 2002
9  *
10  */
11 
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/pci.h>
15 #include <linux/blkdev.h>
16 #include <linux/delay.h>
17 #include <scsi/scsi_host.h>
18 #include <linux/libata.h>
19 
20 #define DRV_NAME "pata_cypress"
21 #define DRV_VERSION "0.1.5"
22 
23 /* here are the offset definitions for the registers */
24 
25 enum {
26 	CY82_IDE_CMDREG		= 0x04,
27 	CY82_IDE_ADDRSETUP	= 0x48,
28 	CY82_IDE_MASTER_IOR	= 0x4C,
29 	CY82_IDE_MASTER_IOW	= 0x4D,
30 	CY82_IDE_SLAVE_IOR	= 0x4E,
31 	CY82_IDE_SLAVE_IOW	= 0x4F,
32 	CY82_IDE_MASTER_8BIT	= 0x50,
33 	CY82_IDE_SLAVE_8BIT	= 0x51,
34 
35 	CY82_INDEX_PORT		= 0x22,
36 	CY82_DATA_PORT		= 0x23,
37 
38 	CY82_INDEX_CTRLREG1	= 0x01,
39 	CY82_INDEX_CHANNEL0	= 0x30,
40 	CY82_INDEX_CHANNEL1	= 0x31,
41 	CY82_INDEX_TIMEOUT	= 0x32
42 };
43 
44 /**
45  *	cy82c693_set_piomode	-	set initial PIO mode data
46  *	@ap: ATA interface
47  *	@adev: ATA device
48  *
49  *	Called to do the PIO mode setup.
50  */
51 
cy82c693_set_piomode(struct ata_port * ap,struct ata_device * adev)52 static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
53 {
54 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
55 	struct ata_timing t;
56 	const unsigned long T = 1000000 / 33;
57 	short time_16, time_8;
58 	u32 addr;
59 
60 	if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) {
61 		printk(KERN_ERR DRV_NAME ": mome computation failed.\n");
62 		return;
63 	}
64 
65 	time_16 = clamp_val(t.recover - 1, 0, 15) |
66 		  (clamp_val(t.active - 1, 0, 15) << 4);
67 	time_8 = clamp_val(t.act8b - 1, 0, 15) |
68 		 (clamp_val(t.rec8b - 1, 0, 15) << 4);
69 
70 	if (adev->devno == 0) {
71 		pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
72 
73 		addr &= ~0x0F;	/* Mask bits */
74 		addr |= clamp_val(t.setup - 1, 0, 15);
75 
76 		pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
77 		pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16);
78 		pci_write_config_byte(pdev, CY82_IDE_MASTER_IOW, time_16);
79 		pci_write_config_byte(pdev, CY82_IDE_MASTER_8BIT, time_8);
80 	} else {
81 		pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
82 
83 		addr &= ~0xF0;	/* Mask bits */
84 		addr |= (clamp_val(t.setup - 1, 0, 15) << 4);
85 
86 		pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
87 		pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16);
88 		pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOW, time_16);
89 		pci_write_config_byte(pdev, CY82_IDE_SLAVE_8BIT, time_8);
90 	}
91 }
92 
93 /**
94  *	cy82c693_set_dmamode	-	set initial DMA mode data
95  *	@ap: ATA interface
96  *	@adev: ATA device
97  *
98  *	Called to do the DMA mode setup.
99  */
100 
cy82c693_set_dmamode(struct ata_port * ap,struct ata_device * adev)101 static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev)
102 {
103 	int reg = CY82_INDEX_CHANNEL0 + ap->port_no;
104 
105 	/* Be afraid, be very afraid. Magic registers  in low I/O space */
106 	outb(reg, 0x22);
107 	outb(adev->dma_mode - XFER_MW_DMA_0, 0x23);
108 
109 	/* 0x50 gives the best behaviour on the Alpha's using this chip */
110 	outb(CY82_INDEX_TIMEOUT, 0x22);
111 	outb(0x50, 0x23);
112 }
113 
114 static struct scsi_host_template cy82c693_sht = {
115 	ATA_BMDMA_SHT(DRV_NAME),
116 };
117 
118 static struct ata_port_operations cy82c693_port_ops = {
119 	.inherits	= &ata_bmdma_port_ops,
120 	.cable_detect	= ata_cable_40wire,
121 	.set_piomode	= cy82c693_set_piomode,
122 	.set_dmamode	= cy82c693_set_dmamode,
123 };
124 
cy82c693_init_one(struct pci_dev * pdev,const struct pci_device_id * id)125 static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
126 {
127 	static const struct ata_port_info info = {
128 		.flags = ATA_FLAG_SLAVE_POSS,
129 		.pio_mask = ATA_PIO4,
130 		.mwdma_mask = ATA_MWDMA2,
131 		.port_ops = &cy82c693_port_ops
132 	};
133 	const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
134 
135 	/* Devfn 1 is the ATA primary. The secondary is magic and on devfn2.
136 	   For the moment we don't handle the secondary. FIXME */
137 
138 	if (PCI_FUNC(pdev->devfn) != 1)
139 		return -ENODEV;
140 
141 	return ata_pci_bmdma_init_one(pdev, ppi, &cy82c693_sht, NULL, 0);
142 }
143 
144 static const struct pci_device_id cy82c693[] = {
145 	{ PCI_VDEVICE(CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693), },
146 
147 	{ },
148 };
149 
150 static struct pci_driver cy82c693_pci_driver = {
151 	.name 		= DRV_NAME,
152 	.id_table	= cy82c693,
153 	.probe 		= cy82c693_init_one,
154 	.remove		= ata_pci_remove_one,
155 #ifdef CONFIG_PM_SLEEP
156 	.suspend	= ata_pci_device_suspend,
157 	.resume		= ata_pci_device_resume,
158 #endif
159 };
160 
161 module_pci_driver(cy82c693_pci_driver);
162 
163 MODULE_AUTHOR("Alan Cox");
164 MODULE_DESCRIPTION("low-level driver for the CY82C693 PATA controller");
165 MODULE_LICENSE("GPL");
166 MODULE_DEVICE_TABLE(pci, cy82c693);
167 MODULE_VERSION(DRV_VERSION);
168