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1 # SPDX-License-Identifier: GPL-2.0
2 #
3 # Bus Devices
4 #
5 
6 menu "Bus devices"
7 
8 config ARM_CCI
9 	bool
10 
11 config ARM_CCI400_COMMON
12 	bool
13 	select ARM_CCI
14 
15 config ARM_CCI400_PORT_CTRL
16 	bool
17 	depends on ARM && OF && CPU_V7
18 	select ARM_CCI400_COMMON
19 	help
20 	  Low level power management driver for CCI400 cache coherent
21 	  interconnect for ARM platforms.
22 
23 config ARM_INTEGRATOR_LM
24 	bool "ARM Integrator Logic Module bus"
25 	depends on HAS_IOMEM
26 	depends on ARCH_INTEGRATOR || COMPILE_TEST
27 	default ARCH_INTEGRATOR
28 	help
29 	  Say y here to enable support for the ARM Logic Module bus
30 	  found on the ARM Integrator AP (Application Platform)
31 
32 config BRCMSTB_GISB_ARB
33 	bool "Broadcom STB GISB bus arbiter"
34 	depends on ARM || ARM64 || MIPS
35 	default ARCH_BRCMSTB || BMIPS_GENERIC
36 	help
37 	  Driver for the Broadcom Set Top Box System-on-a-chip internal bus
38 	  arbiter. This driver provides timeout and target abort error handling
39 	  and internal bus master decoding.
40 
41 config BT1_APB
42 	bool "Baikal-T1 APB-bus driver"
43 	depends on MIPS_BAIKAL_T1 || COMPILE_TEST
44 	select REGMAP_MMIO
45 	help
46 	  Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
47 	  IO requests are routed to this bus by means of the DW AMBA 3 AXI
48 	  Interconnect. In case of any APB protocol collisions, slave device
49 	  not responding on timeout an IRQ is raised with an erroneous address
50 	  reported to the APB terminator (APB Errors Handler Block). This
51 	  driver provides the interrupt handler to detect the erroneous
52 	  address, prints an error message about the address fault, updates an
53 	  errors counter. The counter and the APB-bus operations timeout can be
54 	  accessed via corresponding sysfs nodes.
55 
56 config BT1_AXI
57 	bool "Baikal-T1 AXI-bus driver"
58 	depends on MIPS_BAIKAL_T1 || COMPILE_TEST
59 	select MFD_SYSCON
60 	help
61 	  AXI3-bus is the main communication bus connecting all high-speed
62 	  peripheral IP-cores with RAM controller and with MIPS P5600 cores on
63 	  Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI
64 	  Interconnect (so called AXI Main Interconnect) routing IO requests
65 	  from one SoC block to another. This driver provides a way to detect
66 	  any bus protocol errors and device not responding situations by
67 	  means of an embedded on top of the interconnect errors handler
68 	  block (EHB). AXI Interconnect QoS arbitration tuning is currently
69 	  unsupported.
70 
71 config MOXTET
72 	tristate "CZ.NIC Turris Mox module configuration bus"
73 	depends on SPI_MASTER && OF
74 	help
75 	  Say yes here to add support for the module configuration bus found
76 	  on CZ.NIC's Turris Mox. This is needed for the ability to discover
77 	  the order in which the modules are connected and to get/set some of
78 	  their settings. For example the GPIOs on Mox SFP module are
79 	  configured through this bus.
80 
81 config HISILICON_LPC
82 	bool "Support for ISA I/O space on HiSilicon Hip06/7"
83 	depends on (ARM64 && ARCH_HISI) || (COMPILE_TEST && !ALPHA && !HEXAGON && !PARISC && !C6X)
84 	depends on HAS_IOMEM
85 	select INDIRECT_PIO if ARM64
86 	help
87 	  Driver to enable I/O access to devices attached to the Low Pin
88 	  Count bus on the HiSilicon Hip06/7 SoC.
89 
90 config IMX_WEIM
91 	bool "Freescale EIM DRIVER"
92 	depends on ARCH_MXC
93 	help
94 	  Driver for i.MX WEIM controller.
95 	  The WEIM(Wireless External Interface Module) works like a bus.
96 	  You can attach many different devices on it, such as NOR, onenand.
97 
98 config MIPS_CDMM
99 	bool "MIPS Common Device Memory Map (CDMM) Driver"
100 	depends on CPU_MIPSR2 || CPU_MIPSR5
101 	help
102 	  Driver needed for the MIPS Common Device Memory Map bus in MIPS
103 	  cores. This bus is for per-CPU tightly coupled devices such as the
104 	  Fast Debug Channel (FDC).
105 
106 	  For this to work, either your bootloader needs to enable the CDMM
107 	  region at an unused physical address on the boot CPU, or else your
108 	  platform code needs to implement mips_cdmm_phys_base() (see
109 	  asm/cdmm.h).
110 
111 config MVEBU_MBUS
112 	bool
113 	depends on PLAT_ORION
114 	help
115 	  Driver needed for the MBus configuration on Marvell EBU SoCs
116 	  (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
117 
118 config OMAP_INTERCONNECT
119 	tristate "OMAP INTERCONNECT DRIVER"
120 	depends on ARCH_OMAP2PLUS
121 
122 	help
123 	  Driver to enable OMAP interconnect error handling driver.
124 
125 config OMAP_OCP2SCP
126 	tristate "OMAP OCP2SCP DRIVER"
127 	depends on ARCH_OMAP2PLUS
128 	help
129 	  Driver to enable ocp2scp module which transforms ocp interface
130 	  protocol to scp protocol. In OMAP4, USB PHY is connected via
131 	  OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
132 	  OCP2SCP.
133 
134 config QCOM_EBI2
135 	bool "Qualcomm External Bus Interface 2 (EBI2)"
136 	depends on HAS_IOMEM
137 	depends on ARCH_QCOM || COMPILE_TEST
138 	default ARCH_QCOM
139 	help
140 	  Say y here to enable support for the Qualcomm External Bus
141 	  Interface 2, which can be used to connect things like NAND Flash,
142 	  SRAM, ethernet adapters, FPGAs and LCD displays.
143 
144 config SIMPLE_PM_BUS
145 	tristate "Simple Power-Managed Bus Driver"
146 	depends on OF && PM
147 	help
148 	  Driver for transparent busses that don't need a real driver, but
149 	  where the bus controller is part of a PM domain, or under the control
150 	  of a functional clock, and thus relies on runtime PM for managing
151 	  this PM domain and/or clock.
152 	  An example of such a bus controller is the Renesas Bus State
153 	  Controller (BSC, sometimes called "LBSC within Bus Bridge", or
154 	  "External Bus Interface") as found on several Renesas ARM SoCs.
155 
156 config SUN50I_DE2_BUS
157 	bool "Allwinner A64 DE2 Bus Driver"
158 	  default ARM64
159 	  depends on ARCH_SUNXI
160 	  select SUNXI_SRAM
161 	  help
162 	  Say y here to enable support for Allwinner A64 DE2 bus driver. It's
163 	  mostly transparent, but a SRAM region needs to be claimed in the SRAM
164 	  controller to make the all blocks in the DE2 part accessible.
165 
166 config SUNXI_RSB
167 	tristate "Allwinner sunXi Reduced Serial Bus Driver"
168 	  default MACH_SUN8I || MACH_SUN9I || ARM64
169 	  depends on ARCH_SUNXI
170 	  select REGMAP
171 	  help
172 	  Say y here to enable support for Allwinner's Reduced Serial Bus
173 	  (RSB) support. This controller is responsible for communicating
174 	  with various RSB based devices, such as AXP223, AXP8XX PMICs,
175 	  and AC100/AC200 ICs.
176 
177 config TEGRA_ACONNECT
178 	tristate "Tegra ACONNECT Bus Driver"
179 	depends on ARCH_TEGRA_210_SOC
180 	depends on OF && PM
181 	help
182 	  Driver for the Tegra ACONNECT bus which is used to interface with
183 	  the devices inside the Audio Processing Engine (APE) for Tegra210.
184 
185 config TEGRA_GMI
186 	tristate "Tegra Generic Memory Interface bus driver"
187 	depends on ARCH_TEGRA
188 	help
189 	  Driver for the Tegra Generic Memory Interface bus which can be used
190 	  to attach devices such as NOR, UART, FPGA and more.
191 
192 config  TI_PWMSS
193 	bool
194 	default y if (ARCH_OMAP2PLUS) && (PWM_TIECAP || PWM_TIEHRPWM || TI_EQEP)
195 	help
196 	  PWM Subsystem driver support for AM33xx SOC.
197 
198 	  PWM submodules require PWM config space access from submodule
199 	  drivers and require common parent driver support.
200 
201 config TI_SYSC
202 	bool "TI sysc interconnect target module driver"
203 	depends on ARCH_OMAP2PLUS
204 	help
205 	  Generic driver for Texas Instruments interconnect target module
206 	  found on many TI SoCs.
207 
208 config TS_NBUS
209 	tristate "Technologic Systems NBUS Driver"
210 	depends on SOC_IMX28
211 	depends on OF_GPIO && PWM
212 	help
213 	  Driver for the Technologic Systems NBUS which is used to interface
214 	  with the peripherals in the FPGA of the TS-4600 SoM.
215 
216 config UNIPHIER_SYSTEM_BUS
217 	tristate "UniPhier System Bus driver"
218 	depends on ARCH_UNIPHIER && OF
219 	default y
220 	help
221 	  Support for UniPhier System Bus, a simple external bus.  This is
222 	  needed to use on-board devices connected to UniPhier SoCs.
223 
224 config VEXPRESS_CONFIG
225 	tristate "Versatile Express configuration bus"
226 	default y if ARCH_VEXPRESS
227 	depends on ARM || ARM64
228 	depends on OF
229 	select REGMAP
230 	help
231 	  Platform configuration infrastructure for the ARM Ltd.
232 	  Versatile Express.
233 
234 config DA8XX_MSTPRI
235 	bool "TI da8xx master peripheral priority driver"
236 	depends on ARCH_DAVINCI_DA8XX
237 	help
238 	  Driver for Texas Instruments da8xx master peripheral priority
239 	  configuration. Allows to adjust the priorities of all master
240 	  peripherals.
241 
242 source "drivers/bus/fsl-mc/Kconfig"
243 source "drivers/bus/mhi/Kconfig"
244 
245 endmenu
246