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1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (C) 2016 BayLibre, SAS
4  * Author: Neil Armstrong <narmstrong@baylibre.com>
5  * Copyright (C) 2014 Endless Mobile
6  *
7  * Written by:
8  *     Jasper St. Pierre <jstpierre@mecheye.net>
9  */
10 
11 #include <linux/component.h>
12 #include <linux/module.h>
13 #include <linux/of_graph.h>
14 #include <linux/sys_soc.h>
15 #include <linux/platform_device.h>
16 #include <linux/soc/amlogic/meson-canvas.h>
17 
18 #include <drm/drm_atomic_helper.h>
19 #include <drm/drm_drv.h>
20 #include <drm/drm_fb_helper.h>
21 #include <drm/drm_gem_cma_helper.h>
22 #include <drm/drm_gem_framebuffer_helper.h>
23 #include <drm/drm_irq.h>
24 #include <drm/drm_modeset_helper_vtables.h>
25 #include <drm/drm_probe_helper.h>
26 #include <drm/drm_vblank.h>
27 
28 #include "meson_crtc.h"
29 #include "meson_drv.h"
30 #include "meson_overlay.h"
31 #include "meson_plane.h"
32 #include "meson_osd_afbcd.h"
33 #include "meson_registers.h"
34 #include "meson_venc_cvbs.h"
35 #include "meson_viu.h"
36 #include "meson_vpp.h"
37 #include "meson_rdma.h"
38 
39 #define DRIVER_NAME "meson"
40 #define DRIVER_DESC "Amlogic Meson DRM driver"
41 
42 /**
43  * DOC: Video Processing Unit
44  *
45  * VPU Handles the Global Video Processing, it includes management of the
46  * clocks gates, blocks reset lines and power domains.
47  *
48  * What is missing :
49  *
50  * - Full reset of entire video processing HW blocks
51  * - Scaling and setup of the VPU clock
52  * - Bus clock gates
53  * - Powering up video processing HW blocks
54  * - Powering Up HDMI controller and PHY
55  */
56 
57 static const struct drm_mode_config_funcs meson_mode_config_funcs = {
58 	.atomic_check        = drm_atomic_helper_check,
59 	.atomic_commit       = drm_atomic_helper_commit,
60 	.fb_create           = drm_gem_fb_create,
61 };
62 
63 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
64 	.atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
65 };
66 
meson_irq(int irq,void * arg)67 static irqreturn_t meson_irq(int irq, void *arg)
68 {
69 	struct drm_device *dev = arg;
70 	struct meson_drm *priv = dev->dev_private;
71 
72 	(void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
73 
74 	meson_crtc_irq(priv);
75 
76 	return IRQ_HANDLED;
77 }
78 
meson_dumb_create(struct drm_file * file,struct drm_device * dev,struct drm_mode_create_dumb * args)79 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev,
80 			     struct drm_mode_create_dumb *args)
81 {
82 	/*
83 	 * We need 64bytes aligned stride, and PAGE aligned size
84 	 */
85 	args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64);
86 	args->size = PAGE_ALIGN(args->pitch * args->height);
87 
88 	return drm_gem_cma_dumb_create_internal(file, dev, args);
89 }
90 
91 DEFINE_DRM_GEM_CMA_FOPS(fops);
92 
93 static struct drm_driver meson_driver = {
94 	.driver_features	= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
95 
96 	/* IRQ */
97 	.irq_handler		= meson_irq,
98 
99 	/* CMA Ops */
100 	DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(meson_dumb_create),
101 
102 	/* Misc */
103 	.fops			= &fops,
104 	.name			= DRIVER_NAME,
105 	.desc			= DRIVER_DESC,
106 	.date			= "20161109",
107 	.major			= 1,
108 	.minor			= 0,
109 };
110 
meson_vpu_has_available_connectors(struct device * dev)111 static bool meson_vpu_has_available_connectors(struct device *dev)
112 {
113 	struct device_node *ep, *remote;
114 
115 	/* Parses each endpoint and check if remote exists */
116 	for_each_endpoint_of_node(dev->of_node, ep) {
117 		/* If the endpoint node exists, consider it enabled */
118 		remote = of_graph_get_remote_port(ep);
119 		if (remote) {
120 			of_node_put(remote);
121 			of_node_put(ep);
122 			return true;
123 		}
124 	}
125 
126 	return false;
127 }
128 
129 static struct regmap_config meson_regmap_config = {
130 	.reg_bits       = 32,
131 	.val_bits       = 32,
132 	.reg_stride     = 4,
133 	.max_register   = 0x1000,
134 };
135 
meson_vpu_init(struct meson_drm * priv)136 static void meson_vpu_init(struct meson_drm *priv)
137 {
138 	u32 value;
139 
140 	/*
141 	 * Slave dc0 and dc5 connected to master port 1.
142 	 * By default other slaves are connected to master port 0.
143 	 */
144 	value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) |
145 		VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1);
146 	writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
147 
148 	/* Slave dc0 connected to master port 1 */
149 	value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1);
150 	writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
151 
152 	/* Slave dc4 and dc7 connected to master port 1 */
153 	value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) |
154 		VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1);
155 	writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
156 
157 	/* Slave dc1 connected to master port 1 */
158 	value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1);
159 	writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
160 }
161 
meson_remove_framebuffers(void)162 static void meson_remove_framebuffers(void)
163 {
164 	struct apertures_struct *ap;
165 
166 	ap = alloc_apertures(1);
167 	if (!ap)
168 		return;
169 
170 	/* The framebuffer can be located anywhere in RAM */
171 	ap->ranges[0].base = 0;
172 	ap->ranges[0].size = ~0;
173 
174 	drm_fb_helper_remove_conflicting_framebuffers(ap, "meson-drm-fb",
175 						      false);
176 	kfree(ap);
177 }
178 
179 struct meson_drm_soc_attr {
180 	struct meson_drm_soc_limits limits;
181 	const struct soc_device_attribute *attrs;
182 };
183 
184 static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
185 	/* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
186 	{
187 		.limits = {
188 			.max_hdmi_phy_freq = 1650000,
189 		},
190 		.attrs = (const struct soc_device_attribute []) {
191 			{ .soc_id = "GXL (S805*)", },
192 			{ /* sentinel */ },
193 		}
194 	},
195 };
196 
meson_drv_bind_master(struct device * dev,bool has_components)197 static int meson_drv_bind_master(struct device *dev, bool has_components)
198 {
199 	struct platform_device *pdev = to_platform_device(dev);
200 	const struct meson_drm_match_data *match;
201 	struct meson_drm *priv;
202 	struct drm_device *drm;
203 	struct resource *res;
204 	void __iomem *regs;
205 	int ret, i;
206 
207 	/* Checks if an output connector is available */
208 	if (!meson_vpu_has_available_connectors(dev)) {
209 		dev_err(dev, "No output connector available\n");
210 		return -ENODEV;
211 	}
212 
213 	match = of_device_get_match_data(dev);
214 	if (!match)
215 		return -ENODEV;
216 
217 	drm = drm_dev_alloc(&meson_driver, dev);
218 	if (IS_ERR(drm))
219 		return PTR_ERR(drm);
220 
221 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
222 	if (!priv) {
223 		ret = -ENOMEM;
224 		goto free_drm;
225 	}
226 	drm->dev_private = priv;
227 	priv->drm = drm;
228 	priv->dev = dev;
229 	priv->compat = match->compat;
230 	priv->afbcd.ops = match->afbcd_ops;
231 
232 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
233 	regs = devm_ioremap_resource(dev, res);
234 	if (IS_ERR(regs)) {
235 		ret = PTR_ERR(regs);
236 		goto free_drm;
237 	}
238 
239 	priv->io_base = regs;
240 
241 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
242 	if (!res) {
243 		ret = -EINVAL;
244 		goto free_drm;
245 	}
246 	/* Simply ioremap since it may be a shared register zone */
247 	regs = devm_ioremap(dev, res->start, resource_size(res));
248 	if (!regs) {
249 		ret = -EADDRNOTAVAIL;
250 		goto free_drm;
251 	}
252 
253 	priv->hhi = devm_regmap_init_mmio(dev, regs,
254 					  &meson_regmap_config);
255 	if (IS_ERR(priv->hhi)) {
256 		dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
257 		ret = PTR_ERR(priv->hhi);
258 		goto free_drm;
259 	}
260 
261 	priv->canvas = meson_canvas_get(dev);
262 	if (IS_ERR(priv->canvas)) {
263 		ret = PTR_ERR(priv->canvas);
264 		goto free_drm;
265 	}
266 
267 	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
268 	if (ret)
269 		goto free_drm;
270 	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
271 	if (ret) {
272 		meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
273 		goto free_drm;
274 	}
275 	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
276 	if (ret) {
277 		meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
278 		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
279 		goto free_drm;
280 	}
281 	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
282 	if (ret) {
283 		meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
284 		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
285 		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
286 		goto free_drm;
287 	}
288 
289 	priv->vsync_irq = platform_get_irq(pdev, 0);
290 
291 	ret = drm_vblank_init(drm, 1);
292 	if (ret)
293 		goto free_drm;
294 
295 	/* Assign limits per soc revision/package */
296 	for (i = 0 ; i < ARRAY_SIZE(meson_drm_soc_attrs) ; ++i) {
297 		if (soc_device_match(meson_drm_soc_attrs[i].attrs)) {
298 			priv->limits = &meson_drm_soc_attrs[i].limits;
299 			break;
300 		}
301 	}
302 
303 	/* Remove early framebuffers (ie. simplefb) */
304 	meson_remove_framebuffers();
305 
306 	ret = drmm_mode_config_init(drm);
307 	if (ret)
308 		goto free_drm;
309 	drm->mode_config.max_width = 3840;
310 	drm->mode_config.max_height = 2160;
311 	drm->mode_config.funcs = &meson_mode_config_funcs;
312 	drm->mode_config.helper_private	= &meson_mode_config_helpers;
313 
314 	/* Hardware Initialization */
315 
316 	meson_vpu_init(priv);
317 	meson_venc_init(priv);
318 	meson_vpp_init(priv);
319 	meson_viu_init(priv);
320 	if (priv->afbcd.ops) {
321 		ret = priv->afbcd.ops->init(priv);
322 		if (ret)
323 			goto free_drm;
324 	}
325 
326 	/* Encoder Initialization */
327 
328 	ret = meson_venc_cvbs_create(priv);
329 	if (ret)
330 		goto exit_afbcd;
331 
332 	if (has_components) {
333 		ret = component_bind_all(drm->dev, drm);
334 		if (ret) {
335 			dev_err(drm->dev, "Couldn't bind all components\n");
336 			goto exit_afbcd;
337 		}
338 	}
339 
340 	ret = meson_plane_create(priv);
341 	if (ret)
342 		goto unbind_all;
343 
344 	ret = meson_overlay_create(priv);
345 	if (ret)
346 		goto unbind_all;
347 
348 	ret = meson_crtc_create(priv);
349 	if (ret)
350 		goto unbind_all;
351 
352 	ret = drm_irq_install(drm, priv->vsync_irq);
353 	if (ret)
354 		goto unbind_all;
355 
356 	drm_mode_config_reset(drm);
357 
358 	drm_kms_helper_poll_init(drm);
359 
360 	platform_set_drvdata(pdev, priv);
361 
362 	ret = drm_dev_register(drm, 0);
363 	if (ret)
364 		goto uninstall_irq;
365 
366 	drm_fbdev_generic_setup(drm, 32);
367 
368 	return 0;
369 
370 uninstall_irq:
371 	drm_irq_uninstall(drm);
372 unbind_all:
373 	if (has_components)
374 		component_unbind_all(drm->dev, drm);
375 exit_afbcd:
376 	if (priv->afbcd.ops)
377 		priv->afbcd.ops->exit(priv);
378 free_drm:
379 	drm_dev_put(drm);
380 
381 	return ret;
382 }
383 
meson_drv_bind(struct device * dev)384 static int meson_drv_bind(struct device *dev)
385 {
386 	return meson_drv_bind_master(dev, true);
387 }
388 
meson_drv_unbind(struct device * dev)389 static void meson_drv_unbind(struct device *dev)
390 {
391 	struct meson_drm *priv = dev_get_drvdata(dev);
392 	struct drm_device *drm = priv->drm;
393 
394 	if (priv->canvas) {
395 		meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
396 		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
397 		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
398 		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
399 	}
400 
401 	drm_dev_unregister(drm);
402 	drm_kms_helper_poll_fini(drm);
403 	drm_atomic_helper_shutdown(drm);
404 	component_unbind_all(dev, drm);
405 	drm_irq_uninstall(drm);
406 	drm_dev_put(drm);
407 
408 	if (priv->afbcd.ops)
409 		priv->afbcd.ops->exit(priv);
410 }
411 
412 static const struct component_master_ops meson_drv_master_ops = {
413 	.bind	= meson_drv_bind,
414 	.unbind	= meson_drv_unbind,
415 };
416 
meson_drv_pm_suspend(struct device * dev)417 static int __maybe_unused meson_drv_pm_suspend(struct device *dev)
418 {
419 	struct meson_drm *priv = dev_get_drvdata(dev);
420 
421 	if (!priv)
422 		return 0;
423 
424 	return drm_mode_config_helper_suspend(priv->drm);
425 }
426 
meson_drv_pm_resume(struct device * dev)427 static int __maybe_unused meson_drv_pm_resume(struct device *dev)
428 {
429 	struct meson_drm *priv = dev_get_drvdata(dev);
430 
431 	if (!priv)
432 		return 0;
433 
434 	meson_vpu_init(priv);
435 	meson_venc_init(priv);
436 	meson_vpp_init(priv);
437 	meson_viu_init(priv);
438 	if (priv->afbcd.ops)
439 		priv->afbcd.ops->init(priv);
440 
441 	return drm_mode_config_helper_resume(priv->drm);
442 }
443 
compare_of(struct device * dev,void * data)444 static int compare_of(struct device *dev, void *data)
445 {
446 	DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
447 			 dev->of_node, data);
448 
449 	return dev->of_node == data;
450 }
451 
452 /* Possible connectors nodes to ignore */
453 static const struct of_device_id connectors_match[] = {
454 	{ .compatible = "composite-video-connector" },
455 	{ .compatible = "svideo-connector" },
456 	{ .compatible = "hdmi-connector" },
457 	{ .compatible = "dvi-connector" },
458 	{}
459 };
460 
meson_probe_remote(struct platform_device * pdev,struct component_match ** match,struct device_node * parent,struct device_node * remote)461 static int meson_probe_remote(struct platform_device *pdev,
462 			      struct component_match **match,
463 			      struct device_node *parent,
464 			      struct device_node *remote)
465 {
466 	struct device_node *ep, *remote_node;
467 	int count = 1;
468 
469 	/* If node is a connector, return and do not add to match table */
470 	if (of_match_node(connectors_match, remote))
471 		return 1;
472 
473 	component_match_add(&pdev->dev, match, compare_of, remote);
474 
475 	for_each_endpoint_of_node(remote, ep) {
476 		remote_node = of_graph_get_remote_port_parent(ep);
477 		if (!remote_node ||
478 		    remote_node == parent || /* Ignore parent endpoint */
479 		    !of_device_is_available(remote_node)) {
480 			of_node_put(remote_node);
481 			continue;
482 		}
483 
484 		count += meson_probe_remote(pdev, match, remote, remote_node);
485 
486 		of_node_put(remote_node);
487 	}
488 
489 	return count;
490 }
491 
meson_drv_shutdown(struct platform_device * pdev)492 static void meson_drv_shutdown(struct platform_device *pdev)
493 {
494 	struct meson_drm *priv = dev_get_drvdata(&pdev->dev);
495 
496 	if (!priv)
497 		return;
498 
499 	drm_kms_helper_poll_fini(priv->drm);
500 	drm_atomic_helper_shutdown(priv->drm);
501 }
502 
meson_drv_probe(struct platform_device * pdev)503 static int meson_drv_probe(struct platform_device *pdev)
504 {
505 	struct component_match *match = NULL;
506 	struct device_node *np = pdev->dev.of_node;
507 	struct device_node *ep, *remote;
508 	int count = 0;
509 
510 	for_each_endpoint_of_node(np, ep) {
511 		remote = of_graph_get_remote_port_parent(ep);
512 		if (!remote || !of_device_is_available(remote)) {
513 			of_node_put(remote);
514 			continue;
515 		}
516 
517 		count += meson_probe_remote(pdev, &match, np, remote);
518 		of_node_put(remote);
519 	}
520 
521 	if (count && !match)
522 		return meson_drv_bind_master(&pdev->dev, false);
523 
524 	/* If some endpoints were found, initialize the nodes */
525 	if (count) {
526 		dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
527 
528 		return component_master_add_with_match(&pdev->dev,
529 						       &meson_drv_master_ops,
530 						       match);
531 	}
532 
533 	/* If no output endpoints were available, simply bail out */
534 	return 0;
535 };
536 
meson_drv_remove(struct platform_device * pdev)537 static int meson_drv_remove(struct platform_device *pdev)
538 {
539 	component_master_del(&pdev->dev, &meson_drv_master_ops);
540 
541 	return 0;
542 }
543 
544 static struct meson_drm_match_data meson_drm_gxbb_data = {
545 	.compat = VPU_COMPATIBLE_GXBB,
546 };
547 
548 static struct meson_drm_match_data meson_drm_gxl_data = {
549 	.compat = VPU_COMPATIBLE_GXL,
550 };
551 
552 static struct meson_drm_match_data meson_drm_gxm_data = {
553 	.compat = VPU_COMPATIBLE_GXM,
554 	.afbcd_ops = &meson_afbcd_gxm_ops,
555 };
556 
557 static struct meson_drm_match_data meson_drm_g12a_data = {
558 	.compat = VPU_COMPATIBLE_G12A,
559 	.afbcd_ops = &meson_afbcd_g12a_ops,
560 };
561 
562 static const struct of_device_id dt_match[] = {
563 	{ .compatible = "amlogic,meson-gxbb-vpu",
564 	  .data       = (void *)&meson_drm_gxbb_data },
565 	{ .compatible = "amlogic,meson-gxl-vpu",
566 	  .data       = (void *)&meson_drm_gxl_data },
567 	{ .compatible = "amlogic,meson-gxm-vpu",
568 	  .data       = (void *)&meson_drm_gxm_data },
569 	{ .compatible = "amlogic,meson-g12a-vpu",
570 	  .data       = (void *)&meson_drm_g12a_data },
571 	{}
572 };
573 MODULE_DEVICE_TABLE(of, dt_match);
574 
575 static const struct dev_pm_ops meson_drv_pm_ops = {
576 	SET_SYSTEM_SLEEP_PM_OPS(meson_drv_pm_suspend, meson_drv_pm_resume)
577 };
578 
579 static struct platform_driver meson_drm_platform_driver = {
580 	.probe      = meson_drv_probe,
581 	.remove     = meson_drv_remove,
582 	.shutdown   = meson_drv_shutdown,
583 	.driver     = {
584 		.name	= "meson-drm",
585 		.of_match_table = dt_match,
586 		.pm = &meson_drv_pm_ops,
587 	},
588 };
589 
590 module_platform_driver(meson_drm_platform_driver);
591 
592 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
593 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
594 MODULE_DESCRIPTION(DRIVER_DESC);
595 MODULE_LICENSE("GPL");
596