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1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * AD7266/65 SPI ADC driver
4  *
5  * Copyright 2012 Analog Devices Inc.
6  */
7 
8 #include <linux/device.h>
9 #include <linux/kernel.h>
10 #include <linux/slab.h>
11 #include <linux/spi/spi.h>
12 #include <linux/regulator/consumer.h>
13 #include <linux/err.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/module.h>
16 
17 #include <linux/interrupt.h>
18 
19 #include <linux/iio/iio.h>
20 #include <linux/iio/buffer.h>
21 #include <linux/iio/trigger_consumer.h>
22 #include <linux/iio/triggered_buffer.h>
23 
24 #include <linux/platform_data/ad7266.h>
25 
26 struct ad7266_state {
27 	struct spi_device	*spi;
28 	struct regulator	*reg;
29 	unsigned long		vref_mv;
30 
31 	struct spi_transfer	single_xfer[3];
32 	struct spi_message	single_msg;
33 
34 	enum ad7266_range	range;
35 	enum ad7266_mode	mode;
36 	bool			fixed_addr;
37 	struct gpio_desc	*gpios[3];
38 
39 	/*
40 	 * DMA (thus cache coherency maintenance) requires the
41 	 * transfer buffers to live in their own cache lines.
42 	 * The buffer needs to be large enough to hold two samples (4 bytes) and
43 	 * the naturally aligned timestamp (8 bytes).
44 	 */
45 	struct {
46 		__be16 sample[2];
47 		s64 timestamp;
48 	} data ____cacheline_aligned;
49 };
50 
ad7266_wakeup(struct ad7266_state * st)51 static int ad7266_wakeup(struct ad7266_state *st)
52 {
53 	/* Any read with >= 2 bytes will wake the device */
54 	return spi_read(st->spi, &st->data.sample[0], 2);
55 }
56 
ad7266_powerdown(struct ad7266_state * st)57 static int ad7266_powerdown(struct ad7266_state *st)
58 {
59 	/* Any read with < 2 bytes will powerdown the device */
60 	return spi_read(st->spi, &st->data.sample[0], 1);
61 }
62 
ad7266_preenable(struct iio_dev * indio_dev)63 static int ad7266_preenable(struct iio_dev *indio_dev)
64 {
65 	struct ad7266_state *st = iio_priv(indio_dev);
66 	return ad7266_wakeup(st);
67 }
68 
ad7266_postdisable(struct iio_dev * indio_dev)69 static int ad7266_postdisable(struct iio_dev *indio_dev)
70 {
71 	struct ad7266_state *st = iio_priv(indio_dev);
72 	return ad7266_powerdown(st);
73 }
74 
75 static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = {
76 	.preenable = &ad7266_preenable,
77 	.postdisable = &ad7266_postdisable,
78 };
79 
ad7266_trigger_handler(int irq,void * p)80 static irqreturn_t ad7266_trigger_handler(int irq, void *p)
81 {
82 	struct iio_poll_func *pf = p;
83 	struct iio_dev *indio_dev = pf->indio_dev;
84 	struct ad7266_state *st = iio_priv(indio_dev);
85 	int ret;
86 
87 	ret = spi_read(st->spi, st->data.sample, 4);
88 	if (ret == 0) {
89 		iio_push_to_buffers_with_timestamp(indio_dev, &st->data,
90 			    pf->timestamp);
91 	}
92 
93 	iio_trigger_notify_done(indio_dev->trig);
94 
95 	return IRQ_HANDLED;
96 }
97 
ad7266_select_input(struct ad7266_state * st,unsigned int nr)98 static void ad7266_select_input(struct ad7266_state *st, unsigned int nr)
99 {
100 	unsigned int i;
101 
102 	if (st->fixed_addr)
103 		return;
104 
105 	switch (st->mode) {
106 	case AD7266_MODE_SINGLE_ENDED:
107 		nr >>= 1;
108 		break;
109 	case AD7266_MODE_PSEUDO_DIFF:
110 		nr |= 1;
111 		break;
112 	case AD7266_MODE_DIFF:
113 		nr &= ~1;
114 		break;
115 	}
116 
117 	for (i = 0; i < 3; ++i)
118 		gpiod_set_value(st->gpios[i], (bool)(nr & BIT(i)));
119 }
120 
ad7266_update_scan_mode(struct iio_dev * indio_dev,const unsigned long * scan_mask)121 static int ad7266_update_scan_mode(struct iio_dev *indio_dev,
122 	const unsigned long *scan_mask)
123 {
124 	struct ad7266_state *st = iio_priv(indio_dev);
125 	unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength);
126 
127 	ad7266_select_input(st, nr);
128 
129 	return 0;
130 }
131 
ad7266_read_single(struct ad7266_state * st,int * val,unsigned int address)132 static int ad7266_read_single(struct ad7266_state *st, int *val,
133 	unsigned int address)
134 {
135 	int ret;
136 
137 	ad7266_select_input(st, address);
138 
139 	ret = spi_sync(st->spi, &st->single_msg);
140 	*val = be16_to_cpu(st->data.sample[address % 2]);
141 
142 	return ret;
143 }
144 
ad7266_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)145 static int ad7266_read_raw(struct iio_dev *indio_dev,
146 	struct iio_chan_spec const *chan, int *val, int *val2, long m)
147 {
148 	struct ad7266_state *st = iio_priv(indio_dev);
149 	unsigned long scale_mv;
150 	int ret;
151 
152 	switch (m) {
153 	case IIO_CHAN_INFO_RAW:
154 		ret = iio_device_claim_direct_mode(indio_dev);
155 		if (ret)
156 			return ret;
157 		ret = ad7266_read_single(st, val, chan->address);
158 		iio_device_release_direct_mode(indio_dev);
159 
160 		*val = (*val >> 2) & 0xfff;
161 		if (chan->scan_type.sign == 's')
162 			*val = sign_extend32(*val, 11);
163 
164 		return IIO_VAL_INT;
165 	case IIO_CHAN_INFO_SCALE:
166 		scale_mv = st->vref_mv;
167 		if (st->mode == AD7266_MODE_DIFF)
168 			scale_mv *= 2;
169 		if (st->range == AD7266_RANGE_2VREF)
170 			scale_mv *= 2;
171 
172 		*val = scale_mv;
173 		*val2 = chan->scan_type.realbits;
174 		return IIO_VAL_FRACTIONAL_LOG2;
175 	case IIO_CHAN_INFO_OFFSET:
176 		if (st->range == AD7266_RANGE_2VREF &&
177 			st->mode != AD7266_MODE_DIFF)
178 			*val = 2048;
179 		else
180 			*val = 0;
181 		return IIO_VAL_INT;
182 	}
183 	return -EINVAL;
184 }
185 
186 #define AD7266_CHAN(_chan, _sign) {			\
187 	.type = IIO_VOLTAGE,				\
188 	.indexed = 1,					\
189 	.channel = (_chan),				\
190 	.address = (_chan),				\
191 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
192 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
193 		| BIT(IIO_CHAN_INFO_OFFSET),			\
194 	.scan_index = (_chan),				\
195 	.scan_type = {					\
196 		.sign = (_sign),			\
197 		.realbits = 12,				\
198 		.storagebits = 16,			\
199 		.shift = 2,				\
200 		.endianness = IIO_BE,			\
201 	},						\
202 }
203 
204 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \
205 const struct iio_chan_spec ad7266_channels_##_name[] = { \
206 	AD7266_CHAN(0, (_sign)), \
207 	AD7266_CHAN(1, (_sign)), \
208 	AD7266_CHAN(2, (_sign)), \
209 	AD7266_CHAN(3, (_sign)), \
210 	AD7266_CHAN(4, (_sign)), \
211 	AD7266_CHAN(5, (_sign)), \
212 	AD7266_CHAN(6, (_sign)), \
213 	AD7266_CHAN(7, (_sign)), \
214 	AD7266_CHAN(8, (_sign)), \
215 	AD7266_CHAN(9, (_sign)), \
216 	AD7266_CHAN(10, (_sign)), \
217 	AD7266_CHAN(11, (_sign)), \
218 	IIO_CHAN_SOFT_TIMESTAMP(13), \
219 }
220 
221 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \
222 const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \
223 	AD7266_CHAN(0, (_sign)), \
224 	AD7266_CHAN(1, (_sign)), \
225 	IIO_CHAN_SOFT_TIMESTAMP(2), \
226 }
227 
228 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u');
229 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's');
230 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u');
231 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's');
232 
233 #define AD7266_CHAN_DIFF(_chan, _sign) {			\
234 	.type = IIO_VOLTAGE,				\
235 	.indexed = 1,					\
236 	.channel = (_chan) * 2,				\
237 	.channel2 = (_chan) * 2 + 1,			\
238 	.address = (_chan),				\
239 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
240 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE)	\
241 		| BIT(IIO_CHAN_INFO_OFFSET),			\
242 	.scan_index = (_chan),				\
243 	.scan_type = {					\
244 		.sign = _sign,			\
245 		.realbits = 12,				\
246 		.storagebits = 16,			\
247 		.shift = 2,				\
248 		.endianness = IIO_BE,			\
249 	},						\
250 	.differential = 1,				\
251 }
252 
253 #define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \
254 const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \
255 	AD7266_CHAN_DIFF(0, (_sign)), \
256 	AD7266_CHAN_DIFF(1, (_sign)), \
257 	AD7266_CHAN_DIFF(2, (_sign)), \
258 	AD7266_CHAN_DIFF(3, (_sign)), \
259 	AD7266_CHAN_DIFF(4, (_sign)), \
260 	AD7266_CHAN_DIFF(5, (_sign)), \
261 	IIO_CHAN_SOFT_TIMESTAMP(6), \
262 }
263 
264 static AD7266_DECLARE_DIFF_CHANNELS(s, 's');
265 static AD7266_DECLARE_DIFF_CHANNELS(u, 'u');
266 
267 #define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \
268 const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \
269 	AD7266_CHAN_DIFF(0, (_sign)), \
270 	AD7266_CHAN_DIFF(1, (_sign)), \
271 	IIO_CHAN_SOFT_TIMESTAMP(2), \
272 }
273 
274 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's');
275 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
276 
277 static const struct iio_info ad7266_info = {
278 	.read_raw = &ad7266_read_raw,
279 	.update_scan_mode = &ad7266_update_scan_mode,
280 };
281 
282 static const unsigned long ad7266_available_scan_masks[] = {
283 	0x003,
284 	0x00c,
285 	0x030,
286 	0x0c0,
287 	0x300,
288 	0xc00,
289 	0x000,
290 };
291 
292 static const unsigned long ad7266_available_scan_masks_diff[] = {
293 	0x003,
294 	0x00c,
295 	0x030,
296 	0x000,
297 };
298 
299 static const unsigned long ad7266_available_scan_masks_fixed[] = {
300 	0x003,
301 	0x000,
302 };
303 
304 struct ad7266_chan_info {
305 	const struct iio_chan_spec *channels;
306 	unsigned int num_channels;
307 	const unsigned long *scan_masks;
308 };
309 
310 #define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \
311 	(((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0))
312 
313 static const struct ad7266_chan_info ad7266_chan_infos[] = {
314 	[AD7266_CHAN_INFO_INDEX(0, 0, 0)] = {
315 		.channels = ad7266_channels_u,
316 		.num_channels = ARRAY_SIZE(ad7266_channels_u),
317 		.scan_masks = ad7266_available_scan_masks,
318 	},
319 	[AD7266_CHAN_INFO_INDEX(0, 0, 1)] = {
320 		.channels = ad7266_channels_u_fixed,
321 		.num_channels = ARRAY_SIZE(ad7266_channels_u_fixed),
322 		.scan_masks = ad7266_available_scan_masks_fixed,
323 	},
324 	[AD7266_CHAN_INFO_INDEX(0, 1, 0)] = {
325 		.channels = ad7266_channels_s,
326 		.num_channels = ARRAY_SIZE(ad7266_channels_s),
327 		.scan_masks = ad7266_available_scan_masks,
328 	},
329 	[AD7266_CHAN_INFO_INDEX(0, 1, 1)] = {
330 		.channels = ad7266_channels_s_fixed,
331 		.num_channels = ARRAY_SIZE(ad7266_channels_s_fixed),
332 		.scan_masks = ad7266_available_scan_masks_fixed,
333 	},
334 	[AD7266_CHAN_INFO_INDEX(1, 0, 0)] = {
335 		.channels = ad7266_channels_diff_u,
336 		.num_channels = ARRAY_SIZE(ad7266_channels_diff_u),
337 		.scan_masks = ad7266_available_scan_masks_diff,
338 	},
339 	[AD7266_CHAN_INFO_INDEX(1, 0, 1)] = {
340 		.channels = ad7266_channels_diff_fixed_u,
341 		.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u),
342 		.scan_masks = ad7266_available_scan_masks_fixed,
343 	},
344 	[AD7266_CHAN_INFO_INDEX(1, 1, 0)] = {
345 		.channels = ad7266_channels_diff_s,
346 		.num_channels = ARRAY_SIZE(ad7266_channels_diff_s),
347 		.scan_masks = ad7266_available_scan_masks_diff,
348 	},
349 	[AD7266_CHAN_INFO_INDEX(1, 1, 1)] = {
350 		.channels = ad7266_channels_diff_fixed_s,
351 		.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s),
352 		.scan_masks = ad7266_available_scan_masks_fixed,
353 	},
354 };
355 
ad7266_init_channels(struct iio_dev * indio_dev)356 static void ad7266_init_channels(struct iio_dev *indio_dev)
357 {
358 	struct ad7266_state *st = iio_priv(indio_dev);
359 	bool is_differential, is_signed;
360 	const struct ad7266_chan_info *chan_info;
361 	int i;
362 
363 	is_differential = st->mode != AD7266_MODE_SINGLE_ENDED;
364 	is_signed = (st->range == AD7266_RANGE_2VREF) |
365 		    (st->mode == AD7266_MODE_DIFF);
366 
367 	i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr);
368 	chan_info = &ad7266_chan_infos[i];
369 
370 	indio_dev->channels = chan_info->channels;
371 	indio_dev->num_channels = chan_info->num_channels;
372 	indio_dev->available_scan_masks = chan_info->scan_masks;
373 	indio_dev->masklength = chan_info->num_channels - 1;
374 }
375 
376 static const char * const ad7266_gpio_labels[] = {
377 	"ad0", "ad1", "ad2",
378 };
379 
ad7266_probe(struct spi_device * spi)380 static int ad7266_probe(struct spi_device *spi)
381 {
382 	struct ad7266_platform_data *pdata = spi->dev.platform_data;
383 	struct iio_dev *indio_dev;
384 	struct ad7266_state *st;
385 	unsigned int i;
386 	int ret;
387 
388 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
389 	if (indio_dev == NULL)
390 		return -ENOMEM;
391 
392 	st = iio_priv(indio_dev);
393 
394 	st->reg = devm_regulator_get_optional(&spi->dev, "vref");
395 	if (!IS_ERR(st->reg)) {
396 		ret = regulator_enable(st->reg);
397 		if (ret)
398 			return ret;
399 
400 		ret = regulator_get_voltage(st->reg);
401 		if (ret < 0)
402 			goto error_disable_reg;
403 
404 		st->vref_mv = ret / 1000;
405 	} else {
406 		/* Any other error indicates that the regulator does exist */
407 		if (PTR_ERR(st->reg) != -ENODEV)
408 			return PTR_ERR(st->reg);
409 		/* Use internal reference */
410 		st->vref_mv = 2500;
411 	}
412 
413 	if (pdata) {
414 		st->fixed_addr = pdata->fixed_addr;
415 		st->mode = pdata->mode;
416 		st->range = pdata->range;
417 
418 		if (!st->fixed_addr) {
419 			for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) {
420 				st->gpios[i] = devm_gpiod_get(&spi->dev,
421 						      ad7266_gpio_labels[i],
422 						      GPIOD_OUT_LOW);
423 				if (IS_ERR(st->gpios[i])) {
424 					ret = PTR_ERR(st->gpios[i]);
425 					goto error_disable_reg;
426 				}
427 			}
428 		}
429 	} else {
430 		st->fixed_addr = true;
431 		st->range = AD7266_RANGE_VREF;
432 		st->mode = AD7266_MODE_DIFF;
433 	}
434 
435 	spi_set_drvdata(spi, indio_dev);
436 	st->spi = spi;
437 
438 	indio_dev->name = spi_get_device_id(spi)->name;
439 	indio_dev->modes = INDIO_DIRECT_MODE;
440 	indio_dev->info = &ad7266_info;
441 
442 	ad7266_init_channels(indio_dev);
443 
444 	/* wakeup */
445 	st->single_xfer[0].rx_buf = &st->data.sample[0];
446 	st->single_xfer[0].len = 2;
447 	st->single_xfer[0].cs_change = 1;
448 	/* conversion */
449 	st->single_xfer[1].rx_buf = st->data.sample;
450 	st->single_xfer[1].len = 4;
451 	st->single_xfer[1].cs_change = 1;
452 	/* powerdown */
453 	st->single_xfer[2].tx_buf = &st->data.sample[0];
454 	st->single_xfer[2].len = 1;
455 
456 	spi_message_init(&st->single_msg);
457 	spi_message_add_tail(&st->single_xfer[0], &st->single_msg);
458 	spi_message_add_tail(&st->single_xfer[1], &st->single_msg);
459 	spi_message_add_tail(&st->single_xfer[2], &st->single_msg);
460 
461 	ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
462 		&ad7266_trigger_handler, &iio_triggered_buffer_setup_ops);
463 	if (ret)
464 		goto error_disable_reg;
465 
466 	ret = iio_device_register(indio_dev);
467 	if (ret)
468 		goto error_buffer_cleanup;
469 
470 	return 0;
471 
472 error_buffer_cleanup:
473 	iio_triggered_buffer_cleanup(indio_dev);
474 error_disable_reg:
475 	if (!IS_ERR(st->reg))
476 		regulator_disable(st->reg);
477 
478 	return ret;
479 }
480 
ad7266_remove(struct spi_device * spi)481 static int ad7266_remove(struct spi_device *spi)
482 {
483 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
484 	struct ad7266_state *st = iio_priv(indio_dev);
485 
486 	iio_device_unregister(indio_dev);
487 	iio_triggered_buffer_cleanup(indio_dev);
488 	if (!IS_ERR(st->reg))
489 		regulator_disable(st->reg);
490 
491 	return 0;
492 }
493 
494 static const struct spi_device_id ad7266_id[] = {
495 	{"ad7265", 0},
496 	{"ad7266", 0},
497 	{ }
498 };
499 MODULE_DEVICE_TABLE(spi, ad7266_id);
500 
501 static struct spi_driver ad7266_driver = {
502 	.driver = {
503 		.name	= "ad7266",
504 	},
505 	.probe		= ad7266_probe,
506 	.remove		= ad7266_remove,
507 	.id_table	= ad7266_id,
508 };
509 module_spi_driver(ad7266_driver);
510 
511 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
512 MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC");
513 MODULE_LICENSE("GPL v2");
514