1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * sdricoh_cs.c - driver for Ricoh Secure Digital Card Readers that can be
4 * found on some Ricoh RL5c476 II cardbus bridge
5 *
6 * Copyright (C) 2006 - 2008 Sascha Sommer <saschasommer@freenet.de>
7 */
8
9 /*
10 #define DEBUG
11 #define VERBOSE_DEBUG
12 */
13 #include <linux/delay.h>
14 #include <linux/highmem.h>
15 #include <linux/module.h>
16 #include <linux/pci.h>
17 #include <linux/ioport.h>
18 #include <linux/iopoll.h>
19 #include <linux/scatterlist.h>
20
21 #include <pcmcia/cistpl.h>
22 #include <pcmcia/ds.h>
23 #include <linux/io.h>
24
25 #include <linux/mmc/host.h>
26 #include <linux/mmc/mmc.h>
27
28 #define DRIVER_NAME "sdricoh_cs"
29
30 static unsigned int switchlocked;
31
32 /* i/o region */
33 #define SDRICOH_PCI_REGION 0
34 #define SDRICOH_PCI_REGION_SIZE 0x1000
35
36 /* registers */
37 #define R104_VERSION 0x104
38 #define R200_CMD 0x200
39 #define R204_CMD_ARG 0x204
40 #define R208_DATAIO 0x208
41 #define R20C_RESP 0x20c
42 #define R21C_STATUS 0x21c
43 #define R2E0_INIT 0x2e0
44 #define R2E4_STATUS_RESP 0x2e4
45 #define R2F0_RESET 0x2f0
46 #define R224_MODE 0x224
47 #define R226_BLOCKSIZE 0x226
48 #define R228_POWER 0x228
49 #define R230_DATA 0x230
50
51 /* flags for the R21C_STATUS register */
52 #define STATUS_CMD_FINISHED 0x00000001
53 #define STATUS_TRANSFER_FINISHED 0x00000004
54 #define STATUS_CARD_INSERTED 0x00000020
55 #define STATUS_CARD_LOCKED 0x00000080
56 #define STATUS_CMD_TIMEOUT 0x00400000
57 #define STATUS_READY_TO_READ 0x01000000
58 #define STATUS_READY_TO_WRITE 0x02000000
59 #define STATUS_BUSY 0x40000000
60
61 /* timeouts */
62 #define SDRICOH_CMD_TIMEOUT_US 1000000
63 #define SDRICOH_DATA_TIMEOUT_US 1000000
64
65 /* list of supported pcmcia devices */
66 static const struct pcmcia_device_id pcmcia_ids[] = {
67 /* vendor and device strings followed by their crc32 hashes */
68 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay1Controller", 0xd9f522ed,
69 0xc3901202),
70 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay Controller", 0xd9f522ed,
71 0xace80909),
72 PCMCIA_DEVICE_NULL,
73 };
74
75 MODULE_DEVICE_TABLE(pcmcia, pcmcia_ids);
76
77 /* mmc privdata */
78 struct sdricoh_host {
79 struct device *dev;
80 struct mmc_host *mmc; /* MMC structure */
81 unsigned char __iomem *iobase;
82 struct pci_dev *pci_dev;
83 int app_cmd;
84 };
85
86 /***************** register i/o helper functions *****************************/
87
sdricoh_readl(struct sdricoh_host * host,unsigned int reg)88 static inline unsigned int sdricoh_readl(struct sdricoh_host *host,
89 unsigned int reg)
90 {
91 unsigned int value = readl(host->iobase + reg);
92 dev_vdbg(host->dev, "rl %x 0x%x\n", reg, value);
93 return value;
94 }
95
sdricoh_writel(struct sdricoh_host * host,unsigned int reg,unsigned int value)96 static inline void sdricoh_writel(struct sdricoh_host *host, unsigned int reg,
97 unsigned int value)
98 {
99 writel(value, host->iobase + reg);
100 dev_vdbg(host->dev, "wl %x 0x%x\n", reg, value);
101
102 }
103
sdricoh_readw(struct sdricoh_host * host,unsigned int reg)104 static inline unsigned int sdricoh_readw(struct sdricoh_host *host,
105 unsigned int reg)
106 {
107 unsigned int value = readw(host->iobase + reg);
108 dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
109 return value;
110 }
111
sdricoh_writew(struct sdricoh_host * host,unsigned int reg,unsigned short value)112 static inline void sdricoh_writew(struct sdricoh_host *host, unsigned int reg,
113 unsigned short value)
114 {
115 writew(value, host->iobase + reg);
116 dev_vdbg(host->dev, "ww %x 0x%x\n", reg, value);
117 }
118
sdricoh_readb(struct sdricoh_host * host,unsigned int reg)119 static inline unsigned int sdricoh_readb(struct sdricoh_host *host,
120 unsigned int reg)
121 {
122 unsigned int value = readb(host->iobase + reg);
123 dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
124 return value;
125 }
126
sdricoh_status_ok(struct sdricoh_host * host,unsigned int status,unsigned int wanted)127 static bool sdricoh_status_ok(struct sdricoh_host *host, unsigned int status,
128 unsigned int wanted)
129 {
130 sdricoh_writel(host, R2E4_STATUS_RESP, status);
131 return status & wanted;
132 }
133
sdricoh_query_status(struct sdricoh_host * host,unsigned int wanted)134 static int sdricoh_query_status(struct sdricoh_host *host, unsigned int wanted)
135 {
136 int ret;
137 unsigned int status = 0;
138 struct device *dev = host->dev;
139
140 ret = read_poll_timeout(sdricoh_readl, status,
141 sdricoh_status_ok(host, status, wanted),
142 32, SDRICOH_DATA_TIMEOUT_US, false,
143 host, R21C_STATUS);
144 if (ret) {
145 dev_err(dev, "query_status: timeout waiting for %x\n", wanted);
146 return -ETIMEDOUT;
147 }
148
149 /* do not do this check in the loop as some commands fail otherwise */
150 if (status & 0x7F0000) {
151 dev_err(dev, "waiting for status bit %x failed\n", wanted);
152 return -EINVAL;
153 }
154 return 0;
155
156 }
157
sdricoh_mmc_cmd(struct sdricoh_host * host,struct mmc_command * cmd)158 static int sdricoh_mmc_cmd(struct sdricoh_host *host, struct mmc_command *cmd)
159 {
160 unsigned int status, timeout_us;
161 int ret;
162 unsigned char opcode = cmd->opcode;
163
164 /* reset status reg? */
165 sdricoh_writel(host, R21C_STATUS, 0x18);
166
167 /* MMC_APP_CMDs need some special handling */
168 if (host->app_cmd) {
169 opcode |= 64;
170 host->app_cmd = 0;
171 } else if (opcode == MMC_APP_CMD)
172 host->app_cmd = 1;
173
174 /* fill parameters */
175 sdricoh_writel(host, R204_CMD_ARG, cmd->arg);
176 sdricoh_writel(host, R200_CMD, (0x10000 << 8) | opcode);
177
178 /* wait for command completion */
179 if (!opcode)
180 return 0;
181
182 timeout_us = cmd->busy_timeout ? cmd->busy_timeout * 1000 :
183 SDRICOH_CMD_TIMEOUT_US;
184
185 ret = read_poll_timeout(sdricoh_readl, status,
186 sdricoh_status_ok(host, status, STATUS_CMD_FINISHED),
187 32, timeout_us, false,
188 host, R21C_STATUS);
189
190 /*
191 * Don't check for timeout status in the loop, as it's not always reset
192 * correctly.
193 */
194 if (ret || status & STATUS_CMD_TIMEOUT)
195 return -ETIMEDOUT;
196
197 return 0;
198 }
199
sdricoh_reset(struct sdricoh_host * host)200 static int sdricoh_reset(struct sdricoh_host *host)
201 {
202 dev_dbg(host->dev, "reset\n");
203 sdricoh_writel(host, R2F0_RESET, 0x10001);
204 sdricoh_writel(host, R2E0_INIT, 0x10000);
205 if (sdricoh_readl(host, R2E0_INIT) != 0x10000)
206 return -EIO;
207 sdricoh_writel(host, R2E0_INIT, 0x10007);
208
209 sdricoh_writel(host, R224_MODE, 0x2000000);
210 sdricoh_writel(host, R228_POWER, 0xe0);
211
212
213 /* status register ? */
214 sdricoh_writel(host, R21C_STATUS, 0x18);
215
216 return 0;
217 }
218
sdricoh_blockio(struct sdricoh_host * host,int read,u8 * buf,int len)219 static int sdricoh_blockio(struct sdricoh_host *host, int read,
220 u8 *buf, int len)
221 {
222 int size;
223 u32 data = 0;
224 /* wait until the data is available */
225 if (read) {
226 if (sdricoh_query_status(host, STATUS_READY_TO_READ))
227 return -ETIMEDOUT;
228 sdricoh_writel(host, R21C_STATUS, 0x18);
229 /* read data */
230 while (len) {
231 data = sdricoh_readl(host, R230_DATA);
232 size = min(len, 4);
233 len -= size;
234 while (size) {
235 *buf = data & 0xFF;
236 buf++;
237 data >>= 8;
238 size--;
239 }
240 }
241 } else {
242 if (sdricoh_query_status(host, STATUS_READY_TO_WRITE))
243 return -ETIMEDOUT;
244 sdricoh_writel(host, R21C_STATUS, 0x18);
245 /* write data */
246 while (len) {
247 size = min(len, 4);
248 len -= size;
249 while (size) {
250 data >>= 8;
251 data |= (u32)*buf << 24;
252 buf++;
253 size--;
254 }
255 sdricoh_writel(host, R230_DATA, data);
256 }
257 }
258
259 return 0;
260 }
261
sdricoh_request(struct mmc_host * mmc,struct mmc_request * mrq)262 static void sdricoh_request(struct mmc_host *mmc, struct mmc_request *mrq)
263 {
264 struct sdricoh_host *host = mmc_priv(mmc);
265 struct mmc_command *cmd = mrq->cmd;
266 struct mmc_data *data = cmd->data;
267 struct device *dev = host->dev;
268 int i;
269
270 dev_dbg(dev, "=============================\n");
271 dev_dbg(dev, "sdricoh_request opcode=%i\n", cmd->opcode);
272
273 sdricoh_writel(host, R21C_STATUS, 0x18);
274
275 /* read/write commands seem to require this */
276 if (data) {
277 sdricoh_writew(host, R226_BLOCKSIZE, data->blksz);
278 sdricoh_writel(host, R208_DATAIO, 0);
279 }
280
281 cmd->error = sdricoh_mmc_cmd(host, cmd);
282
283 /* read response buffer */
284 if (cmd->flags & MMC_RSP_PRESENT) {
285 if (cmd->flags & MMC_RSP_136) {
286 /* CRC is stripped so we need to do some shifting. */
287 for (i = 0; i < 4; i++) {
288 cmd->resp[i] =
289 sdricoh_readl(host,
290 R20C_RESP + (3 - i) * 4) << 8;
291 if (i != 3)
292 cmd->resp[i] |=
293 sdricoh_readb(host, R20C_RESP +
294 (3 - i) * 4 - 1);
295 }
296 } else
297 cmd->resp[0] = sdricoh_readl(host, R20C_RESP);
298 }
299
300 /* transfer data */
301 if (data && cmd->error == 0) {
302 dev_dbg(dev, "transfer: blksz %i blocks %i sg_len %i "
303 "sg length %i\n", data->blksz, data->blocks,
304 data->sg_len, data->sg->length);
305
306 /* enter data reading mode */
307 sdricoh_writel(host, R21C_STATUS, 0x837f031e);
308 for (i = 0; i < data->blocks; i++) {
309 size_t len = data->blksz;
310 u8 *buf;
311 struct page *page;
312 int result;
313 page = sg_page(data->sg);
314
315 buf = kmap(page) + data->sg->offset + (len * i);
316 result =
317 sdricoh_blockio(host,
318 data->flags & MMC_DATA_READ, buf, len);
319 kunmap(page);
320 flush_dcache_page(page);
321 if (result) {
322 dev_err(dev, "sdricoh_request: cmd %i "
323 "block transfer failed\n", cmd->opcode);
324 cmd->error = result;
325 break;
326 } else
327 data->bytes_xfered += len;
328 }
329
330 sdricoh_writel(host, R208_DATAIO, 1);
331
332 if (sdricoh_query_status(host, STATUS_TRANSFER_FINISHED)) {
333 dev_err(dev, "sdricoh_request: transfer end error\n");
334 cmd->error = -EINVAL;
335 }
336 }
337 /* FIXME check busy flag */
338
339 mmc_request_done(mmc, mrq);
340 dev_dbg(dev, "=============================\n");
341 }
342
sdricoh_set_ios(struct mmc_host * mmc,struct mmc_ios * ios)343 static void sdricoh_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
344 {
345 struct sdricoh_host *host = mmc_priv(mmc);
346 dev_dbg(host->dev, "set_ios\n");
347
348 if (ios->power_mode == MMC_POWER_ON) {
349 sdricoh_writel(host, R228_POWER, 0xc0e0);
350
351 if (ios->bus_width == MMC_BUS_WIDTH_4) {
352 sdricoh_writel(host, R224_MODE, 0x2000300);
353 sdricoh_writel(host, R228_POWER, 0x40e0);
354 } else {
355 sdricoh_writel(host, R224_MODE, 0x2000340);
356 }
357
358 } else if (ios->power_mode == MMC_POWER_UP) {
359 sdricoh_writel(host, R224_MODE, 0x2000320);
360 sdricoh_writel(host, R228_POWER, 0xe0);
361 }
362 }
363
sdricoh_get_ro(struct mmc_host * mmc)364 static int sdricoh_get_ro(struct mmc_host *mmc)
365 {
366 struct sdricoh_host *host = mmc_priv(mmc);
367 unsigned int status;
368
369 status = sdricoh_readl(host, R21C_STATUS);
370 sdricoh_writel(host, R2E4_STATUS_RESP, status);
371
372 /* some notebooks seem to have the locked flag switched */
373 if (switchlocked)
374 return !(status & STATUS_CARD_LOCKED);
375
376 return (status & STATUS_CARD_LOCKED);
377 }
378
379 static const struct mmc_host_ops sdricoh_ops = {
380 .request = sdricoh_request,
381 .set_ios = sdricoh_set_ios,
382 .get_ro = sdricoh_get_ro,
383 };
384
385 /* initialize the control and register it to the mmc framework */
sdricoh_init_mmc(struct pci_dev * pci_dev,struct pcmcia_device * pcmcia_dev)386 static int sdricoh_init_mmc(struct pci_dev *pci_dev,
387 struct pcmcia_device *pcmcia_dev)
388 {
389 int result;
390 void __iomem *iobase;
391 struct mmc_host *mmc;
392 struct sdricoh_host *host;
393 struct device *dev = &pcmcia_dev->dev;
394 /* map iomem */
395 if (pci_resource_len(pci_dev, SDRICOH_PCI_REGION) !=
396 SDRICOH_PCI_REGION_SIZE) {
397 dev_dbg(dev, "unexpected pci resource len\n");
398 return -ENODEV;
399 }
400 iobase =
401 pci_iomap(pci_dev, SDRICOH_PCI_REGION, SDRICOH_PCI_REGION_SIZE);
402 if (!iobase) {
403 dev_err(dev, "unable to map iobase\n");
404 return -ENODEV;
405 }
406 /* check version? */
407 if (readl(iobase + R104_VERSION) != 0x4000) {
408 dev_dbg(dev, "no supported mmc controller found\n");
409 result = -ENODEV;
410 goto unmap_io;
411 }
412 /* allocate privdata */
413 mmc = pcmcia_dev->priv =
414 mmc_alloc_host(sizeof(struct sdricoh_host), &pcmcia_dev->dev);
415 if (!mmc) {
416 dev_err(dev, "mmc_alloc_host failed\n");
417 result = -ENOMEM;
418 goto unmap_io;
419 }
420 host = mmc_priv(mmc);
421
422 host->iobase = iobase;
423 host->dev = dev;
424 host->pci_dev = pci_dev;
425
426 mmc->ops = &sdricoh_ops;
427
428 /* FIXME: frequency and voltage handling is done by the controller
429 */
430 mmc->f_min = 450000;
431 mmc->f_max = 24000000;
432 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
433 mmc->caps |= MMC_CAP_4_BIT_DATA;
434
435 mmc->max_seg_size = 1024 * 512;
436 mmc->max_blk_size = 512;
437
438 /* reset the controller */
439 if (sdricoh_reset(host)) {
440 dev_dbg(dev, "could not reset\n");
441 result = -EIO;
442 goto free_host;
443 }
444
445 result = mmc_add_host(mmc);
446
447 if (!result) {
448 dev_dbg(dev, "mmc host registered\n");
449 return 0;
450 }
451 free_host:
452 mmc_free_host(mmc);
453 unmap_io:
454 pci_iounmap(pci_dev, iobase);
455 return result;
456 }
457
458 /* search for supported mmc controllers */
sdricoh_pcmcia_probe(struct pcmcia_device * pcmcia_dev)459 static int sdricoh_pcmcia_probe(struct pcmcia_device *pcmcia_dev)
460 {
461 struct pci_dev *pci_dev = NULL;
462
463 dev_info(&pcmcia_dev->dev, "Searching MMC controller for pcmcia device"
464 " %s %s ...\n", pcmcia_dev->prod_id[0], pcmcia_dev->prod_id[1]);
465
466 /* search pci cardbus bridge that contains the mmc controller */
467 /* the io region is already claimed by yenta_socket... */
468 while ((pci_dev =
469 pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476,
470 pci_dev))) {
471 /* try to init the device */
472 if (!sdricoh_init_mmc(pci_dev, pcmcia_dev)) {
473 dev_info(&pcmcia_dev->dev, "MMC controller found\n");
474 return 0;
475 }
476
477 }
478 dev_err(&pcmcia_dev->dev, "No MMC controller was found.\n");
479 return -ENODEV;
480 }
481
sdricoh_pcmcia_detach(struct pcmcia_device * link)482 static void sdricoh_pcmcia_detach(struct pcmcia_device *link)
483 {
484 struct mmc_host *mmc = link->priv;
485
486 dev_dbg(&link->dev, "detach\n");
487
488 /* remove mmc host */
489 if (mmc) {
490 struct sdricoh_host *host = mmc_priv(mmc);
491 mmc_remove_host(mmc);
492 pci_iounmap(host->pci_dev, host->iobase);
493 pci_dev_put(host->pci_dev);
494 mmc_free_host(mmc);
495 }
496 pcmcia_disable_device(link);
497
498 }
499
500 #ifdef CONFIG_PM
sdricoh_pcmcia_suspend(struct pcmcia_device * link)501 static int sdricoh_pcmcia_suspend(struct pcmcia_device *link)
502 {
503 dev_dbg(&link->dev, "suspend\n");
504 return 0;
505 }
506
sdricoh_pcmcia_resume(struct pcmcia_device * link)507 static int sdricoh_pcmcia_resume(struct pcmcia_device *link)
508 {
509 struct mmc_host *mmc = link->priv;
510 dev_dbg(&link->dev, "resume\n");
511 sdricoh_reset(mmc_priv(mmc));
512 return 0;
513 }
514 #else
515 #define sdricoh_pcmcia_suspend NULL
516 #define sdricoh_pcmcia_resume NULL
517 #endif
518
519 static struct pcmcia_driver sdricoh_driver = {
520 .name = DRIVER_NAME,
521 .probe = sdricoh_pcmcia_probe,
522 .remove = sdricoh_pcmcia_detach,
523 .id_table = pcmcia_ids,
524 .suspend = sdricoh_pcmcia_suspend,
525 .resume = sdricoh_pcmcia_resume,
526 };
527 module_pcmcia_driver(sdricoh_driver);
528
529 module_param(switchlocked, uint, 0444);
530
531 MODULE_AUTHOR("Sascha Sommer <saschasommer@freenet.de>");
532 MODULE_DESCRIPTION("Ricoh PCMCIA Secure Digital Interface driver");
533 MODULE_LICENSE("GPL");
534
535 MODULE_PARM_DESC(switchlocked, "Switch the cards locked status."
536 "Use this when unlocked cards are shown readonly (default 0)");
537