1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 /* QLogic qede NIC Driver
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
5 */
6
7 #include <linux/version.h>
8 #include <linux/types.h>
9 #include <linux/netdevice.h>
10 #include <linux/etherdevice.h>
11 #include <linux/ethtool.h>
12 #include <linux/string.h>
13 #include <linux/pci.h>
14 #include <linux/capability.h>
15 #include <linux/vmalloc.h>
16 #include <linux/phylink.h>
17
18 #include "qede.h"
19 #include "qede_ptp.h"
20
21 #define QEDE_RQSTAT_OFFSET(stat_name) \
22 (offsetof(struct qede_rx_queue, stat_name))
23 #define QEDE_RQSTAT_STRING(stat_name) (#stat_name)
24 #define QEDE_RQSTAT(stat_name) \
25 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)}
26
27 #define QEDE_SELFTEST_POLL_COUNT 100
28 #define QEDE_DUMP_VERSION 0x1
29 #define QEDE_DUMP_NVM_ARG_COUNT 2
30
31 static const struct {
32 u64 offset;
33 char string[ETH_GSTRING_LEN];
34 } qede_rqstats_arr[] = {
35 QEDE_RQSTAT(rcv_pkts),
36 QEDE_RQSTAT(rx_hw_errors),
37 QEDE_RQSTAT(rx_alloc_errors),
38 QEDE_RQSTAT(rx_ip_frags),
39 QEDE_RQSTAT(xdp_no_pass),
40 };
41
42 #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr)
43 #define QEDE_TQSTAT_OFFSET(stat_name) \
44 (offsetof(struct qede_tx_queue, stat_name))
45 #define QEDE_TQSTAT_STRING(stat_name) (#stat_name)
46 #define QEDE_TQSTAT(stat_name) \
47 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)}
48 #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr)
49 static const struct {
50 u64 offset;
51 char string[ETH_GSTRING_LEN];
52 } qede_tqstats_arr[] = {
53 QEDE_TQSTAT(xmit_pkts),
54 QEDE_TQSTAT(stopped_cnt),
55 QEDE_TQSTAT(tx_mem_alloc_err),
56 };
57
58 #define QEDE_STAT_OFFSET(stat_name, type, base) \
59 (offsetof(type, stat_name) + (base))
60 #define QEDE_STAT_STRING(stat_name) (#stat_name)
61 #define _QEDE_STAT(stat_name, type, base, attr) \
62 {QEDE_STAT_OFFSET(stat_name, type, base), \
63 QEDE_STAT_STRING(stat_name), \
64 attr}
65 #define QEDE_STAT(stat_name) \
66 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0)
67 #define QEDE_PF_STAT(stat_name) \
68 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \
69 BIT(QEDE_STAT_PF_ONLY))
70 #define QEDE_PF_BB_STAT(stat_name) \
71 _QEDE_STAT(stat_name, struct qede_stats_bb, \
72 offsetof(struct qede_stats, bb), \
73 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY))
74 #define QEDE_PF_AH_STAT(stat_name) \
75 _QEDE_STAT(stat_name, struct qede_stats_ah, \
76 offsetof(struct qede_stats, ah), \
77 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY))
78 static const struct {
79 u64 offset;
80 char string[ETH_GSTRING_LEN];
81 unsigned long attr;
82 #define QEDE_STAT_PF_ONLY 0
83 #define QEDE_STAT_BB_ONLY 1
84 #define QEDE_STAT_AH_ONLY 2
85 } qede_stats_arr[] = {
86 QEDE_STAT(rx_ucast_bytes),
87 QEDE_STAT(rx_mcast_bytes),
88 QEDE_STAT(rx_bcast_bytes),
89 QEDE_STAT(rx_ucast_pkts),
90 QEDE_STAT(rx_mcast_pkts),
91 QEDE_STAT(rx_bcast_pkts),
92
93 QEDE_STAT(tx_ucast_bytes),
94 QEDE_STAT(tx_mcast_bytes),
95 QEDE_STAT(tx_bcast_bytes),
96 QEDE_STAT(tx_ucast_pkts),
97 QEDE_STAT(tx_mcast_pkts),
98 QEDE_STAT(tx_bcast_pkts),
99
100 QEDE_PF_STAT(rx_64_byte_packets),
101 QEDE_PF_STAT(rx_65_to_127_byte_packets),
102 QEDE_PF_STAT(rx_128_to_255_byte_packets),
103 QEDE_PF_STAT(rx_256_to_511_byte_packets),
104 QEDE_PF_STAT(rx_512_to_1023_byte_packets),
105 QEDE_PF_STAT(rx_1024_to_1518_byte_packets),
106 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets),
107 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets),
108 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets),
109 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets),
110 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets),
111 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets),
112 QEDE_PF_STAT(tx_64_byte_packets),
113 QEDE_PF_STAT(tx_65_to_127_byte_packets),
114 QEDE_PF_STAT(tx_128_to_255_byte_packets),
115 QEDE_PF_STAT(tx_256_to_511_byte_packets),
116 QEDE_PF_STAT(tx_512_to_1023_byte_packets),
117 QEDE_PF_STAT(tx_1024_to_1518_byte_packets),
118 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets),
119 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets),
120 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets),
121 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets),
122 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets),
123 QEDE_PF_STAT(rx_mac_crtl_frames),
124 QEDE_PF_STAT(tx_mac_ctrl_frames),
125 QEDE_PF_STAT(rx_pause_frames),
126 QEDE_PF_STAT(tx_pause_frames),
127 QEDE_PF_STAT(rx_pfc_frames),
128 QEDE_PF_STAT(tx_pfc_frames),
129
130 QEDE_PF_STAT(rx_crc_errors),
131 QEDE_PF_STAT(rx_align_errors),
132 QEDE_PF_STAT(rx_carrier_errors),
133 QEDE_PF_STAT(rx_oversize_packets),
134 QEDE_PF_STAT(rx_jabbers),
135 QEDE_PF_STAT(rx_undersize_packets),
136 QEDE_PF_STAT(rx_fragments),
137 QEDE_PF_BB_STAT(tx_lpi_entry_count),
138 QEDE_PF_BB_STAT(tx_total_collisions),
139 QEDE_PF_STAT(brb_truncates),
140 QEDE_PF_STAT(brb_discards),
141 QEDE_STAT(no_buff_discards),
142 QEDE_PF_STAT(mftag_filter_discards),
143 QEDE_PF_STAT(mac_filter_discards),
144 QEDE_PF_STAT(gft_filter_drop),
145 QEDE_STAT(tx_err_drop_pkts),
146 QEDE_STAT(ttl0_discard),
147 QEDE_STAT(packet_too_big_discard),
148
149 QEDE_STAT(coalesced_pkts),
150 QEDE_STAT(coalesced_events),
151 QEDE_STAT(coalesced_aborts_num),
152 QEDE_STAT(non_coalesced_pkts),
153 QEDE_STAT(coalesced_bytes),
154
155 QEDE_STAT(link_change_count),
156 QEDE_STAT(ptp_skip_txts),
157 };
158
159 #define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr)
160 #define QEDE_STAT_IS_PF_ONLY(i) \
161 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr)
162 #define QEDE_STAT_IS_BB_ONLY(i) \
163 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr)
164 #define QEDE_STAT_IS_AH_ONLY(i) \
165 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr)
166
167 enum {
168 QEDE_PRI_FLAG_CMT,
169 QEDE_PRI_FLAG_SMART_AN_SUPPORT, /* MFW supports SmartAN */
170 QEDE_PRI_FLAG_RECOVER_ON_ERROR,
171 QEDE_PRI_FLAG_LEN,
172 };
173
174 static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = {
175 "Coupled-Function",
176 "SmartAN capable",
177 "Recover on error",
178 };
179
180 enum qede_ethtool_tests {
181 QEDE_ETHTOOL_INT_LOOPBACK,
182 QEDE_ETHTOOL_INTERRUPT_TEST,
183 QEDE_ETHTOOL_MEMORY_TEST,
184 QEDE_ETHTOOL_REGISTER_TEST,
185 QEDE_ETHTOOL_CLOCK_TEST,
186 QEDE_ETHTOOL_NVRAM_TEST,
187 QEDE_ETHTOOL_TEST_MAX
188 };
189
190 static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
191 "Internal loopback (offline)",
192 "Interrupt (online)\t",
193 "Memory (online)\t\t",
194 "Register (online)\t",
195 "Clock (online)\t\t",
196 "Nvram (online)\t\t",
197 };
198
199 /* Forced speed capabilities maps */
200
201 struct qede_forced_speed_map {
202 u32 speed;
203 __ETHTOOL_DECLARE_LINK_MODE_MASK(caps);
204
205 const u32 *cap_arr;
206 u32 arr_size;
207 };
208
209 #define QEDE_FORCED_SPEED_MAP(value) \
210 { \
211 .speed = SPEED_##value, \
212 .cap_arr = qede_forced_speed_##value, \
213 .arr_size = ARRAY_SIZE(qede_forced_speed_##value), \
214 }
215
216 static const u32 qede_forced_speed_1000[] __initconst = {
217 ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
218 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
219 ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
220 };
221
222 static const u32 qede_forced_speed_10000[] __initconst = {
223 ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
224 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
225 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
226 ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
227 ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
228 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
229 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
230 ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT,
231 };
232
233 static const u32 qede_forced_speed_20000[] __initconst = {
234 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
235 };
236
237 static const u32 qede_forced_speed_25000[] __initconst = {
238 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
239 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
240 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
241 };
242
243 static const u32 qede_forced_speed_40000[] __initconst = {
244 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
245 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
246 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
247 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
248 };
249
250 static const u32 qede_forced_speed_50000[] __initconst = {
251 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
252 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
253 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
254 };
255
256 static const u32 qede_forced_speed_100000[] __initconst = {
257 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
258 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
259 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
260 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
261 };
262
263 static struct qede_forced_speed_map qede_forced_speed_maps[] __ro_after_init = {
264 QEDE_FORCED_SPEED_MAP(1000),
265 QEDE_FORCED_SPEED_MAP(10000),
266 QEDE_FORCED_SPEED_MAP(20000),
267 QEDE_FORCED_SPEED_MAP(25000),
268 QEDE_FORCED_SPEED_MAP(40000),
269 QEDE_FORCED_SPEED_MAP(50000),
270 QEDE_FORCED_SPEED_MAP(100000),
271 };
272
qede_forced_speed_maps_init(void)273 void __init qede_forced_speed_maps_init(void)
274 {
275 struct qede_forced_speed_map *map;
276 u32 i;
277
278 for (i = 0; i < ARRAY_SIZE(qede_forced_speed_maps); i++) {
279 map = qede_forced_speed_maps + i;
280
281 linkmode_set_bit_array(map->cap_arr, map->arr_size, map->caps);
282 map->cap_arr = NULL;
283 map->arr_size = 0;
284 }
285 }
286
287 /* Ethtool callbacks */
288
qede_get_strings_stats_txq(struct qede_dev * edev,struct qede_tx_queue * txq,u8 ** buf)289 static void qede_get_strings_stats_txq(struct qede_dev *edev,
290 struct qede_tx_queue *txq, u8 **buf)
291 {
292 int i;
293
294 for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
295 if (txq->is_xdp)
296 sprintf(*buf, "%d [XDP]: %s",
297 QEDE_TXQ_XDP_TO_IDX(edev, txq),
298 qede_tqstats_arr[i].string);
299 else
300 sprintf(*buf, "%d_%d: %s", txq->index, txq->cos,
301 qede_tqstats_arr[i].string);
302 *buf += ETH_GSTRING_LEN;
303 }
304 }
305
qede_get_strings_stats_rxq(struct qede_dev * edev,struct qede_rx_queue * rxq,u8 ** buf)306 static void qede_get_strings_stats_rxq(struct qede_dev *edev,
307 struct qede_rx_queue *rxq, u8 **buf)
308 {
309 int i;
310
311 for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
312 sprintf(*buf, "%d: %s", rxq->rxq_id,
313 qede_rqstats_arr[i].string);
314 *buf += ETH_GSTRING_LEN;
315 }
316 }
317
qede_is_irrelevant_stat(struct qede_dev * edev,int stat_index)318 static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index)
319 {
320 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) ||
321 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) ||
322 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index));
323 }
324
qede_get_strings_stats(struct qede_dev * edev,u8 * buf)325 static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
326 {
327 struct qede_fastpath *fp;
328 int i;
329
330 /* Account for queue statistics */
331 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
332 fp = &edev->fp_array[i];
333
334 if (fp->type & QEDE_FASTPATH_RX)
335 qede_get_strings_stats_rxq(edev, fp->rxq, &buf);
336
337 if (fp->type & QEDE_FASTPATH_XDP)
338 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf);
339
340 if (fp->type & QEDE_FASTPATH_TX) {
341 int cos;
342
343 for_each_cos_in_txq(edev, cos)
344 qede_get_strings_stats_txq(edev,
345 &fp->txq[cos], &buf);
346 }
347 }
348
349 /* Account for non-queue statistics */
350 for (i = 0; i < QEDE_NUM_STATS; i++) {
351 if (qede_is_irrelevant_stat(edev, i))
352 continue;
353 strcpy(buf, qede_stats_arr[i].string);
354 buf += ETH_GSTRING_LEN;
355 }
356 }
357
qede_get_strings(struct net_device * dev,u32 stringset,u8 * buf)358 static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
359 {
360 struct qede_dev *edev = netdev_priv(dev);
361
362 switch (stringset) {
363 case ETH_SS_STATS:
364 qede_get_strings_stats(edev, buf);
365 break;
366 case ETH_SS_PRIV_FLAGS:
367 memcpy(buf, qede_private_arr,
368 ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN);
369 break;
370 case ETH_SS_TEST:
371 memcpy(buf, qede_tests_str_arr,
372 ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX);
373 break;
374 default:
375 DP_VERBOSE(edev, QED_MSG_DEBUG,
376 "Unsupported stringset 0x%08x\n", stringset);
377 }
378 }
379
qede_get_ethtool_stats_txq(struct qede_tx_queue * txq,u64 ** buf)380 static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf)
381 {
382 int i;
383
384 for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
385 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset));
386 (*buf)++;
387 }
388 }
389
qede_get_ethtool_stats_rxq(struct qede_rx_queue * rxq,u64 ** buf)390 static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf)
391 {
392 int i;
393
394 for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
395 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset));
396 (*buf)++;
397 }
398 }
399
qede_get_ethtool_stats(struct net_device * dev,struct ethtool_stats * stats,u64 * buf)400 static void qede_get_ethtool_stats(struct net_device *dev,
401 struct ethtool_stats *stats, u64 *buf)
402 {
403 struct qede_dev *edev = netdev_priv(dev);
404 struct qede_fastpath *fp;
405 int i;
406
407 qede_fill_by_demand_stats(edev);
408
409 /* Need to protect the access to the fastpath array */
410 __qede_lock(edev);
411
412 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
413 fp = &edev->fp_array[i];
414
415 if (fp->type & QEDE_FASTPATH_RX)
416 qede_get_ethtool_stats_rxq(fp->rxq, &buf);
417
418 if (fp->type & QEDE_FASTPATH_XDP)
419 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf);
420
421 if (fp->type & QEDE_FASTPATH_TX) {
422 int cos;
423
424 for_each_cos_in_txq(edev, cos)
425 qede_get_ethtool_stats_txq(&fp->txq[cos], &buf);
426 }
427 }
428
429 spin_lock(&edev->stats_lock);
430
431 for (i = 0; i < QEDE_NUM_STATS; i++) {
432 if (qede_is_irrelevant_stat(edev, i))
433 continue;
434 *buf = *((u64 *)(((void *)&edev->stats) +
435 qede_stats_arr[i].offset));
436
437 buf++;
438 }
439
440 spin_unlock(&edev->stats_lock);
441
442 __qede_unlock(edev);
443 }
444
qede_get_sset_count(struct net_device * dev,int stringset)445 static int qede_get_sset_count(struct net_device *dev, int stringset)
446 {
447 struct qede_dev *edev = netdev_priv(dev);
448 int num_stats = QEDE_NUM_STATS, i;
449
450 switch (stringset) {
451 case ETH_SS_STATS:
452 for (i = 0; i < QEDE_NUM_STATS; i++)
453 if (qede_is_irrelevant_stat(edev, i))
454 num_stats--;
455
456 /* Account for the Regular Tx statistics */
457 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS *
458 edev->dev_info.num_tc;
459
460 /* Account for the Regular Rx statistics */
461 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS;
462
463 /* Account for XDP statistics [if needed] */
464 if (edev->xdp_prog)
465 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS;
466 return num_stats;
467
468 case ETH_SS_PRIV_FLAGS:
469 return QEDE_PRI_FLAG_LEN;
470 case ETH_SS_TEST:
471 if (!IS_VF(edev))
472 return QEDE_ETHTOOL_TEST_MAX;
473 else
474 return 0;
475 default:
476 DP_VERBOSE(edev, QED_MSG_DEBUG,
477 "Unsupported stringset 0x%08x\n", stringset);
478 return -EINVAL;
479 }
480 }
481
qede_get_priv_flags(struct net_device * dev)482 static u32 qede_get_priv_flags(struct net_device *dev)
483 {
484 struct qede_dev *edev = netdev_priv(dev);
485 u32 flags = 0;
486
487 if (edev->dev_info.common.num_hwfns > 1)
488 flags |= BIT(QEDE_PRI_FLAG_CMT);
489
490 if (edev->dev_info.common.smart_an)
491 flags |= BIT(QEDE_PRI_FLAG_SMART_AN_SUPPORT);
492
493 if (edev->err_flags & BIT(QEDE_ERR_IS_RECOVERABLE))
494 flags |= BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR);
495
496 return flags;
497 }
498
qede_set_priv_flags(struct net_device * dev,u32 flags)499 static int qede_set_priv_flags(struct net_device *dev, u32 flags)
500 {
501 struct qede_dev *edev = netdev_priv(dev);
502 u32 cflags = qede_get_priv_flags(dev);
503 u32 dflags = flags ^ cflags;
504
505 /* can only change RECOVER_ON_ERROR flag */
506 if (dflags & ~BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR))
507 return -EINVAL;
508
509 if (flags & BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR))
510 set_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags);
511 else
512 clear_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags);
513
514 return 0;
515 }
516
qede_get_link_ksettings(struct net_device * dev,struct ethtool_link_ksettings * cmd)517 static int qede_get_link_ksettings(struct net_device *dev,
518 struct ethtool_link_ksettings *cmd)
519 {
520 typeof(cmd->link_modes) *link_modes = &cmd->link_modes;
521 struct ethtool_link_settings *base = &cmd->base;
522 struct qede_dev *edev = netdev_priv(dev);
523 struct qed_link_output current_link;
524
525 __qede_lock(edev);
526
527 memset(¤t_link, 0, sizeof(current_link));
528 edev->ops->common->get_link(edev->cdev, ¤t_link);
529
530 linkmode_copy(link_modes->supported, current_link.supported_caps);
531 linkmode_copy(link_modes->advertising, current_link.advertised_caps);
532 linkmode_copy(link_modes->lp_advertising, current_link.lp_caps);
533
534 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
535 base->speed = current_link.speed;
536 base->duplex = current_link.duplex;
537 } else {
538 base->speed = SPEED_UNKNOWN;
539 base->duplex = DUPLEX_UNKNOWN;
540 }
541
542 __qede_unlock(edev);
543
544 base->port = current_link.port;
545 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
546 AUTONEG_DISABLE;
547
548 return 0;
549 }
550
qede_set_link_ksettings(struct net_device * dev,const struct ethtool_link_ksettings * cmd)551 static int qede_set_link_ksettings(struct net_device *dev,
552 const struct ethtool_link_ksettings *cmd)
553 {
554 const struct ethtool_link_settings *base = &cmd->base;
555 struct qede_dev *edev = netdev_priv(dev);
556 const struct qede_forced_speed_map *map;
557 struct qed_link_output current_link;
558 struct qed_link_params params;
559 u32 i;
560
561 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
562 DP_INFO(edev, "Link settings are not allowed to be changed\n");
563 return -EOPNOTSUPP;
564 }
565 memset(¤t_link, 0, sizeof(current_link));
566 memset(¶ms, 0, sizeof(params));
567 edev->ops->common->get_link(edev->cdev, ¤t_link);
568
569 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
570 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
571
572 if (base->autoneg == AUTONEG_ENABLE) {
573 if (!phylink_test(current_link.supported_caps, Autoneg)) {
574 DP_INFO(edev, "Auto negotiation is not supported\n");
575 return -EOPNOTSUPP;
576 }
577
578 params.autoneg = true;
579 params.forced_speed = 0;
580
581 linkmode_copy(params.adv_speeds, cmd->link_modes.advertising);
582 } else { /* forced speed */
583 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
584 params.autoneg = false;
585 params.forced_speed = base->speed;
586
587 for (i = 0; i < ARRAY_SIZE(qede_forced_speed_maps); i++) {
588 map = qede_forced_speed_maps + i;
589
590 if (base->speed != map->speed ||
591 !linkmode_intersects(current_link.supported_caps,
592 map->caps))
593 continue;
594
595 linkmode_and(params.adv_speeds,
596 current_link.supported_caps, map->caps);
597 goto set_link;
598 }
599
600 DP_INFO(edev, "Unsupported speed %u\n", base->speed);
601 return -EINVAL;
602 }
603
604 set_link:
605 params.link_up = true;
606 edev->ops->common->set_link(edev->cdev, ¶ms);
607
608 return 0;
609 }
610
qede_get_drvinfo(struct net_device * ndev,struct ethtool_drvinfo * info)611 static void qede_get_drvinfo(struct net_device *ndev,
612 struct ethtool_drvinfo *info)
613 {
614 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN];
615 struct qede_dev *edev = netdev_priv(ndev);
616 char mbi[ETHTOOL_FWVERS_LEN];
617
618 strlcpy(info->driver, "qede", sizeof(info->driver));
619
620 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
621 edev->dev_info.common.fw_major,
622 edev->dev_info.common.fw_minor,
623 edev->dev_info.common.fw_rev,
624 edev->dev_info.common.fw_eng);
625
626 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
627 (edev->dev_info.common.mfw_rev >> 24) & 0xFF,
628 (edev->dev_info.common.mfw_rev >> 16) & 0xFF,
629 (edev->dev_info.common.mfw_rev >> 8) & 0xFF,
630 edev->dev_info.common.mfw_rev & 0xFF);
631
632 if ((strlen(storm) + strlen(DRV_MODULE_VERSION) + strlen("[storm] ")) <
633 sizeof(info->version))
634 snprintf(info->version, sizeof(info->version),
635 "%s [storm %s]", DRV_MODULE_VERSION, storm);
636 else
637 snprintf(info->version, sizeof(info->version),
638 "%s %s", DRV_MODULE_VERSION, storm);
639
640 if (edev->dev_info.common.mbi_version) {
641 snprintf(mbi, ETHTOOL_FWVERS_LEN, "%d.%d.%d",
642 (edev->dev_info.common.mbi_version &
643 QED_MBI_VERSION_2_MASK) >> QED_MBI_VERSION_2_OFFSET,
644 (edev->dev_info.common.mbi_version &
645 QED_MBI_VERSION_1_MASK) >> QED_MBI_VERSION_1_OFFSET,
646 (edev->dev_info.common.mbi_version &
647 QED_MBI_VERSION_0_MASK) >> QED_MBI_VERSION_0_OFFSET);
648 snprintf(info->fw_version, sizeof(info->fw_version),
649 "mbi %s [mfw %s]", mbi, mfw);
650 } else {
651 snprintf(info->fw_version, sizeof(info->fw_version),
652 "mfw %s", mfw);
653 }
654
655 strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info));
656 }
657
qede_get_wol(struct net_device * ndev,struct ethtool_wolinfo * wol)658 static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
659 {
660 struct qede_dev *edev = netdev_priv(ndev);
661
662 if (edev->dev_info.common.wol_support) {
663 wol->supported = WAKE_MAGIC;
664 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0;
665 }
666 }
667
qede_set_wol(struct net_device * ndev,struct ethtool_wolinfo * wol)668 static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
669 {
670 struct qede_dev *edev = netdev_priv(ndev);
671 bool wol_requested;
672 int rc;
673
674 if (wol->wolopts & ~WAKE_MAGIC) {
675 DP_INFO(edev,
676 "Can't support WoL options other than magic-packet\n");
677 return -EINVAL;
678 }
679
680 wol_requested = !!(wol->wolopts & WAKE_MAGIC);
681 if (wol_requested == edev->wol_enabled)
682 return 0;
683
684 /* Need to actually change configuration */
685 if (!edev->dev_info.common.wol_support) {
686 DP_INFO(edev, "Device doesn't support WoL\n");
687 return -EINVAL;
688 }
689
690 rc = edev->ops->common->update_wol(edev->cdev, wol_requested);
691 if (!rc)
692 edev->wol_enabled = wol_requested;
693
694 return rc;
695 }
696
qede_get_msglevel(struct net_device * ndev)697 static u32 qede_get_msglevel(struct net_device *ndev)
698 {
699 struct qede_dev *edev = netdev_priv(ndev);
700
701 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module;
702 }
703
qede_set_msglevel(struct net_device * ndev,u32 level)704 static void qede_set_msglevel(struct net_device *ndev, u32 level)
705 {
706 struct qede_dev *edev = netdev_priv(ndev);
707 u32 dp_module = 0;
708 u8 dp_level = 0;
709
710 qede_config_debug(level, &dp_module, &dp_level);
711
712 edev->dp_level = dp_level;
713 edev->dp_module = dp_module;
714 edev->ops->common->update_msglvl(edev->cdev,
715 dp_module, dp_level);
716 }
717
qede_nway_reset(struct net_device * dev)718 static int qede_nway_reset(struct net_device *dev)
719 {
720 struct qede_dev *edev = netdev_priv(dev);
721 struct qed_link_output current_link;
722 struct qed_link_params link_params;
723
724 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
725 DP_INFO(edev, "Link settings are not allowed to be changed\n");
726 return -EOPNOTSUPP;
727 }
728
729 if (!netif_running(dev))
730 return 0;
731
732 memset(¤t_link, 0, sizeof(current_link));
733 edev->ops->common->get_link(edev->cdev, ¤t_link);
734 if (!current_link.link_up)
735 return 0;
736
737 /* Toggle the link */
738 memset(&link_params, 0, sizeof(link_params));
739 link_params.link_up = false;
740 edev->ops->common->set_link(edev->cdev, &link_params);
741 link_params.link_up = true;
742 edev->ops->common->set_link(edev->cdev, &link_params);
743
744 return 0;
745 }
746
qede_get_link(struct net_device * dev)747 static u32 qede_get_link(struct net_device *dev)
748 {
749 struct qede_dev *edev = netdev_priv(dev);
750 struct qed_link_output current_link;
751
752 memset(¤t_link, 0, sizeof(current_link));
753 edev->ops->common->get_link(edev->cdev, ¤t_link);
754
755 return current_link.link_up;
756 }
757
qede_flash_device(struct net_device * dev,struct ethtool_flash * flash)758 static int qede_flash_device(struct net_device *dev,
759 struct ethtool_flash *flash)
760 {
761 struct qede_dev *edev = netdev_priv(dev);
762
763 return edev->ops->common->nvm_flash(edev->cdev, flash->data);
764 }
765
qede_get_coalesce(struct net_device * dev,struct ethtool_coalesce * coal)766 static int qede_get_coalesce(struct net_device *dev,
767 struct ethtool_coalesce *coal)
768 {
769 void *rx_handle = NULL, *tx_handle = NULL;
770 struct qede_dev *edev = netdev_priv(dev);
771 u16 rx_coal, tx_coal, i, rc = 0;
772 struct qede_fastpath *fp;
773
774 rx_coal = QED_DEFAULT_RX_USECS;
775 tx_coal = QED_DEFAULT_TX_USECS;
776
777 memset(coal, 0, sizeof(struct ethtool_coalesce));
778
779 __qede_lock(edev);
780 if (edev->state == QEDE_STATE_OPEN) {
781 for_each_queue(i) {
782 fp = &edev->fp_array[i];
783
784 if (fp->type & QEDE_FASTPATH_RX) {
785 rx_handle = fp->rxq->handle;
786 break;
787 }
788 }
789
790 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle);
791 if (rc) {
792 DP_INFO(edev, "Read Rx coalesce error\n");
793 goto out;
794 }
795
796 for_each_queue(i) {
797 struct qede_tx_queue *txq;
798
799 fp = &edev->fp_array[i];
800
801 /* All TX queues of given fastpath uses same
802 * coalescing value, so no need to iterate over
803 * all TCs, TC0 txq should suffice.
804 */
805 if (fp->type & QEDE_FASTPATH_TX) {
806 txq = QEDE_FP_TC0_TXQ(fp);
807 tx_handle = txq->handle;
808 break;
809 }
810 }
811
812 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle);
813 if (rc)
814 DP_INFO(edev, "Read Tx coalesce error\n");
815 }
816
817 out:
818 __qede_unlock(edev);
819
820 coal->rx_coalesce_usecs = rx_coal;
821 coal->tx_coalesce_usecs = tx_coal;
822 coal->stats_block_coalesce_usecs = edev->stats_coal_usecs;
823
824 return rc;
825 }
826
qede_set_coalesce(struct net_device * dev,struct ethtool_coalesce * coal)827 static int qede_set_coalesce(struct net_device *dev,
828 struct ethtool_coalesce *coal)
829 {
830 struct qede_dev *edev = netdev_priv(dev);
831 struct qede_fastpath *fp;
832 int i, rc = 0;
833 u16 rxc, txc;
834
835 if (edev->stats_coal_usecs != coal->stats_block_coalesce_usecs) {
836 edev->stats_coal_usecs = coal->stats_block_coalesce_usecs;
837 if (edev->stats_coal_usecs) {
838 edev->stats_coal_ticks = usecs_to_jiffies(edev->stats_coal_usecs);
839 schedule_delayed_work(&edev->periodic_task, 0);
840
841 DP_INFO(edev, "Configured stats coal ticks=%lu jiffies\n",
842 edev->stats_coal_ticks);
843 } else {
844 cancel_delayed_work_sync(&edev->periodic_task);
845 }
846 }
847
848 if (!netif_running(dev)) {
849 DP_INFO(edev, "Interface is down\n");
850 return -EINVAL;
851 }
852
853 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
854 coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
855 DP_INFO(edev,
856 "Can't support requested %s coalesce value [max supported value %d]\n",
857 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" :
858 "tx", QED_COALESCE_MAX);
859 return -EINVAL;
860 }
861
862 rxc = (u16)coal->rx_coalesce_usecs;
863 txc = (u16)coal->tx_coalesce_usecs;
864 for_each_queue(i) {
865 fp = &edev->fp_array[i];
866
867 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
868 rc = edev->ops->common->set_coalesce(edev->cdev,
869 rxc, 0,
870 fp->rxq->handle);
871 if (rc) {
872 DP_INFO(edev,
873 "Set RX coalesce error, rc = %d\n", rc);
874 return rc;
875 }
876 }
877
878 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
879 struct qede_tx_queue *txq;
880
881 /* All TX queues of given fastpath uses same
882 * coalescing value, so no need to iterate over
883 * all TCs, TC0 txq should suffice.
884 */
885 txq = QEDE_FP_TC0_TXQ(fp);
886
887 rc = edev->ops->common->set_coalesce(edev->cdev,
888 0, txc,
889 txq->handle);
890 if (rc) {
891 DP_INFO(edev,
892 "Set TX coalesce error, rc = %d\n", rc);
893 return rc;
894 }
895 }
896 }
897
898 return rc;
899 }
900
qede_get_ringparam(struct net_device * dev,struct ethtool_ringparam * ering)901 static void qede_get_ringparam(struct net_device *dev,
902 struct ethtool_ringparam *ering)
903 {
904 struct qede_dev *edev = netdev_priv(dev);
905
906 ering->rx_max_pending = NUM_RX_BDS_MAX;
907 ering->rx_pending = edev->q_num_rx_buffers;
908 ering->tx_max_pending = NUM_TX_BDS_MAX;
909 ering->tx_pending = edev->q_num_tx_buffers;
910 }
911
qede_set_ringparam(struct net_device * dev,struct ethtool_ringparam * ering)912 static int qede_set_ringparam(struct net_device *dev,
913 struct ethtool_ringparam *ering)
914 {
915 struct qede_dev *edev = netdev_priv(dev);
916
917 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
918 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n",
919 ering->rx_pending, ering->tx_pending);
920
921 /* Validate legality of configuration */
922 if (ering->rx_pending > NUM_RX_BDS_MAX ||
923 ering->rx_pending < NUM_RX_BDS_MIN ||
924 ering->tx_pending > NUM_TX_BDS_MAX ||
925 ering->tx_pending < NUM_TX_BDS_MIN) {
926 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
927 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n",
928 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX,
929 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX);
930 return -EINVAL;
931 }
932
933 /* Change ring size and re-load */
934 edev->q_num_rx_buffers = ering->rx_pending;
935 edev->q_num_tx_buffers = ering->tx_pending;
936
937 qede_reload(edev, NULL, false);
938
939 return 0;
940 }
941
qede_get_pauseparam(struct net_device * dev,struct ethtool_pauseparam * epause)942 static void qede_get_pauseparam(struct net_device *dev,
943 struct ethtool_pauseparam *epause)
944 {
945 struct qede_dev *edev = netdev_priv(dev);
946 struct qed_link_output current_link;
947
948 memset(¤t_link, 0, sizeof(current_link));
949 edev->ops->common->get_link(edev->cdev, ¤t_link);
950
951 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
952 epause->autoneg = true;
953 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
954 epause->rx_pause = true;
955 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
956 epause->tx_pause = true;
957
958 DP_VERBOSE(edev, QED_MSG_DEBUG,
959 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n",
960 epause->cmd, epause->autoneg, epause->rx_pause,
961 epause->tx_pause);
962 }
963
qede_set_pauseparam(struct net_device * dev,struct ethtool_pauseparam * epause)964 static int qede_set_pauseparam(struct net_device *dev,
965 struct ethtool_pauseparam *epause)
966 {
967 struct qede_dev *edev = netdev_priv(dev);
968 struct qed_link_params params;
969 struct qed_link_output current_link;
970
971 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
972 DP_INFO(edev,
973 "Pause settings are not allowed to be changed\n");
974 return -EOPNOTSUPP;
975 }
976
977 memset(¤t_link, 0, sizeof(current_link));
978 edev->ops->common->get_link(edev->cdev, ¤t_link);
979
980 memset(¶ms, 0, sizeof(params));
981 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
982
983 if (epause->autoneg) {
984 if (!phylink_test(current_link.supported_caps, Autoneg)) {
985 DP_INFO(edev, "autoneg not supported\n");
986 return -EINVAL;
987 }
988
989 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
990 }
991
992 if (epause->rx_pause)
993 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
994 if (epause->tx_pause)
995 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
996
997 params.link_up = true;
998 edev->ops->common->set_link(edev->cdev, ¶ms);
999
1000 return 0;
1001 }
1002
qede_get_regs(struct net_device * ndev,struct ethtool_regs * regs,void * buffer)1003 static void qede_get_regs(struct net_device *ndev,
1004 struct ethtool_regs *regs, void *buffer)
1005 {
1006 struct qede_dev *edev = netdev_priv(ndev);
1007
1008 regs->version = 0;
1009 memset(buffer, 0, regs->len);
1010
1011 if (edev->ops && edev->ops->common)
1012 edev->ops->common->dbg_all_data(edev->cdev, buffer);
1013 }
1014
qede_get_regs_len(struct net_device * ndev)1015 static int qede_get_regs_len(struct net_device *ndev)
1016 {
1017 struct qede_dev *edev = netdev_priv(ndev);
1018
1019 if (edev->ops && edev->ops->common)
1020 return edev->ops->common->dbg_all_data_size(edev->cdev);
1021 else
1022 return -EINVAL;
1023 }
1024
qede_update_mtu(struct qede_dev * edev,struct qede_reload_args * args)1025 static void qede_update_mtu(struct qede_dev *edev,
1026 struct qede_reload_args *args)
1027 {
1028 edev->ndev->mtu = args->u.mtu;
1029 }
1030
1031 /* Netdevice NDOs */
qede_change_mtu(struct net_device * ndev,int new_mtu)1032 int qede_change_mtu(struct net_device *ndev, int new_mtu)
1033 {
1034 struct qede_dev *edev = netdev_priv(ndev);
1035 struct qede_reload_args args;
1036
1037 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1038 "Configuring MTU size of %d\n", new_mtu);
1039
1040 if (new_mtu > PAGE_SIZE)
1041 ndev->features &= ~NETIF_F_GRO_HW;
1042
1043 /* Set the mtu field and re-start the interface if needed */
1044 args.u.mtu = new_mtu;
1045 args.func = &qede_update_mtu;
1046 qede_reload(edev, &args, false);
1047 #if IS_ENABLED(CONFIG_QED_RDMA)
1048 qede_rdma_event_change_mtu(edev);
1049 #endif
1050 edev->ops->common->update_mtu(edev->cdev, new_mtu);
1051
1052 return 0;
1053 }
1054
qede_get_channels(struct net_device * dev,struct ethtool_channels * channels)1055 static void qede_get_channels(struct net_device *dev,
1056 struct ethtool_channels *channels)
1057 {
1058 struct qede_dev *edev = netdev_priv(dev);
1059
1060 channels->max_combined = QEDE_MAX_RSS_CNT(edev);
1061 channels->max_rx = QEDE_MAX_RSS_CNT(edev);
1062 channels->max_tx = QEDE_MAX_RSS_CNT(edev);
1063 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx -
1064 edev->fp_num_rx;
1065 channels->tx_count = edev->fp_num_tx;
1066 channels->rx_count = edev->fp_num_rx;
1067 }
1068
qede_set_channels(struct net_device * dev,struct ethtool_channels * channels)1069 static int qede_set_channels(struct net_device *dev,
1070 struct ethtool_channels *channels)
1071 {
1072 struct qede_dev *edev = netdev_priv(dev);
1073 u32 count;
1074
1075 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1076 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n",
1077 channels->rx_count, channels->tx_count,
1078 channels->other_count, channels->combined_count);
1079
1080 count = channels->rx_count + channels->tx_count +
1081 channels->combined_count;
1082
1083 /* We don't support `other' channels */
1084 if (channels->other_count) {
1085 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1086 "command parameters not supported\n");
1087 return -EINVAL;
1088 }
1089
1090 if (!(channels->combined_count || (channels->rx_count &&
1091 channels->tx_count))) {
1092 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1093 "need to request at least one transmit and one receive channel\n");
1094 return -EINVAL;
1095 }
1096
1097 if (count > QEDE_MAX_RSS_CNT(edev)) {
1098 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1099 "requested channels = %d max supported channels = %d\n",
1100 count, QEDE_MAX_RSS_CNT(edev));
1101 return -EINVAL;
1102 }
1103
1104 /* Check if there was a change in the active parameters */
1105 if ((count == QEDE_QUEUE_CNT(edev)) &&
1106 (channels->tx_count == edev->fp_num_tx) &&
1107 (channels->rx_count == edev->fp_num_rx)) {
1108 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1109 "No change in active parameters\n");
1110 return 0;
1111 }
1112
1113 /* We need the number of queues to be divisible between the hwfns */
1114 if ((count % edev->dev_info.common.num_hwfns) ||
1115 (channels->tx_count % edev->dev_info.common.num_hwfns) ||
1116 (channels->rx_count % edev->dev_info.common.num_hwfns)) {
1117 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1118 "Number of channels must be divisible by %04x\n",
1119 edev->dev_info.common.num_hwfns);
1120 return -EINVAL;
1121 }
1122
1123 /* Set number of queues and reload if necessary */
1124 edev->req_queues = count;
1125 edev->req_num_tx = channels->tx_count;
1126 edev->req_num_rx = channels->rx_count;
1127 /* Reset the indirection table if rx queue count is updated */
1128 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) {
1129 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED;
1130 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table));
1131 }
1132
1133 qede_reload(edev, NULL, false);
1134
1135 return 0;
1136 }
1137
qede_get_ts_info(struct net_device * dev,struct ethtool_ts_info * info)1138 static int qede_get_ts_info(struct net_device *dev,
1139 struct ethtool_ts_info *info)
1140 {
1141 struct qede_dev *edev = netdev_priv(dev);
1142
1143 return qede_ptp_get_ts_info(edev, info);
1144 }
1145
qede_set_phys_id(struct net_device * dev,enum ethtool_phys_id_state state)1146 static int qede_set_phys_id(struct net_device *dev,
1147 enum ethtool_phys_id_state state)
1148 {
1149 struct qede_dev *edev = netdev_priv(dev);
1150 u8 led_state = 0;
1151
1152 switch (state) {
1153 case ETHTOOL_ID_ACTIVE:
1154 return 1; /* cycle on/off once per second */
1155
1156 case ETHTOOL_ID_ON:
1157 led_state = QED_LED_MODE_ON;
1158 break;
1159
1160 case ETHTOOL_ID_OFF:
1161 led_state = QED_LED_MODE_OFF;
1162 break;
1163
1164 case ETHTOOL_ID_INACTIVE:
1165 led_state = QED_LED_MODE_RESTORE;
1166 break;
1167 }
1168
1169 edev->ops->common->set_led(edev->cdev, led_state);
1170
1171 return 0;
1172 }
1173
qede_get_rss_flags(struct qede_dev * edev,struct ethtool_rxnfc * info)1174 static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1175 {
1176 info->data = RXH_IP_SRC | RXH_IP_DST;
1177
1178 switch (info->flow_type) {
1179 case TCP_V4_FLOW:
1180 case TCP_V6_FLOW:
1181 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1182 break;
1183 case UDP_V4_FLOW:
1184 if (edev->rss_caps & QED_RSS_IPV4_UDP)
1185 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1186 break;
1187 case UDP_V6_FLOW:
1188 if (edev->rss_caps & QED_RSS_IPV6_UDP)
1189 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1190 break;
1191 case IPV4_FLOW:
1192 case IPV6_FLOW:
1193 break;
1194 default:
1195 info->data = 0;
1196 break;
1197 }
1198
1199 return 0;
1200 }
1201
qede_get_rxnfc(struct net_device * dev,struct ethtool_rxnfc * info,u32 * rule_locs)1202 static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
1203 u32 *rule_locs)
1204 {
1205 struct qede_dev *edev = netdev_priv(dev);
1206 int rc = 0;
1207
1208 switch (info->cmd) {
1209 case ETHTOOL_GRXRINGS:
1210 info->data = QEDE_RSS_COUNT(edev);
1211 break;
1212 case ETHTOOL_GRXFH:
1213 rc = qede_get_rss_flags(edev, info);
1214 break;
1215 case ETHTOOL_GRXCLSRLCNT:
1216 info->rule_cnt = qede_get_arfs_filter_count(edev);
1217 info->data = QEDE_RFS_MAX_FLTR;
1218 break;
1219 case ETHTOOL_GRXCLSRULE:
1220 rc = qede_get_cls_rule_entry(edev, info);
1221 break;
1222 case ETHTOOL_GRXCLSRLALL:
1223 rc = qede_get_cls_rule_all(edev, info, rule_locs);
1224 break;
1225 default:
1226 DP_ERR(edev, "Command parameters not supported\n");
1227 rc = -EOPNOTSUPP;
1228 }
1229
1230 return rc;
1231 }
1232
qede_set_rss_flags(struct qede_dev * edev,struct ethtool_rxnfc * info)1233 static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1234 {
1235 struct qed_update_vport_params *vport_update_params;
1236 u8 set_caps = 0, clr_caps = 0;
1237 int rc = 0;
1238
1239 DP_VERBOSE(edev, QED_MSG_DEBUG,
1240 "Set rss flags command parameters: flow type = %d, data = %llu\n",
1241 info->flow_type, info->data);
1242
1243 switch (info->flow_type) {
1244 case TCP_V4_FLOW:
1245 case TCP_V6_FLOW:
1246 /* For TCP only 4-tuple hash is supported */
1247 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST |
1248 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1249 DP_INFO(edev, "Command parameters not supported\n");
1250 return -EINVAL;
1251 }
1252 return 0;
1253 case UDP_V4_FLOW:
1254 /* For UDP either 2-tuple hash or 4-tuple hash is supported */
1255 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1256 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1257 set_caps = QED_RSS_IPV4_UDP;
1258 DP_VERBOSE(edev, QED_MSG_DEBUG,
1259 "UDP 4-tuple enabled\n");
1260 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1261 clr_caps = QED_RSS_IPV4_UDP;
1262 DP_VERBOSE(edev, QED_MSG_DEBUG,
1263 "UDP 4-tuple disabled\n");
1264 } else {
1265 return -EINVAL;
1266 }
1267 break;
1268 case UDP_V6_FLOW:
1269 /* For UDP either 2-tuple hash or 4-tuple hash is supported */
1270 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1271 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1272 set_caps = QED_RSS_IPV6_UDP;
1273 DP_VERBOSE(edev, QED_MSG_DEBUG,
1274 "UDP 4-tuple enabled\n");
1275 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1276 clr_caps = QED_RSS_IPV6_UDP;
1277 DP_VERBOSE(edev, QED_MSG_DEBUG,
1278 "UDP 4-tuple disabled\n");
1279 } else {
1280 return -EINVAL;
1281 }
1282 break;
1283 case IPV4_FLOW:
1284 case IPV6_FLOW:
1285 /* For IP only 2-tuple hash is supported */
1286 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) {
1287 DP_INFO(edev, "Command parameters not supported\n");
1288 return -EINVAL;
1289 }
1290 return 0;
1291 case SCTP_V4_FLOW:
1292 case AH_ESP_V4_FLOW:
1293 case AH_V4_FLOW:
1294 case ESP_V4_FLOW:
1295 case SCTP_V6_FLOW:
1296 case AH_ESP_V6_FLOW:
1297 case AH_V6_FLOW:
1298 case ESP_V6_FLOW:
1299 case IP_USER_FLOW:
1300 case ETHER_FLOW:
1301 /* RSS is not supported for these protocols */
1302 if (info->data) {
1303 DP_INFO(edev, "Command parameters not supported\n");
1304 return -EINVAL;
1305 }
1306 return 0;
1307 default:
1308 return -EINVAL;
1309 }
1310
1311 /* No action is needed if there is no change in the rss capability */
1312 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps))
1313 return 0;
1314
1315 /* Update internal configuration */
1316 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps);
1317 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
1318
1319 /* Re-configure if possible */
1320 __qede_lock(edev);
1321 if (edev->state == QEDE_STATE_OPEN) {
1322 vport_update_params = vzalloc(sizeof(*vport_update_params));
1323 if (!vport_update_params) {
1324 __qede_unlock(edev);
1325 return -ENOMEM;
1326 }
1327 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1328 &vport_update_params->update_rss_flg);
1329 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1330 vfree(vport_update_params);
1331 }
1332 __qede_unlock(edev);
1333
1334 return rc;
1335 }
1336
qede_set_rxnfc(struct net_device * dev,struct ethtool_rxnfc * info)1337 static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
1338 {
1339 struct qede_dev *edev = netdev_priv(dev);
1340 int rc;
1341
1342 switch (info->cmd) {
1343 case ETHTOOL_SRXFH:
1344 rc = qede_set_rss_flags(edev, info);
1345 break;
1346 case ETHTOOL_SRXCLSRLINS:
1347 rc = qede_add_cls_rule(edev, info);
1348 break;
1349 case ETHTOOL_SRXCLSRLDEL:
1350 rc = qede_delete_flow_filter(edev, info->fs.location);
1351 break;
1352 default:
1353 DP_INFO(edev, "Command parameters not supported\n");
1354 rc = -EOPNOTSUPP;
1355 }
1356
1357 return rc;
1358 }
1359
qede_get_rxfh_indir_size(struct net_device * dev)1360 static u32 qede_get_rxfh_indir_size(struct net_device *dev)
1361 {
1362 return QED_RSS_IND_TABLE_SIZE;
1363 }
1364
qede_get_rxfh_key_size(struct net_device * dev)1365 static u32 qede_get_rxfh_key_size(struct net_device *dev)
1366 {
1367 struct qede_dev *edev = netdev_priv(dev);
1368
1369 return sizeof(edev->rss_key);
1370 }
1371
qede_get_rxfh(struct net_device * dev,u32 * indir,u8 * key,u8 * hfunc)1372 static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc)
1373 {
1374 struct qede_dev *edev = netdev_priv(dev);
1375 int i;
1376
1377 if (hfunc)
1378 *hfunc = ETH_RSS_HASH_TOP;
1379
1380 if (!indir)
1381 return 0;
1382
1383 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1384 indir[i] = edev->rss_ind_table[i];
1385
1386 if (key)
1387 memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev));
1388
1389 return 0;
1390 }
1391
qede_set_rxfh(struct net_device * dev,const u32 * indir,const u8 * key,const u8 hfunc)1392 static int qede_set_rxfh(struct net_device *dev, const u32 *indir,
1393 const u8 *key, const u8 hfunc)
1394 {
1395 struct qed_update_vport_params *vport_update_params;
1396 struct qede_dev *edev = netdev_priv(dev);
1397 int i, rc = 0;
1398
1399 if (edev->dev_info.common.num_hwfns > 1) {
1400 DP_INFO(edev,
1401 "RSS configuration is not supported for 100G devices\n");
1402 return -EOPNOTSUPP;
1403 }
1404
1405 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
1406 return -EOPNOTSUPP;
1407
1408 if (!indir && !key)
1409 return 0;
1410
1411 if (indir) {
1412 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1413 edev->rss_ind_table[i] = indir[i];
1414 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
1415 }
1416
1417 if (key) {
1418 memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev));
1419 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
1420 }
1421
1422 __qede_lock(edev);
1423 if (edev->state == QEDE_STATE_OPEN) {
1424 vport_update_params = vzalloc(sizeof(*vport_update_params));
1425 if (!vport_update_params) {
1426 __qede_unlock(edev);
1427 return -ENOMEM;
1428 }
1429 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1430 &vport_update_params->update_rss_flg);
1431 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1432 vfree(vport_update_params);
1433 }
1434 __qede_unlock(edev);
1435
1436 return rc;
1437 }
1438
1439 /* This function enables the interrupt generation and the NAPI on the device */
qede_netif_start(struct qede_dev * edev)1440 static void qede_netif_start(struct qede_dev *edev)
1441 {
1442 int i;
1443
1444 if (!netif_running(edev->ndev))
1445 return;
1446
1447 for_each_queue(i) {
1448 /* Update and reenable interrupts */
1449 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1);
1450 napi_enable(&edev->fp_array[i].napi);
1451 }
1452 }
1453
1454 /* This function disables the NAPI and the interrupt generation on the device */
qede_netif_stop(struct qede_dev * edev)1455 static void qede_netif_stop(struct qede_dev *edev)
1456 {
1457 int i;
1458
1459 for_each_queue(i) {
1460 napi_disable(&edev->fp_array[i].napi);
1461 /* Disable interrupts */
1462 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0);
1463 }
1464 }
1465
qede_selftest_transmit_traffic(struct qede_dev * edev,struct sk_buff * skb)1466 static int qede_selftest_transmit_traffic(struct qede_dev *edev,
1467 struct sk_buff *skb)
1468 {
1469 struct qede_tx_queue *txq = NULL;
1470 struct eth_tx_1st_bd *first_bd;
1471 dma_addr_t mapping;
1472 int i, idx;
1473 u16 val;
1474
1475 for_each_queue(i) {
1476 struct qede_fastpath *fp = &edev->fp_array[i];
1477
1478 if (fp->type & QEDE_FASTPATH_TX) {
1479 txq = QEDE_FP_TC0_TXQ(fp);
1480 break;
1481 }
1482 }
1483
1484 if (!txq) {
1485 DP_NOTICE(edev, "Tx path is not available\n");
1486 return -1;
1487 }
1488
1489 /* Fill the entry in the SW ring and the BDs in the FW ring */
1490 idx = txq->sw_tx_prod;
1491 txq->sw_tx_ring.skbs[idx].skb = skb;
1492 first_bd = qed_chain_produce(&txq->tx_pbl);
1493 memset(first_bd, 0, sizeof(*first_bd));
1494 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1495 first_bd->data.bd_flags.bitfields = val;
1496 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK;
1497 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
1498 first_bd->data.bitfields |= cpu_to_le16(val);
1499
1500 /* Map skb linear data for DMA and set in the first BD */
1501 mapping = dma_map_single(&edev->pdev->dev, skb->data,
1502 skb_headlen(skb), DMA_TO_DEVICE);
1503 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
1504 DP_NOTICE(edev, "SKB mapping failed\n");
1505 return -ENOMEM;
1506 }
1507 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
1508
1509 /* update the first BD with the actual num BDs */
1510 first_bd->data.nbds = 1;
1511 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
1512 /* 'next page' entries are counted in the producer value */
1513 val = qed_chain_get_prod_idx(&txq->tx_pbl);
1514 txq->tx_db.data.bd_prod = cpu_to_le16(val);
1515
1516 /* wmb makes sure that the BDs data is updated before updating the
1517 * producer, otherwise FW may read old data from the BDs.
1518 */
1519 wmb();
1520 barrier();
1521 writel(txq->tx_db.raw, txq->doorbell_addr);
1522
1523 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
1524 if (qede_txq_has_work(txq))
1525 break;
1526 usleep_range(100, 200);
1527 }
1528
1529 if (!qede_txq_has_work(txq)) {
1530 DP_NOTICE(edev, "Tx completion didn't happen\n");
1531 return -1;
1532 }
1533
1534 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
1535 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
1536 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE);
1537 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
1538 txq->sw_tx_ring.skbs[idx].skb = NULL;
1539
1540 return 0;
1541 }
1542
qede_selftest_receive_traffic(struct qede_dev * edev)1543 static int qede_selftest_receive_traffic(struct qede_dev *edev)
1544 {
1545 u16 sw_rx_index, len;
1546 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1547 struct qede_rx_queue *rxq = NULL;
1548 struct sw_rx_data *sw_rx_data;
1549 union eth_rx_cqe *cqe;
1550 int i, iter, rc = 0;
1551 u8 *data_ptr;
1552
1553 for_each_queue(i) {
1554 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
1555 rxq = edev->fp_array[i].rxq;
1556 break;
1557 }
1558 }
1559
1560 if (!rxq) {
1561 DP_NOTICE(edev, "Rx path is not available\n");
1562 return -1;
1563 }
1564
1565 /* The packet is expected to receive on rx-queue 0 even though RSS is
1566 * enabled. This is because the queue 0 is configured as the default
1567 * queue and that the loopback traffic is not IP.
1568 */
1569 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) {
1570 if (!qede_has_rx_work(rxq)) {
1571 usleep_range(100, 200);
1572 continue;
1573 }
1574
1575 /* Get the CQE from the completion ring */
1576 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
1577
1578 /* Get the data from the SW ring */
1579 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1580 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1581 fp_cqe = &cqe->fast_path_regular;
1582 len = le16_to_cpu(fp_cqe->len_on_first_bd);
1583 data_ptr = (u8 *)(page_address(sw_rx_data->data) +
1584 fp_cqe->placement_offset +
1585 sw_rx_data->page_offset +
1586 rxq->rx_headroom);
1587 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) &&
1588 ether_addr_equal(data_ptr + ETH_ALEN,
1589 edev->ndev->dev_addr)) {
1590 for (i = ETH_HLEN; i < len; i++)
1591 if (data_ptr[i] != (unsigned char)(i & 0xff)) {
1592 rc = -1;
1593 break;
1594 }
1595
1596 qede_recycle_rx_bd_ring(rxq, 1);
1597 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1598 break;
1599 }
1600
1601 DP_INFO(edev, "Not the transmitted packet\n");
1602 qede_recycle_rx_bd_ring(rxq, 1);
1603 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1604 }
1605
1606 if (iter == QEDE_SELFTEST_POLL_COUNT) {
1607 DP_NOTICE(edev, "Failed to receive the traffic\n");
1608 return -1;
1609 }
1610
1611 qede_update_rx_prod(edev, rxq);
1612
1613 return rc;
1614 }
1615
qede_selftest_run_loopback(struct qede_dev * edev,u32 loopback_mode)1616 static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode)
1617 {
1618 struct qed_link_params link_params;
1619 struct sk_buff *skb = NULL;
1620 int rc = 0, i;
1621 u32 pkt_size;
1622 u8 *packet;
1623
1624 if (!netif_running(edev->ndev)) {
1625 DP_NOTICE(edev, "Interface is down\n");
1626 return -EINVAL;
1627 }
1628
1629 qede_netif_stop(edev);
1630
1631 /* Bring up the link in Loopback mode */
1632 memset(&link_params, 0, sizeof(link_params));
1633 link_params.link_up = true;
1634 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1635 link_params.loopback_mode = loopback_mode;
1636 edev->ops->common->set_link(edev->cdev, &link_params);
1637
1638 /* Wait for loopback configuration to apply */
1639 msleep_interruptible(500);
1640
1641 /* Setting max packet size to 1.5K to avoid data being split over
1642 * multiple BDs in cases where MTU > PAGE_SIZE.
1643 */
1644 pkt_size = (((edev->ndev->mtu < ETH_DATA_LEN) ?
1645 edev->ndev->mtu : ETH_DATA_LEN) + ETH_HLEN);
1646
1647 skb = netdev_alloc_skb(edev->ndev, pkt_size);
1648 if (!skb) {
1649 DP_INFO(edev, "Can't allocate skb\n");
1650 rc = -ENOMEM;
1651 goto test_loopback_exit;
1652 }
1653 packet = skb_put(skb, pkt_size);
1654 ether_addr_copy(packet, edev->ndev->dev_addr);
1655 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr);
1656 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN)));
1657 for (i = ETH_HLEN; i < pkt_size; i++)
1658 packet[i] = (unsigned char)(i & 0xff);
1659
1660 rc = qede_selftest_transmit_traffic(edev, skb);
1661 if (rc)
1662 goto test_loopback_exit;
1663
1664 rc = qede_selftest_receive_traffic(edev);
1665 if (rc)
1666 goto test_loopback_exit;
1667
1668 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n");
1669
1670 test_loopback_exit:
1671 dev_kfree_skb(skb);
1672
1673 /* Bring up the link in Normal mode */
1674 memset(&link_params, 0, sizeof(link_params));
1675 link_params.link_up = true;
1676 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1677 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE;
1678 edev->ops->common->set_link(edev->cdev, &link_params);
1679
1680 /* Wait for loopback configuration to apply */
1681 msleep_interruptible(500);
1682
1683 qede_netif_start(edev);
1684
1685 return rc;
1686 }
1687
qede_self_test(struct net_device * dev,struct ethtool_test * etest,u64 * buf)1688 static void qede_self_test(struct net_device *dev,
1689 struct ethtool_test *etest, u64 *buf)
1690 {
1691 struct qede_dev *edev = netdev_priv(dev);
1692
1693 DP_VERBOSE(edev, QED_MSG_DEBUG,
1694 "Self-test command parameters: offline = %d, external_lb = %d\n",
1695 (etest->flags & ETH_TEST_FL_OFFLINE),
1696 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2);
1697
1698 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX);
1699
1700 if (etest->flags & ETH_TEST_FL_OFFLINE) {
1701 if (qede_selftest_run_loopback(edev,
1702 QED_LINK_LOOPBACK_INT_PHY)) {
1703 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1;
1704 etest->flags |= ETH_TEST_FL_FAILED;
1705 }
1706 }
1707
1708 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) {
1709 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1;
1710 etest->flags |= ETH_TEST_FL_FAILED;
1711 }
1712
1713 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) {
1714 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1;
1715 etest->flags |= ETH_TEST_FL_FAILED;
1716 }
1717
1718 if (edev->ops->common->selftest->selftest_register(edev->cdev)) {
1719 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1;
1720 etest->flags |= ETH_TEST_FL_FAILED;
1721 }
1722
1723 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) {
1724 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
1725 etest->flags |= ETH_TEST_FL_FAILED;
1726 }
1727
1728 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) {
1729 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1;
1730 etest->flags |= ETH_TEST_FL_FAILED;
1731 }
1732 }
1733
qede_set_tunable(struct net_device * dev,const struct ethtool_tunable * tuna,const void * data)1734 static int qede_set_tunable(struct net_device *dev,
1735 const struct ethtool_tunable *tuna,
1736 const void *data)
1737 {
1738 struct qede_dev *edev = netdev_priv(dev);
1739 u32 val;
1740
1741 switch (tuna->id) {
1742 case ETHTOOL_RX_COPYBREAK:
1743 val = *(u32 *)data;
1744 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) {
1745 DP_VERBOSE(edev, QED_MSG_DEBUG,
1746 "Invalid rx copy break value, range is [%u, %u]",
1747 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE);
1748 return -EINVAL;
1749 }
1750
1751 edev->rx_copybreak = *(u32 *)data;
1752 break;
1753 default:
1754 return -EOPNOTSUPP;
1755 }
1756
1757 return 0;
1758 }
1759
qede_get_tunable(struct net_device * dev,const struct ethtool_tunable * tuna,void * data)1760 static int qede_get_tunable(struct net_device *dev,
1761 const struct ethtool_tunable *tuna, void *data)
1762 {
1763 struct qede_dev *edev = netdev_priv(dev);
1764
1765 switch (tuna->id) {
1766 case ETHTOOL_RX_COPYBREAK:
1767 *(u32 *)data = edev->rx_copybreak;
1768 break;
1769 default:
1770 return -EOPNOTSUPP;
1771 }
1772
1773 return 0;
1774 }
1775
qede_get_eee(struct net_device * dev,struct ethtool_eee * edata)1776 static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata)
1777 {
1778 struct qede_dev *edev = netdev_priv(dev);
1779 struct qed_link_output current_link;
1780
1781 memset(¤t_link, 0, sizeof(current_link));
1782 edev->ops->common->get_link(edev->cdev, ¤t_link);
1783
1784 if (!current_link.eee_supported) {
1785 DP_INFO(edev, "EEE is not supported\n");
1786 return -EOPNOTSUPP;
1787 }
1788
1789 if (current_link.eee.adv_caps & QED_EEE_1G_ADV)
1790 edata->advertised = ADVERTISED_1000baseT_Full;
1791 if (current_link.eee.adv_caps & QED_EEE_10G_ADV)
1792 edata->advertised |= ADVERTISED_10000baseT_Full;
1793 if (current_link.sup_caps & QED_EEE_1G_ADV)
1794 edata->supported = ADVERTISED_1000baseT_Full;
1795 if (current_link.sup_caps & QED_EEE_10G_ADV)
1796 edata->supported |= ADVERTISED_10000baseT_Full;
1797 if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV)
1798 edata->lp_advertised = ADVERTISED_1000baseT_Full;
1799 if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV)
1800 edata->lp_advertised |= ADVERTISED_10000baseT_Full;
1801
1802 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer;
1803 edata->eee_enabled = current_link.eee.enable;
1804 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable;
1805 edata->eee_active = current_link.eee_active;
1806
1807 return 0;
1808 }
1809
qede_set_eee(struct net_device * dev,struct ethtool_eee * edata)1810 static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata)
1811 {
1812 struct qede_dev *edev = netdev_priv(dev);
1813 struct qed_link_output current_link;
1814 struct qed_link_params params;
1815
1816 if (!edev->ops->common->can_link_change(edev->cdev)) {
1817 DP_INFO(edev, "Link settings are not allowed to be changed\n");
1818 return -EOPNOTSUPP;
1819 }
1820
1821 memset(¤t_link, 0, sizeof(current_link));
1822 edev->ops->common->get_link(edev->cdev, ¤t_link);
1823
1824 if (!current_link.eee_supported) {
1825 DP_INFO(edev, "EEE is not supported\n");
1826 return -EOPNOTSUPP;
1827 }
1828
1829 memset(¶ms, 0, sizeof(params));
1830 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG;
1831
1832 if (!(edata->advertised & (ADVERTISED_1000baseT_Full |
1833 ADVERTISED_10000baseT_Full)) ||
1834 ((edata->advertised & (ADVERTISED_1000baseT_Full |
1835 ADVERTISED_10000baseT_Full)) !=
1836 edata->advertised)) {
1837 DP_VERBOSE(edev, QED_MSG_DEBUG,
1838 "Invalid advertised capabilities %d\n",
1839 edata->advertised);
1840 return -EINVAL;
1841 }
1842
1843 if (edata->advertised & ADVERTISED_1000baseT_Full)
1844 params.eee.adv_caps = QED_EEE_1G_ADV;
1845 if (edata->advertised & ADVERTISED_10000baseT_Full)
1846 params.eee.adv_caps |= QED_EEE_10G_ADV;
1847 params.eee.enable = edata->eee_enabled;
1848 params.eee.tx_lpi_enable = edata->tx_lpi_enabled;
1849 params.eee.tx_lpi_timer = edata->tx_lpi_timer;
1850
1851 params.link_up = true;
1852 edev->ops->common->set_link(edev->cdev, ¶ms);
1853
1854 return 0;
1855 }
1856
qede_link_to_ethtool_fec(u32 link_fec)1857 static u32 qede_link_to_ethtool_fec(u32 link_fec)
1858 {
1859 u32 eth_fec = 0;
1860
1861 if (link_fec & QED_FEC_MODE_NONE)
1862 eth_fec |= ETHTOOL_FEC_OFF;
1863 if (link_fec & QED_FEC_MODE_FIRECODE)
1864 eth_fec |= ETHTOOL_FEC_BASER;
1865 if (link_fec & QED_FEC_MODE_RS)
1866 eth_fec |= ETHTOOL_FEC_RS;
1867 if (link_fec & QED_FEC_MODE_AUTO)
1868 eth_fec |= ETHTOOL_FEC_AUTO;
1869 if (link_fec & QED_FEC_MODE_UNSUPPORTED)
1870 eth_fec |= ETHTOOL_FEC_NONE;
1871
1872 return eth_fec;
1873 }
1874
qede_ethtool_to_link_fec(u32 eth_fec)1875 static u32 qede_ethtool_to_link_fec(u32 eth_fec)
1876 {
1877 u32 link_fec = 0;
1878
1879 if (eth_fec & ETHTOOL_FEC_OFF)
1880 link_fec |= QED_FEC_MODE_NONE;
1881 if (eth_fec & ETHTOOL_FEC_BASER)
1882 link_fec |= QED_FEC_MODE_FIRECODE;
1883 if (eth_fec & ETHTOOL_FEC_RS)
1884 link_fec |= QED_FEC_MODE_RS;
1885 if (eth_fec & ETHTOOL_FEC_AUTO)
1886 link_fec |= QED_FEC_MODE_AUTO;
1887 if (eth_fec & ETHTOOL_FEC_NONE)
1888 link_fec |= QED_FEC_MODE_UNSUPPORTED;
1889
1890 return link_fec;
1891 }
1892
qede_get_fecparam(struct net_device * dev,struct ethtool_fecparam * fecparam)1893 static int qede_get_fecparam(struct net_device *dev,
1894 struct ethtool_fecparam *fecparam)
1895 {
1896 struct qede_dev *edev = netdev_priv(dev);
1897 struct qed_link_output curr_link;
1898
1899 memset(&curr_link, 0, sizeof(curr_link));
1900 edev->ops->common->get_link(edev->cdev, &curr_link);
1901
1902 fecparam->active_fec = qede_link_to_ethtool_fec(curr_link.active_fec);
1903 fecparam->fec = qede_link_to_ethtool_fec(curr_link.sup_fec);
1904
1905 return 0;
1906 }
1907
qede_set_fecparam(struct net_device * dev,struct ethtool_fecparam * fecparam)1908 static int qede_set_fecparam(struct net_device *dev,
1909 struct ethtool_fecparam *fecparam)
1910 {
1911 struct qede_dev *edev = netdev_priv(dev);
1912 struct qed_link_params params;
1913
1914 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
1915 DP_INFO(edev, "Link settings are not allowed to be changed\n");
1916 return -EOPNOTSUPP;
1917 }
1918
1919 memset(¶ms, 0, sizeof(params));
1920 params.override_flags |= QED_LINK_OVERRIDE_FEC_CONFIG;
1921 params.fec = qede_ethtool_to_link_fec(fecparam->fec);
1922 params.link_up = true;
1923
1924 edev->ops->common->set_link(edev->cdev, ¶ms);
1925
1926 return 0;
1927 }
1928
qede_get_module_info(struct net_device * dev,struct ethtool_modinfo * modinfo)1929 static int qede_get_module_info(struct net_device *dev,
1930 struct ethtool_modinfo *modinfo)
1931 {
1932 struct qede_dev *edev = netdev_priv(dev);
1933 u8 buf[4];
1934 int rc;
1935
1936 /* Read first 4 bytes to find the sfp type */
1937 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1938 QED_I2C_DEV_ADDR_A0, 0, 4);
1939 if (rc) {
1940 DP_ERR(edev, "Failed reading EEPROM data %d\n", rc);
1941 return rc;
1942 }
1943
1944 switch (buf[0]) {
1945 case 0x3: /* SFP, SFP+, SFP-28 */
1946 modinfo->type = ETH_MODULE_SFF_8472;
1947 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1948 break;
1949 case 0xc: /* QSFP */
1950 case 0xd: /* QSFP+ */
1951 modinfo->type = ETH_MODULE_SFF_8436;
1952 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1953 break;
1954 case 0x11: /* QSFP-28 */
1955 modinfo->type = ETH_MODULE_SFF_8636;
1956 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1957 break;
1958 default:
1959 DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]);
1960 return -EINVAL;
1961 }
1962
1963 return 0;
1964 }
1965
qede_get_module_eeprom(struct net_device * dev,struct ethtool_eeprom * ee,u8 * data)1966 static int qede_get_module_eeprom(struct net_device *dev,
1967 struct ethtool_eeprom *ee, u8 *data)
1968 {
1969 struct qede_dev *edev = netdev_priv(dev);
1970 u32 start_addr = ee->offset, size = 0;
1971 u8 *buf = data;
1972 int rc = 0;
1973
1974 /* Read A0 section */
1975 if (ee->offset < ETH_MODULE_SFF_8079_LEN) {
1976 /* Limit transfer size to the A0 section boundary */
1977 if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN)
1978 size = ETH_MODULE_SFF_8079_LEN - ee->offset;
1979 else
1980 size = ee->len;
1981
1982 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1983 QED_I2C_DEV_ADDR_A0,
1984 start_addr, size);
1985 if (rc) {
1986 DP_ERR(edev, "Failed reading A0 section %d\n", rc);
1987 return rc;
1988 }
1989
1990 buf += size;
1991 start_addr += size;
1992 }
1993
1994 /* Read A2 section */
1995 if (start_addr >= ETH_MODULE_SFF_8079_LEN &&
1996 start_addr < ETH_MODULE_SFF_8472_LEN) {
1997 size = ee->len - size;
1998 /* Limit transfer size to the A2 section boundary */
1999 if (start_addr + size > ETH_MODULE_SFF_8472_LEN)
2000 size = ETH_MODULE_SFF_8472_LEN - start_addr;
2001 start_addr -= ETH_MODULE_SFF_8079_LEN;
2002 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
2003 QED_I2C_DEV_ADDR_A2,
2004 start_addr, size);
2005 if (rc) {
2006 DP_VERBOSE(edev, QED_MSG_DEBUG,
2007 "Failed reading A2 section %d\n", rc);
2008 return 0;
2009 }
2010 }
2011
2012 return rc;
2013 }
2014
qede_set_dump(struct net_device * dev,struct ethtool_dump * val)2015 static int qede_set_dump(struct net_device *dev, struct ethtool_dump *val)
2016 {
2017 struct qede_dev *edev = netdev_priv(dev);
2018 int rc = 0;
2019
2020 if (edev->dump_info.cmd == QEDE_DUMP_CMD_NONE) {
2021 if (val->flag > QEDE_DUMP_CMD_MAX) {
2022 DP_ERR(edev, "Invalid command %d\n", val->flag);
2023 return -EINVAL;
2024 }
2025 edev->dump_info.cmd = val->flag;
2026 edev->dump_info.num_args = 0;
2027 return 0;
2028 }
2029
2030 if (edev->dump_info.num_args == QEDE_DUMP_MAX_ARGS) {
2031 DP_ERR(edev, "Arg count = %d\n", edev->dump_info.num_args);
2032 return -EINVAL;
2033 }
2034
2035 switch (edev->dump_info.cmd) {
2036 case QEDE_DUMP_CMD_NVM_CFG:
2037 edev->dump_info.args[edev->dump_info.num_args] = val->flag;
2038 edev->dump_info.num_args++;
2039 break;
2040 case QEDE_DUMP_CMD_GRCDUMP:
2041 rc = edev->ops->common->set_grc_config(edev->cdev,
2042 val->flag, 1);
2043 break;
2044 default:
2045 break;
2046 }
2047
2048 return rc;
2049 }
2050
qede_get_dump_flag(struct net_device * dev,struct ethtool_dump * dump)2051 static int qede_get_dump_flag(struct net_device *dev,
2052 struct ethtool_dump *dump)
2053 {
2054 struct qede_dev *edev = netdev_priv(dev);
2055
2056 if (!edev->ops || !edev->ops->common) {
2057 DP_ERR(edev, "Edev ops not populated\n");
2058 return -EINVAL;
2059 }
2060
2061 dump->version = QEDE_DUMP_VERSION;
2062 switch (edev->dump_info.cmd) {
2063 case QEDE_DUMP_CMD_NVM_CFG:
2064 dump->flag = QEDE_DUMP_CMD_NVM_CFG;
2065 dump->len = edev->ops->common->read_nvm_cfg_len(edev->cdev,
2066 edev->dump_info.args[0]);
2067 break;
2068 case QEDE_DUMP_CMD_GRCDUMP:
2069 dump->flag = QEDE_DUMP_CMD_GRCDUMP;
2070 dump->len = edev->ops->common->dbg_all_data_size(edev->cdev);
2071 break;
2072 default:
2073 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd);
2074 return -EINVAL;
2075 }
2076
2077 DP_VERBOSE(edev, QED_MSG_DEBUG,
2078 "dump->version = 0x%x dump->flag = %d dump->len = %d\n",
2079 dump->version, dump->flag, dump->len);
2080 return 0;
2081 }
2082
qede_get_dump_data(struct net_device * dev,struct ethtool_dump * dump,void * buf)2083 static int qede_get_dump_data(struct net_device *dev,
2084 struct ethtool_dump *dump, void *buf)
2085 {
2086 struct qede_dev *edev = netdev_priv(dev);
2087 int rc = 0;
2088
2089 if (!edev->ops || !edev->ops->common) {
2090 DP_ERR(edev, "Edev ops not populated\n");
2091 rc = -EINVAL;
2092 goto err;
2093 }
2094
2095 switch (edev->dump_info.cmd) {
2096 case QEDE_DUMP_CMD_NVM_CFG:
2097 if (edev->dump_info.num_args != QEDE_DUMP_NVM_ARG_COUNT) {
2098 DP_ERR(edev, "Arg count = %d required = %d\n",
2099 edev->dump_info.num_args,
2100 QEDE_DUMP_NVM_ARG_COUNT);
2101 rc = -EINVAL;
2102 goto err;
2103 }
2104 rc = edev->ops->common->read_nvm_cfg(edev->cdev, (u8 **)&buf,
2105 edev->dump_info.args[0],
2106 edev->dump_info.args[1]);
2107 break;
2108 case QEDE_DUMP_CMD_GRCDUMP:
2109 memset(buf, 0, dump->len);
2110 rc = edev->ops->common->dbg_all_data(edev->cdev, buf);
2111 break;
2112 default:
2113 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd);
2114 rc = -EINVAL;
2115 break;
2116 }
2117
2118 err:
2119 edev->dump_info.cmd = QEDE_DUMP_CMD_NONE;
2120 edev->dump_info.num_args = 0;
2121 memset(edev->dump_info.args, 0, sizeof(edev->dump_info.args));
2122
2123 return rc;
2124 }
2125
2126 static const struct ethtool_ops qede_ethtool_ops = {
2127 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
2128 ETHTOOL_COALESCE_STATS_BLOCK_USECS,
2129 .get_link_ksettings = qede_get_link_ksettings,
2130 .set_link_ksettings = qede_set_link_ksettings,
2131 .get_drvinfo = qede_get_drvinfo,
2132 .get_regs_len = qede_get_regs_len,
2133 .get_regs = qede_get_regs,
2134 .get_wol = qede_get_wol,
2135 .set_wol = qede_set_wol,
2136 .get_msglevel = qede_get_msglevel,
2137 .set_msglevel = qede_set_msglevel,
2138 .nway_reset = qede_nway_reset,
2139 .get_link = qede_get_link,
2140 .get_coalesce = qede_get_coalesce,
2141 .set_coalesce = qede_set_coalesce,
2142 .get_ringparam = qede_get_ringparam,
2143 .set_ringparam = qede_set_ringparam,
2144 .get_pauseparam = qede_get_pauseparam,
2145 .set_pauseparam = qede_set_pauseparam,
2146 .get_strings = qede_get_strings,
2147 .set_phys_id = qede_set_phys_id,
2148 .get_ethtool_stats = qede_get_ethtool_stats,
2149 .get_priv_flags = qede_get_priv_flags,
2150 .set_priv_flags = qede_set_priv_flags,
2151 .get_sset_count = qede_get_sset_count,
2152 .get_rxnfc = qede_get_rxnfc,
2153 .set_rxnfc = qede_set_rxnfc,
2154 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
2155 .get_rxfh_key_size = qede_get_rxfh_key_size,
2156 .get_rxfh = qede_get_rxfh,
2157 .set_rxfh = qede_set_rxfh,
2158 .get_ts_info = qede_get_ts_info,
2159 .get_channels = qede_get_channels,
2160 .set_channels = qede_set_channels,
2161 .self_test = qede_self_test,
2162 .get_module_info = qede_get_module_info,
2163 .get_module_eeprom = qede_get_module_eeprom,
2164 .get_eee = qede_get_eee,
2165 .set_eee = qede_set_eee,
2166 .get_fecparam = qede_get_fecparam,
2167 .set_fecparam = qede_set_fecparam,
2168 .get_tunable = qede_get_tunable,
2169 .set_tunable = qede_set_tunable,
2170 .flash_device = qede_flash_device,
2171 .get_dump_flag = qede_get_dump_flag,
2172 .get_dump_data = qede_get_dump_data,
2173 .set_dump = qede_set_dump,
2174 };
2175
2176 static const struct ethtool_ops qede_vf_ethtool_ops = {
2177 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
2178 ETHTOOL_COALESCE_STATS_BLOCK_USECS,
2179 .get_link_ksettings = qede_get_link_ksettings,
2180 .get_drvinfo = qede_get_drvinfo,
2181 .get_msglevel = qede_get_msglevel,
2182 .set_msglevel = qede_set_msglevel,
2183 .get_link = qede_get_link,
2184 .get_coalesce = qede_get_coalesce,
2185 .set_coalesce = qede_set_coalesce,
2186 .get_ringparam = qede_get_ringparam,
2187 .set_ringparam = qede_set_ringparam,
2188 .get_strings = qede_get_strings,
2189 .get_ethtool_stats = qede_get_ethtool_stats,
2190 .get_priv_flags = qede_get_priv_flags,
2191 .get_sset_count = qede_get_sset_count,
2192 .get_rxnfc = qede_get_rxnfc,
2193 .set_rxnfc = qede_set_rxnfc,
2194 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
2195 .get_rxfh_key_size = qede_get_rxfh_key_size,
2196 .get_rxfh = qede_get_rxfh,
2197 .set_rxfh = qede_set_rxfh,
2198 .get_channels = qede_get_channels,
2199 .set_channels = qede_set_channels,
2200 .get_tunable = qede_get_tunable,
2201 .set_tunable = qede_set_tunable,
2202 };
2203
qede_set_ethtool_ops(struct net_device * dev)2204 void qede_set_ethtool_ops(struct net_device *dev)
2205 {
2206 struct qede_dev *edev = netdev_priv(dev);
2207
2208 if (IS_VF(edev))
2209 dev->ethtool_ops = &qede_vf_ethtool_ops;
2210 else
2211 dev->ethtool_ops = &qede_ethtool_ops;
2212 }
2213