1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc.
3 *
4 * Author: Felix Fietkau <nbd@nbd.name>
5 * Lorenzo Bianconi <lorenzo@kernel.org>
6 * Sean Wang <sean.wang@mediatek.com>
7 */
8
9 #include <linux/kernel.h>
10 #include <linux/iopoll.h>
11 #include <linux/module.h>
12
13 #include <linux/mmc/host.h>
14 #include <linux/mmc/sdio_ids.h>
15 #include <linux/mmc/sdio_func.h>
16
17 #include "mt7615.h"
18 #include "sdio.h"
19 #include "mac.h"
20
21 static const struct sdio_device_id mt7663s_table[] = {
22 { SDIO_DEVICE(SDIO_VENDOR_ID_MEDIATEK, 0x7603) },
23 { } /* Terminating entry */
24 };
25
mt7663s_read_whisr(struct mt76_dev * dev)26 static u32 mt7663s_read_whisr(struct mt76_dev *dev)
27 {
28 return sdio_readl(dev->sdio.func, MCR_WHISR, NULL);
29 }
30
mt7663s_read_pcr(struct mt7615_dev * dev)31 u32 mt7663s_read_pcr(struct mt7615_dev *dev)
32 {
33 struct mt76_sdio *sdio = &dev->mt76.sdio;
34
35 return sdio_readl(sdio->func, MCR_WHLPCR, NULL);
36 }
37
mt7663s_read_mailbox(struct mt76_dev * dev,u32 offset)38 static u32 mt7663s_read_mailbox(struct mt76_dev *dev, u32 offset)
39 {
40 struct sdio_func *func = dev->sdio.func;
41 u32 val = ~0, status;
42 int err;
43
44 sdio_claim_host(func);
45
46 sdio_writel(func, offset, MCR_H2DSM0R, &err);
47 if (err < 0) {
48 dev_err(dev->dev, "failed setting address [err=%d]\n", err);
49 goto out;
50 }
51
52 sdio_writel(func, H2D_SW_INT_READ, MCR_WSICR, &err);
53 if (err < 0) {
54 dev_err(dev->dev, "failed setting read mode [err=%d]\n", err);
55 goto out;
56 }
57
58 err = readx_poll_timeout(mt7663s_read_whisr, dev, status,
59 status & H2D_SW_INT_READ, 0, 1000000);
60 if (err < 0) {
61 dev_err(dev->dev, "query whisr timeout\n");
62 goto out;
63 }
64
65 sdio_writel(func, H2D_SW_INT_READ, MCR_WHISR, &err);
66 if (err < 0) {
67 dev_err(dev->dev, "failed setting read mode [err=%d]\n", err);
68 goto out;
69 }
70
71 val = sdio_readl(func, MCR_H2DSM0R, &err);
72 if (err < 0) {
73 dev_err(dev->dev, "failed reading h2dsm0r [err=%d]\n", err);
74 goto out;
75 }
76
77 if (val != offset) {
78 dev_err(dev->dev, "register mismatch\n");
79 val = ~0;
80 goto out;
81 }
82
83 val = sdio_readl(func, MCR_D2HRM1R, &err);
84 if (err < 0)
85 dev_err(dev->dev, "failed reading d2hrm1r [err=%d]\n", err);
86
87 out:
88 sdio_release_host(func);
89
90 return val;
91 }
92
mt7663s_write_mailbox(struct mt76_dev * dev,u32 offset,u32 val)93 static void mt7663s_write_mailbox(struct mt76_dev *dev, u32 offset, u32 val)
94 {
95 struct sdio_func *func = dev->sdio.func;
96 u32 status;
97 int err;
98
99 sdio_claim_host(func);
100
101 sdio_writel(func, offset, MCR_H2DSM0R, &err);
102 if (err < 0) {
103 dev_err(dev->dev, "failed setting address [err=%d]\n", err);
104 goto out;
105 }
106
107 sdio_writel(func, val, MCR_H2DSM1R, &err);
108 if (err < 0) {
109 dev_err(dev->dev,
110 "failed setting write value [err=%d]\n", err);
111 goto out;
112 }
113
114 sdio_writel(func, H2D_SW_INT_WRITE, MCR_WSICR, &err);
115 if (err < 0) {
116 dev_err(dev->dev, "failed setting write mode [err=%d]\n", err);
117 goto out;
118 }
119
120 err = readx_poll_timeout(mt7663s_read_whisr, dev, status,
121 status & H2D_SW_INT_WRITE, 0, 1000000);
122 if (err < 0) {
123 dev_err(dev->dev, "query whisr timeout\n");
124 goto out;
125 }
126
127 sdio_writel(func, H2D_SW_INT_WRITE, MCR_WHISR, &err);
128 if (err < 0) {
129 dev_err(dev->dev, "failed setting write mode [err=%d]\n", err);
130 goto out;
131 }
132
133 val = sdio_readl(func, MCR_H2DSM0R, &err);
134 if (err < 0) {
135 dev_err(dev->dev, "failed reading h2dsm0r [err=%d]\n", err);
136 goto out;
137 }
138
139 if (val != offset)
140 dev_err(dev->dev, "register mismatch\n");
141
142 out:
143 sdio_release_host(func);
144 }
145
mt7663s_rr(struct mt76_dev * dev,u32 offset)146 static u32 mt7663s_rr(struct mt76_dev *dev, u32 offset)
147 {
148 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->phy.state))
149 return dev->mcu_ops->mcu_rr(dev, offset);
150 else
151 return mt7663s_read_mailbox(dev, offset);
152 }
153
mt7663s_wr(struct mt76_dev * dev,u32 offset,u32 val)154 static void mt7663s_wr(struct mt76_dev *dev, u32 offset, u32 val)
155 {
156 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->phy.state))
157 dev->mcu_ops->mcu_wr(dev, offset, val);
158 else
159 mt7663s_write_mailbox(dev, offset, val);
160 }
161
mt7663s_rmw(struct mt76_dev * dev,u32 offset,u32 mask,u32 val)162 static u32 mt7663s_rmw(struct mt76_dev *dev, u32 offset, u32 mask, u32 val)
163 {
164 val |= mt7663s_rr(dev, offset) & ~mask;
165 mt7663s_wr(dev, offset, val);
166
167 return val;
168 }
169
mt7663s_write_copy(struct mt76_dev * dev,u32 offset,const void * data,int len)170 static void mt7663s_write_copy(struct mt76_dev *dev, u32 offset,
171 const void *data, int len)
172 {
173 const u32 *val = data;
174 int i;
175
176 for (i = 0; i < len / sizeof(u32); i++) {
177 mt7663s_wr(dev, offset, val[i]);
178 offset += sizeof(u32);
179 }
180 }
181
mt7663s_read_copy(struct mt76_dev * dev,u32 offset,void * data,int len)182 static void mt7663s_read_copy(struct mt76_dev *dev, u32 offset,
183 void *data, int len)
184 {
185 u32 *val = data;
186 int i;
187
188 for (i = 0; i < len / sizeof(u32); i++) {
189 val[i] = mt7663s_rr(dev, offset);
190 offset += sizeof(u32);
191 }
192 }
193
mt7663s_wr_rp(struct mt76_dev * dev,u32 base,const struct mt76_reg_pair * data,int len)194 static int mt7663s_wr_rp(struct mt76_dev *dev, u32 base,
195 const struct mt76_reg_pair *data,
196 int len)
197 {
198 int i;
199
200 for (i = 0; i < len; i++) {
201 mt7663s_wr(dev, data->reg, data->value);
202 data++;
203 }
204
205 return 0;
206 }
207
mt7663s_rd_rp(struct mt76_dev * dev,u32 base,struct mt76_reg_pair * data,int len)208 static int mt7663s_rd_rp(struct mt76_dev *dev, u32 base,
209 struct mt76_reg_pair *data,
210 int len)
211 {
212 int i;
213
214 for (i = 0; i < len; i++) {
215 data->value = mt7663s_rr(dev, data->reg);
216 data++;
217 }
218
219 return 0;
220 }
221
mt7663s_init_work(struct work_struct * work)222 static void mt7663s_init_work(struct work_struct *work)
223 {
224 struct mt7615_dev *dev;
225
226 dev = container_of(work, struct mt7615_dev, mcu_work);
227 if (mt7663s_mcu_init(dev))
228 return;
229
230 mt7615_mcu_set_eeprom(dev);
231 mt7615_mac_init(dev);
232 mt7615_phy_init(dev);
233 mt7615_mcu_del_wtbl_all(dev);
234 mt7615_check_offload_capability(dev);
235 }
236
mt7663s_hw_init(struct mt7615_dev * dev,struct sdio_func * func)237 static int mt7663s_hw_init(struct mt7615_dev *dev, struct sdio_func *func)
238 {
239 u32 status, ctrl;
240 int ret;
241
242 sdio_claim_host(func);
243
244 ret = sdio_enable_func(func);
245 if (ret < 0)
246 goto release;
247
248 /* Get ownership from the device */
249 sdio_writel(func, WHLPCR_INT_EN_CLR | WHLPCR_FW_OWN_REQ_CLR,
250 MCR_WHLPCR, &ret);
251 if (ret < 0)
252 goto disable_func;
253
254 ret = readx_poll_timeout(mt7663s_read_pcr, dev, status,
255 status & WHLPCR_IS_DRIVER_OWN, 2000, 1000000);
256 if (ret < 0) {
257 dev_err(dev->mt76.dev, "Cannot get ownership from device");
258 goto disable_func;
259 }
260
261 ret = sdio_set_block_size(func, 512);
262 if (ret < 0)
263 goto disable_func;
264
265 /* Enable interrupt */
266 sdio_writel(func, WHLPCR_INT_EN_SET, MCR_WHLPCR, &ret);
267 if (ret < 0)
268 goto disable_func;
269
270 ctrl = WHIER_RX0_DONE_INT_EN | WHIER_TX_DONE_INT_EN;
271 sdio_writel(func, ctrl, MCR_WHIER, &ret);
272 if (ret < 0)
273 goto disable_func;
274
275 /* set WHISR as read clear and Rx aggregation number as 16 */
276 ctrl = FIELD_PREP(MAX_HIF_RX_LEN_NUM, 16);
277 sdio_writel(func, ctrl, MCR_WHCR, &ret);
278 if (ret < 0)
279 goto disable_func;
280
281 ret = sdio_claim_irq(func, mt7663s_sdio_irq);
282 if (ret < 0)
283 goto disable_func;
284
285 sdio_release_host(func);
286
287 return 0;
288
289 disable_func:
290 sdio_disable_func(func);
291 release:
292 sdio_release_host(func);
293
294 return ret;
295 }
296
mt7663s_sta_add(struct mt76_dev * mdev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)297 static int mt7663s_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
298 struct ieee80211_sta *sta)
299 {
300 struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
301 struct mt76_sdio *sdio = &mdev->sdio;
302 u32 pse, ple;
303 int err;
304
305 err = mt7615_mac_sta_add(mdev, vif, sta);
306 if (err < 0)
307 return err;
308
309 /* init sched data quota */
310 pse = mt76_get_field(dev, MT_PSE_PG_HIF0_GROUP, MT_HIF0_MIN_QUOTA);
311 ple = mt76_get_field(dev, MT_PLE_PG_HIF0_GROUP, MT_HIF0_MIN_QUOTA);
312
313 mutex_lock(&sdio->sched.lock);
314 sdio->sched.pse_data_quota = pse;
315 sdio->sched.ple_data_quota = ple;
316 mutex_unlock(&sdio->sched.lock);
317
318 return 0;
319 }
320
mt7663s_probe(struct sdio_func * func,const struct sdio_device_id * id)321 static int mt7663s_probe(struct sdio_func *func,
322 const struct sdio_device_id *id)
323 {
324 static const struct mt76_driver_ops drv_ops = {
325 .txwi_size = MT_USB_TXD_SIZE,
326 .drv_flags = MT_DRV_RX_DMA_HDR,
327 .tx_prepare_skb = mt7663_usb_sdio_tx_prepare_skb,
328 .tx_complete_skb = mt7663_usb_sdio_tx_complete_skb,
329 .tx_status_data = mt7663_usb_sdio_tx_status_data,
330 .rx_skb = mt7615_queue_rx_skb,
331 .sta_ps = mt7615_sta_ps,
332 .sta_add = mt7663s_sta_add,
333 .sta_remove = mt7615_mac_sta_remove,
334 .update_survey = mt7615_update_channel,
335 };
336 static const struct mt76_bus_ops mt7663s_ops = {
337 .rr = mt7663s_rr,
338 .rmw = mt7663s_rmw,
339 .wr = mt7663s_wr,
340 .write_copy = mt7663s_write_copy,
341 .read_copy = mt7663s_read_copy,
342 .wr_rp = mt7663s_wr_rp,
343 .rd_rp = mt7663s_rd_rp,
344 .type = MT76_BUS_SDIO,
345 };
346 struct ieee80211_ops *ops;
347 struct mt7615_dev *dev;
348 struct mt76_dev *mdev;
349 int i, ret;
350
351 ops = devm_kmemdup(&func->dev, &mt7615_ops, sizeof(mt7615_ops),
352 GFP_KERNEL);
353 if (!ops)
354 return -ENOMEM;
355
356 mdev = mt76_alloc_device(&func->dev, sizeof(*dev), ops, &drv_ops);
357 if (!mdev)
358 return -ENOMEM;
359
360 dev = container_of(mdev, struct mt7615_dev, mt76);
361
362 INIT_WORK(&dev->mcu_work, mt7663s_init_work);
363 dev->reg_map = mt7663_usb_sdio_reg_map;
364 dev->ops = ops;
365 sdio_set_drvdata(func, dev);
366
367 ret = mt76s_init(mdev, func, &mt7663s_ops);
368 if (ret < 0)
369 goto err_free;
370
371 INIT_WORK(&mdev->sdio.tx.xmit_work, mt7663s_tx_work);
372 INIT_WORK(&mdev->sdio.rx.recv_work, mt7663s_rx_work);
373
374 ret = mt7663s_hw_init(dev, func);
375 if (ret)
376 goto err_deinit;
377
378 mdev->rev = (mt76_rr(dev, MT_HW_CHIPID) << 16) |
379 (mt76_rr(dev, MT_HW_REV) & 0xff);
380 dev_dbg(mdev->dev, "ASIC revision: %04x\n", mdev->rev);
381
382 mdev->sdio.intr_data = devm_kmalloc(mdev->dev,
383 sizeof(struct mt76s_intr),
384 GFP_KERNEL);
385 if (!mdev->sdio.intr_data) {
386 ret = -ENOMEM;
387 goto err_deinit;
388 }
389
390 for (i = 0; i < ARRAY_SIZE(mdev->sdio.xmit_buf); i++) {
391 mdev->sdio.xmit_buf[i] = devm_kmalloc(mdev->dev,
392 MT76S_XMIT_BUF_SZ,
393 GFP_KERNEL);
394 if (!mdev->sdio.xmit_buf[i]) {
395 ret = -ENOMEM;
396 goto err_deinit;
397 }
398 }
399
400 ret = mt76s_alloc_queues(&dev->mt76);
401 if (ret)
402 goto err_deinit;
403
404 ret = mt7663_usb_sdio_register_device(dev);
405 if (ret)
406 goto err_deinit;
407
408 return 0;
409
410 err_deinit:
411 mt76s_deinit(&dev->mt76);
412 err_free:
413 mt76_free_device(&dev->mt76);
414
415 return ret;
416 }
417
mt7663s_remove(struct sdio_func * func)418 static void mt7663s_remove(struct sdio_func *func)
419 {
420 struct mt7615_dev *dev = sdio_get_drvdata(func);
421
422 if (!test_and_clear_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
423 return;
424
425 ieee80211_unregister_hw(dev->mt76.hw);
426 mt76s_deinit(&dev->mt76);
427 mt76_free_device(&dev->mt76);
428 }
429
430 #ifdef CONFIG_PM
mt7663s_suspend(struct device * dev)431 static int mt7663s_suspend(struct device *dev)
432 {
433 struct sdio_func *func = dev_to_sdio_func(dev);
434 struct mt7615_dev *mdev = sdio_get_drvdata(func);
435
436 if (!test_bit(MT76_STATE_SUSPEND, &mdev->mphy.state) &&
437 mt7615_firmware_offload(mdev)) {
438 int err;
439
440 err = mt7615_mcu_set_hif_suspend(mdev, true);
441 if (err < 0)
442 return err;
443 }
444
445 sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER);
446
447 mt76s_stop_txrx(&mdev->mt76);
448
449 return mt7615_mcu_set_fw_ctrl(mdev);
450 }
451
mt7663s_resume(struct device * dev)452 static int mt7663s_resume(struct device *dev)
453 {
454 struct sdio_func *func = dev_to_sdio_func(dev);
455 struct mt7615_dev *mdev = sdio_get_drvdata(func);
456 int err;
457
458 err = mt7615_mcu_set_drv_ctrl(mdev);
459 if (err)
460 return err;
461
462 if (!test_bit(MT76_STATE_SUSPEND, &mdev->mphy.state) &&
463 mt7615_firmware_offload(mdev))
464 err = mt7615_mcu_set_hif_suspend(mdev, false);
465
466 return err;
467 }
468
469 static const struct dev_pm_ops mt7663s_pm_ops = {
470 .suspend = mt7663s_suspend,
471 .resume = mt7663s_resume,
472 };
473 #endif
474
475 MODULE_DEVICE_TABLE(sdio, mt7663s_table);
476 MODULE_FIRMWARE(MT7663_OFFLOAD_FIRMWARE_N9);
477 MODULE_FIRMWARE(MT7663_OFFLOAD_ROM_PATCH);
478 MODULE_FIRMWARE(MT7663_FIRMWARE_N9);
479 MODULE_FIRMWARE(MT7663_ROM_PATCH);
480
481 static struct sdio_driver mt7663s_driver = {
482 .name = KBUILD_MODNAME,
483 .probe = mt7663s_probe,
484 .remove = mt7663s_remove,
485 .id_table = mt7663s_table,
486 #ifdef CONFIG_PM
487 .drv = {
488 .pm = &mt7663s_pm_ops,
489 }
490 #endif
491 };
492 module_sdio_driver(mt7663s_driver);
493
494 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
495 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
496 MODULE_LICENSE("Dual BSD/GPL");
497