1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * SH7203 Pinmux 4 * 5 * Copyright (C) 2008 Magnus Damm 6 */ 7 8 #include <linux/kernel.h> 9 #include <linux/gpio.h> 10 #include <cpu/sh7203.h> 11 12 #include "sh_pfc.h" 13 14 enum { 15 PINMUX_RESERVED = 0, 16 17 PINMUX_DATA_BEGIN, 18 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA, 19 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA, 20 PB12_DATA, 21 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA, 22 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA, 23 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA, 24 PC14_DATA, PC13_DATA, PC12_DATA, 25 PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA, 26 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA, 27 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA, 28 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA, 29 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA, 30 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA, 31 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA, 32 PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA, 33 PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA, 34 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA, 35 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA, 36 PF30_DATA, PF29_DATA, PF28_DATA, 37 PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA, 38 PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA, 39 PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA, 40 PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA, 41 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA, 42 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA, 43 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA, 44 PINMUX_DATA_END, 45 46 PINMUX_INPUT_BEGIN, 47 FORCE_IN, 48 PA7_IN, PA6_IN, PA5_IN, PA4_IN, 49 PA3_IN, PA2_IN, PA1_IN, PA0_IN, 50 PB11_IN, PB10_IN, PB9_IN, PB8_IN, 51 PC14_IN, PC13_IN, PC12_IN, 52 PC11_IN, PC10_IN, PC9_IN, PC8_IN, 53 PC7_IN, PC6_IN, PC5_IN, PC4_IN, 54 PC3_IN, PC2_IN, PC1_IN, PC0_IN, 55 PD15_IN, PD14_IN, PD13_IN, PD12_IN, 56 PD11_IN, PD10_IN, PD9_IN, PD8_IN, 57 PD7_IN, PD6_IN, PD5_IN, PD4_IN, 58 PD3_IN, PD2_IN, PD1_IN, PD0_IN, 59 PE15_IN, PE14_IN, PE13_IN, PE12_IN, 60 PE11_IN, PE10_IN, PE9_IN, PE8_IN, 61 PE7_IN, PE6_IN, PE5_IN, PE4_IN, 62 PE3_IN, PE2_IN, PE1_IN, PE0_IN, 63 PF30_IN, PF29_IN, PF28_IN, 64 PF27_IN, PF26_IN, PF25_IN, PF24_IN, 65 PF23_IN, PF22_IN, PF21_IN, PF20_IN, 66 PF19_IN, PF18_IN, PF17_IN, PF16_IN, 67 PF15_IN, PF14_IN, PF13_IN, PF12_IN, 68 PF11_IN, PF10_IN, PF9_IN, PF8_IN, 69 PF7_IN, PF6_IN, PF5_IN, PF4_IN, 70 PF3_IN, PF2_IN, PF1_IN, PF0_IN, 71 PINMUX_INPUT_END, 72 73 PINMUX_OUTPUT_BEGIN, 74 FORCE_OUT, 75 PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT, 76 PC14_OUT, PC13_OUT, PC12_OUT, 77 PC11_OUT, PC10_OUT, PC9_OUT, PC8_OUT, 78 PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT, 79 PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT, 80 PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT, 81 PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT, 82 PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT, 83 PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT, 84 PE15_OUT, PE14_OUT, PE13_OUT, PE12_OUT, 85 PE11_OUT, PE10_OUT, PE9_OUT, PE8_OUT, 86 PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT, 87 PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT, 88 PF30_OUT, PF29_OUT, PF28_OUT, 89 PF27_OUT, PF26_OUT, PF25_OUT, PF24_OUT, 90 PF23_OUT, PF22_OUT, PF21_OUT, PF20_OUT, 91 PF19_OUT, PF18_OUT, PF17_OUT, PF16_OUT, 92 PF15_OUT, PF14_OUT, PF13_OUT, PF12_OUT, 93 PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT, 94 PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT, 95 PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT, 96 PINMUX_OUTPUT_END, 97 98 PINMUX_FUNCTION_BEGIN, 99 PB11_IOR_IN, PB11_IOR_OUT, 100 PB10_IOR_IN, PB10_IOR_OUT, 101 PB9_IOR_IN, PB9_IOR_OUT, 102 PB8_IOR_IN, PB8_IOR_OUT, 103 PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11, 104 PB11MD_0, PB11MD_1, 105 PB10MD_0, PB10MD_1, 106 PB9MD_00, PB9MD_01, PB9MD_10, 107 PB8MD_00, PB8MD_01, PB8MD_10, 108 PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11, 109 PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11, 110 PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11, 111 PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11, 112 PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11, 113 PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11, 114 PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11, 115 PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11, 116 117 PB12IRQ_00, PB12IRQ_01, PB12IRQ_10, 118 119 PC14MD_0, PC14MD_1, 120 PC13MD_0, PC13MD_1, 121 PC12MD_0, PC12MD_1, 122 PC11MD_00, PC11MD_01, PC11MD_10, 123 PC10MD_00, PC10MD_01, PC10MD_10, 124 PC9MD_0, PC9MD_1, 125 PC8MD_0, PC8MD_1, 126 PC7MD_0, PC7MD_1, 127 PC6MD_0, PC6MD_1, 128 PC5MD_0, PC5MD_1, 129 PC4MD_0, PC4MD_1, 130 PC3MD_0, PC3MD_1, 131 PC2MD_0, PC2MD_1, 132 PC1MD_0, PC1MD_1, 133 PC0MD_00, PC0MD_01, PC0MD_10, 134 135 PD15MD_000, PD15MD_001, PD15MD_010, PD15MD_100, PD15MD_101, 136 PD14MD_000, PD14MD_001, PD14MD_010, PD14MD_101, 137 PD13MD_000, PD13MD_001, PD13MD_010, PD13MD_100, PD13MD_101, 138 PD12MD_000, PD12MD_001, PD12MD_010, PD12MD_100, PD12MD_101, 139 PD11MD_000, PD11MD_001, PD11MD_010, PD11MD_100, PD11MD_101, 140 PD10MD_000, PD10MD_001, PD10MD_010, PD10MD_100, PD10MD_101, 141 PD9MD_000, PD9MD_001, PD9MD_010, PD9MD_100, PD9MD_101, 142 PD8MD_000, PD8MD_001, PD8MD_010, PD8MD_100, PD8MD_101, 143 PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011, PD7MD_100, PD7MD_101, 144 PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011, PD6MD_100, PD6MD_101, 145 PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011, PD5MD_100, PD5MD_101, 146 PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011, PD4MD_100, PD4MD_101, 147 PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011, PD3MD_100, PD3MD_101, 148 PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011, PD2MD_100, PD2MD_101, 149 PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011, PD1MD_100, PD1MD_101, 150 PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011, PD0MD_100, PD0MD_101, 151 152 PE15MD_00, PE15MD_01, PE15MD_11, 153 PE14MD_00, PE14MD_01, PE14MD_11, 154 PE13MD_00, PE13MD_11, 155 PE12MD_00, PE12MD_11, 156 PE11MD_000, PE11MD_001, PE11MD_010, PE11MD_100, 157 PE10MD_000, PE10MD_001, PE10MD_010, PE10MD_100, 158 PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11, 159 PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11, 160 PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011, PE7MD_100, 161 PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011, PE6MD_100, 162 PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011, PE5MD_100, 163 PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011, PE4MD_100, 164 PE3MD_00, PE3MD_01, PE3MD_11, 165 PE2MD_00, PE2MD_01, PE2MD_11, 166 PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11, 167 PE0MD_000, PE0MD_001, PE0MD_011, PE0MD_100, 168 169 PF30MD_0, PF30MD_1, 170 PF29MD_0, PF29MD_1, 171 PF28MD_0, PF28MD_1, 172 PF27MD_0, PF27MD_1, 173 PF26MD_0, PF26MD_1, 174 PF25MD_0, PF25MD_1, 175 PF24MD_0, PF24MD_1, 176 PF23MD_00, PF23MD_01, PF23MD_10, 177 PF22MD_00, PF22MD_01, PF22MD_10, 178 PF21MD_00, PF21MD_01, PF21MD_10, 179 PF20MD_00, PF20MD_01, PF20MD_10, 180 PF19MD_00, PF19MD_01, PF19MD_10, 181 PF18MD_00, PF18MD_01, PF18MD_10, 182 PF17MD_00, PF17MD_01, PF17MD_10, 183 PF16MD_00, PF16MD_01, PF16MD_10, 184 PF15MD_00, PF15MD_01, PF15MD_10, 185 PF14MD_00, PF14MD_01, PF14MD_10, 186 PF13MD_00, PF13MD_01, PF13MD_10, 187 PF12MD_00, PF12MD_01, PF12MD_10, 188 PF11MD_00, PF11MD_01, PF11MD_10, 189 PF10MD_00, PF10MD_01, PF10MD_10, 190 PF9MD_00, PF9MD_01, PF9MD_10, 191 PF8MD_00, PF8MD_01, PF8MD_10, 192 PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11, 193 PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11, 194 PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11, 195 PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11, 196 PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11, 197 PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11, 198 PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11, 199 PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11, 200 PINMUX_FUNCTION_END, 201 202 PINMUX_MARK_BEGIN, 203 PINT7_PB_MARK, PINT6_PB_MARK, PINT5_PB_MARK, PINT4_PB_MARK, 204 PINT3_PB_MARK, PINT2_PB_MARK, PINT1_PB_MARK, PINT0_PB_MARK, 205 PINT7_PD_MARK, PINT6_PD_MARK, PINT5_PD_MARK, PINT4_PD_MARK, 206 PINT3_PD_MARK, PINT2_PD_MARK, PINT1_PD_MARK, PINT0_PD_MARK, 207 IRQ7_PB_MARK, IRQ6_PB_MARK, IRQ5_PB_MARK, IRQ4_PB_MARK, 208 IRQ3_PB_MARK, IRQ2_PB_MARK, IRQ1_PB_MARK, IRQ0_PB_MARK, 209 IRQ7_PD_MARK, IRQ6_PD_MARK, IRQ5_PD_MARK, IRQ4_PD_MARK, 210 IRQ3_PD_MARK, IRQ2_PD_MARK, IRQ1_PD_MARK, IRQ0_PD_MARK, 211 IRQ7_PE_MARK, IRQ6_PE_MARK, IRQ5_PE_MARK, IRQ4_PE_MARK, 212 IRQ3_PE_MARK, IRQ2_PE_MARK, IRQ1_PE_MARK, IRQ0_PE_MARK, 213 WDTOVF_MARK, IRQOUT_MARK, REFOUT_MARK, IRQOUT_REFOUT_MARK, 214 UBCTRG_MARK, 215 CTX1_MARK, CRX1_MARK, CTX0_MARK, CTX0_CTX1_MARK, 216 CRX0_MARK, CRX0_CRX1_MARK, 217 SDA3_MARK, SCL3_MARK, 218 SDA2_MARK, SCL2_MARK, 219 SDA1_MARK, SCL1_MARK, 220 SDA0_MARK, SCL0_MARK, 221 TEND0_PD_MARK, TEND0_PE_MARK, DACK0_PD_MARK, DACK0_PE_MARK, 222 DREQ0_PD_MARK, DREQ0_PE_MARK, TEND1_PD_MARK, TEND1_PE_MARK, 223 DACK1_PD_MARK, DACK1_PE_MARK, DREQ1_PD_MARK, DREQ1_PE_MARK, 224 DACK2_MARK, DREQ2_MARK, DACK3_MARK, DREQ3_MARK, 225 ADTRG_PD_MARK, ADTRG_PE_MARK, 226 D31_MARK, D30_MARK, D29_MARK, D28_MARK, 227 D27_MARK, D26_MARK, D25_MARK, D24_MARK, 228 D23_MARK, D22_MARK, D21_MARK, D20_MARK, 229 D19_MARK, D18_MARK, D17_MARK, D16_MARK, 230 A25_MARK, A24_MARK, A23_MARK, A22_MARK, 231 A21_MARK, CS4_MARK, MRES_MARK, BS_MARK, 232 IOIS16_MARK, CS1_MARK, CS6_CE1B_MARK, CE2B_MARK, 233 CS5_CE1A_MARK, CE2A_MARK, FRAME_MARK, WAIT_MARK, 234 RDWR_MARK, CKE_MARK, CASU_MARK, BREQ_MARK, 235 RASU_MARK, BACK_MARK, CASL_MARK, RASL_MARK, 236 WE3_DQMUU_AH_ICIO_WR_MARK, WE2_DQMUL_ICIORD_MARK, 237 WE1_DQMLU_WE_MARK, WE0_DQMLL_MARK, 238 CS3_MARK, CS2_MARK, A1_MARK, A0_MARK, CS7_MARK, 239 TIOC4D_MARK, TIOC4C_MARK, TIOC4B_MARK, TIOC4A_MARK, 240 TIOC3D_MARK, TIOC3C_MARK, TIOC3B_MARK, TIOC3A_MARK, 241 TIOC2B_MARK, TIOC1B_MARK, TIOC2A_MARK, TIOC1A_MARK, 242 TIOC0D_MARK, TIOC0C_MARK, TIOC0B_MARK, TIOC0A_MARK, 243 TCLKD_PD_MARK, TCLKC_PD_MARK, TCLKB_PD_MARK, TCLKA_PD_MARK, 244 TCLKD_PF_MARK, TCLKC_PF_MARK, TCLKB_PF_MARK, TCLKA_PF_MARK, 245 SCS0_PD_MARK, SSO0_PD_MARK, SSI0_PD_MARK, SSCK0_PD_MARK, 246 SCS0_PF_MARK, SSO0_PF_MARK, SSI0_PF_MARK, SSCK0_PF_MARK, 247 SCS1_PD_MARK, SSO1_PD_MARK, SSI1_PD_MARK, SSCK1_PD_MARK, 248 SCS1_PF_MARK, SSO1_PF_MARK, SSI1_PF_MARK, SSCK1_PF_MARK, 249 TXD0_MARK, RXD0_MARK, SCK0_MARK, 250 TXD1_MARK, RXD1_MARK, SCK1_MARK, 251 TXD2_MARK, RXD2_MARK, SCK2_MARK, 252 RTS3_MARK, CTS3_MARK, TXD3_MARK, 253 RXD3_MARK, SCK3_MARK, 254 AUDIO_CLK_MARK, 255 SSIDATA3_MARK, SSIWS3_MARK, SSISCK3_MARK, 256 SSIDATA2_MARK, SSIWS2_MARK, SSISCK2_MARK, 257 SSIDATA1_MARK, SSIWS1_MARK, SSISCK1_MARK, 258 SSIDATA0_MARK, SSIWS0_MARK, SSISCK0_MARK, 259 FCE_MARK, FRB_MARK, 260 NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK, 261 NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK, 262 FSC_MARK, FOE_MARK, FCDE_MARK, FWE_MARK, 263 LCD_VEPWC_MARK, LCD_VCPWC_MARK, LCD_CLK_MARK, LCD_FLM_MARK, 264 LCD_M_DISP_MARK, LCD_CL2_MARK, LCD_CL1_MARK, LCD_DON_MARK, 265 LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK, 266 LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK, 267 LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK, 268 LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK, 269 PINMUX_MARK_END, 270 }; 271 272 static const u16 pinmux_data[] = { 273 /* PA */ 274 PINMUX_DATA(PA7_DATA, PA7_IN), 275 PINMUX_DATA(PA6_DATA, PA6_IN), 276 PINMUX_DATA(PA5_DATA, PA5_IN), 277 PINMUX_DATA(PA4_DATA, PA4_IN), 278 PINMUX_DATA(PA3_DATA, PA3_IN), 279 PINMUX_DATA(PA2_DATA, PA2_IN), 280 PINMUX_DATA(PA1_DATA, PA1_IN), 281 PINMUX_DATA(PA0_DATA, PA0_IN), 282 283 /* PB */ 284 PINMUX_DATA(PB12_DATA, PB12MD_00, FORCE_OUT), 285 PINMUX_DATA(WDTOVF_MARK, PB12MD_01), 286 PINMUX_DATA(IRQOUT_MARK, PB12MD_10, PB12IRQ_00), 287 PINMUX_DATA(REFOUT_MARK, PB12MD_10, PB12IRQ_01), 288 PINMUX_DATA(IRQOUT_REFOUT_MARK, PB12MD_10, PB12IRQ_10), 289 PINMUX_DATA(UBCTRG_MARK, PB12MD_11), 290 291 PINMUX_DATA(PB11_DATA, PB11MD_0, PB11_IN, PB11_OUT), 292 PINMUX_DATA(CTX1_MARK, PB11MD_1), 293 294 PINMUX_DATA(PB10_DATA, PB10MD_0, PB10_IN, PB10_OUT), 295 PINMUX_DATA(CRX1_MARK, PB10MD_1), 296 297 PINMUX_DATA(PB9_DATA, PB9MD_00, PB9_IN, PB9_OUT), 298 PINMUX_DATA(CTX0_MARK, PB9MD_01), 299 PINMUX_DATA(CTX0_CTX1_MARK, PB9MD_10), 300 301 PINMUX_DATA(PB8_DATA, PB8MD_00, PB8_IN, PB8_OUT), 302 PINMUX_DATA(CRX0_MARK, PB8MD_01), 303 PINMUX_DATA(CRX0_CRX1_MARK, PB8MD_10), 304 305 PINMUX_DATA(PB7_DATA, PB7MD_00, FORCE_IN), 306 PINMUX_DATA(SDA3_MARK, PB7MD_01), 307 PINMUX_DATA(PINT7_PB_MARK, PB7MD_10), 308 PINMUX_DATA(IRQ7_PB_MARK, PB7MD_11), 309 310 PINMUX_DATA(PB6_DATA, PB6MD_00, FORCE_IN), 311 PINMUX_DATA(SCL3_MARK, PB6MD_01), 312 PINMUX_DATA(PINT6_PB_MARK, PB6MD_10), 313 PINMUX_DATA(IRQ6_PB_MARK, PB6MD_11), 314 315 PINMUX_DATA(PB5_DATA, PB5MD_00, FORCE_IN), 316 PINMUX_DATA(SDA2_MARK, PB6MD_01), 317 PINMUX_DATA(PINT5_PB_MARK, PB6MD_10), 318 PINMUX_DATA(IRQ5_PB_MARK, PB6MD_11), 319 320 PINMUX_DATA(PB4_DATA, PB4MD_00, FORCE_IN), 321 PINMUX_DATA(SCL2_MARK, PB4MD_01), 322 PINMUX_DATA(PINT4_PB_MARK, PB4MD_10), 323 PINMUX_DATA(IRQ4_PB_MARK, PB4MD_11), 324 325 PINMUX_DATA(PB3_DATA, PB3MD_00, FORCE_IN), 326 PINMUX_DATA(SDA1_MARK, PB3MD_01), 327 PINMUX_DATA(PINT3_PB_MARK, PB3MD_10), 328 PINMUX_DATA(IRQ3_PB_MARK, PB3MD_11), 329 330 PINMUX_DATA(PB2_DATA, PB2MD_00, FORCE_IN), 331 PINMUX_DATA(SCL1_MARK, PB2MD_01), 332 PINMUX_DATA(PINT2_PB_MARK, PB2MD_10), 333 PINMUX_DATA(IRQ2_PB_MARK, PB2MD_11), 334 335 PINMUX_DATA(PB1_DATA, PB1MD_00, FORCE_IN), 336 PINMUX_DATA(SDA0_MARK, PB1MD_01), 337 PINMUX_DATA(PINT1_PB_MARK, PB1MD_10), 338 PINMUX_DATA(IRQ1_PB_MARK, PB1MD_11), 339 340 PINMUX_DATA(PB0_DATA, PB0MD_00, FORCE_IN), 341 PINMUX_DATA(SCL0_MARK, PB0MD_01), 342 PINMUX_DATA(PINT0_PB_MARK, PB0MD_10), 343 PINMUX_DATA(IRQ0_PB_MARK, PB0MD_11), 344 345 /* PC */ 346 PINMUX_DATA(PC14_DATA, PC14MD_0, PC14_IN, PC14_OUT), 347 PINMUX_DATA(WAIT_MARK, PC14MD_1), 348 349 PINMUX_DATA(PC13_DATA, PC13MD_0, PC13_IN, PC13_OUT), 350 PINMUX_DATA(RDWR_MARK, PC13MD_1), 351 352 PINMUX_DATA(PC12_DATA, PC12MD_0, PC12_IN, PC12_OUT), 353 PINMUX_DATA(CKE_MARK, PC12MD_1), 354 355 PINMUX_DATA(PC11_DATA, PC11MD_00, PC11_IN, PC11_OUT), 356 PINMUX_DATA(CASU_MARK, PC11MD_01), 357 PINMUX_DATA(BREQ_MARK, PC11MD_10), 358 359 PINMUX_DATA(PC10_DATA, PC10MD_00, PC10_IN, PC10_OUT), 360 PINMUX_DATA(RASU_MARK, PC10MD_01), 361 PINMUX_DATA(BACK_MARK, PC10MD_10), 362 363 PINMUX_DATA(PC9_DATA, PC9MD_0, PC9_IN, PC9_OUT), 364 PINMUX_DATA(CASL_MARK, PC9MD_1), 365 366 PINMUX_DATA(PC8_DATA, PC8MD_0, PC8_IN, PC8_OUT), 367 PINMUX_DATA(RASL_MARK, PC8MD_1), 368 369 PINMUX_DATA(PC7_DATA, PC7MD_0, PC7_IN, PC7_OUT), 370 PINMUX_DATA(WE3_DQMUU_AH_ICIO_WR_MARK, PC7MD_1), 371 372 PINMUX_DATA(PC6_DATA, PC6MD_0, PC6_IN, PC6_OUT), 373 PINMUX_DATA(WE2_DQMUL_ICIORD_MARK, PC6MD_1), 374 375 PINMUX_DATA(PC5_DATA, PC5MD_0, PC5_IN, PC5_OUT), 376 PINMUX_DATA(WE1_DQMLU_WE_MARK, PC5MD_1), 377 378 PINMUX_DATA(PC4_DATA, PC4MD_0, PC4_IN, PC4_OUT), 379 PINMUX_DATA(WE0_DQMLL_MARK, PC4MD_1), 380 381 PINMUX_DATA(PC3_DATA, PC3MD_0, PC3_IN, PC3_OUT), 382 PINMUX_DATA(CS3_MARK, PC3MD_1), 383 384 PINMUX_DATA(PC2_DATA, PC2MD_0, PC2_IN, PC2_OUT), 385 PINMUX_DATA(CS2_MARK, PC2MD_1), 386 387 PINMUX_DATA(PC1_DATA, PC1MD_0, PC1_IN, PC1_OUT), 388 PINMUX_DATA(A1_MARK, PC1MD_1), 389 390 PINMUX_DATA(PC0_DATA, PC0MD_00, PC0_IN, PC0_OUT), 391 PINMUX_DATA(A0_MARK, PC0MD_01), 392 PINMUX_DATA(CS7_MARK, PC0MD_10), 393 394 /* PD */ 395 PINMUX_DATA(PD15_DATA, PD15MD_000, PD15_IN, PD15_OUT), 396 PINMUX_DATA(D31_MARK, PD15MD_001), 397 PINMUX_DATA(PINT7_PD_MARK, PD15MD_010), 398 PINMUX_DATA(ADTRG_PD_MARK, PD15MD_100), 399 PINMUX_DATA(TIOC4D_MARK, PD15MD_101), 400 401 PINMUX_DATA(PD14_DATA, PD14MD_000, PD14_IN, PD14_OUT), 402 PINMUX_DATA(D30_MARK, PD14MD_001), 403 PINMUX_DATA(PINT6_PD_MARK, PD14MD_010), 404 PINMUX_DATA(TIOC4C_MARK, PD14MD_101), 405 406 PINMUX_DATA(PD13_DATA, PD13MD_000, PD13_IN, PD13_OUT), 407 PINMUX_DATA(D29_MARK, PD13MD_001), 408 PINMUX_DATA(PINT5_PD_MARK, PD13MD_010), 409 PINMUX_DATA(TEND1_PD_MARK, PD13MD_100), 410 PINMUX_DATA(TIOC4B_MARK, PD13MD_101), 411 412 PINMUX_DATA(PD12_DATA, PD12MD_000, PD12_IN, PD12_OUT), 413 PINMUX_DATA(D28_MARK, PD12MD_001), 414 PINMUX_DATA(PINT4_PD_MARK, PD12MD_010), 415 PINMUX_DATA(DACK1_PD_MARK, PD12MD_100), 416 PINMUX_DATA(TIOC4A_MARK, PD12MD_101), 417 418 PINMUX_DATA(PD11_DATA, PD11MD_000, PD11_IN, PD11_OUT), 419 PINMUX_DATA(D27_MARK, PD11MD_001), 420 PINMUX_DATA(PINT3_PD_MARK, PD11MD_010), 421 PINMUX_DATA(DREQ1_PD_MARK, PD11MD_100), 422 PINMUX_DATA(TIOC3D_MARK, PD11MD_101), 423 424 PINMUX_DATA(PD10_DATA, PD10MD_000, PD10_IN, PD10_OUT), 425 PINMUX_DATA(D26_MARK, PD10MD_001), 426 PINMUX_DATA(PINT2_PD_MARK, PD10MD_010), 427 PINMUX_DATA(TEND0_PD_MARK, PD10MD_100), 428 PINMUX_DATA(TIOC3C_MARK, PD10MD_101), 429 430 PINMUX_DATA(PD9_DATA, PD9MD_000, PD9_IN, PD9_OUT), 431 PINMUX_DATA(D25_MARK, PD9MD_001), 432 PINMUX_DATA(PINT1_PD_MARK, PD9MD_010), 433 PINMUX_DATA(DACK0_PD_MARK, PD9MD_100), 434 PINMUX_DATA(TIOC3B_MARK, PD9MD_101), 435 436 PINMUX_DATA(PD8_DATA, PD8MD_000, PD8_IN, PD8_OUT), 437 PINMUX_DATA(D24_MARK, PD8MD_001), 438 PINMUX_DATA(PINT0_PD_MARK, PD8MD_010), 439 PINMUX_DATA(DREQ0_PD_MARK, PD8MD_100), 440 PINMUX_DATA(TIOC3A_MARK, PD8MD_101), 441 442 PINMUX_DATA(PD7_DATA, PD7MD_000, PD7_IN, PD7_OUT), 443 PINMUX_DATA(D23_MARK, PD7MD_001), 444 PINMUX_DATA(IRQ7_PD_MARK, PD7MD_010), 445 PINMUX_DATA(SCS1_PD_MARK, PD7MD_011), 446 PINMUX_DATA(TCLKD_PD_MARK, PD7MD_100), 447 PINMUX_DATA(TIOC2B_MARK, PD7MD_101), 448 449 PINMUX_DATA(PD6_DATA, PD6MD_000, PD6_IN, PD6_OUT), 450 PINMUX_DATA(D22_MARK, PD6MD_001), 451 PINMUX_DATA(IRQ6_PD_MARK, PD6MD_010), 452 PINMUX_DATA(SSO1_PD_MARK, PD6MD_011), 453 PINMUX_DATA(TCLKC_PD_MARK, PD6MD_100), 454 PINMUX_DATA(TIOC2A_MARK, PD6MD_101), 455 456 PINMUX_DATA(PD5_DATA, PD5MD_000, PD5_IN, PD5_OUT), 457 PINMUX_DATA(D21_MARK, PD5MD_001), 458 PINMUX_DATA(IRQ5_PD_MARK, PD5MD_010), 459 PINMUX_DATA(SSI1_PD_MARK, PD5MD_011), 460 PINMUX_DATA(TCLKB_PD_MARK, PD5MD_100), 461 PINMUX_DATA(TIOC1B_MARK, PD5MD_101), 462 463 PINMUX_DATA(PD4_DATA, PD4MD_000, PD4_IN, PD4_OUT), 464 PINMUX_DATA(D20_MARK, PD4MD_001), 465 PINMUX_DATA(IRQ4_PD_MARK, PD4MD_010), 466 PINMUX_DATA(SSCK1_PD_MARK, PD4MD_011), 467 PINMUX_DATA(TCLKA_PD_MARK, PD4MD_100), 468 PINMUX_DATA(TIOC1A_MARK, PD4MD_101), 469 470 PINMUX_DATA(PD3_DATA, PD3MD_000, PD3_IN, PD3_OUT), 471 PINMUX_DATA(D19_MARK, PD3MD_001), 472 PINMUX_DATA(IRQ3_PD_MARK, PD3MD_010), 473 PINMUX_DATA(SCS0_PD_MARK, PD3MD_011), 474 PINMUX_DATA(DACK3_MARK, PD3MD_100), 475 PINMUX_DATA(TIOC0D_MARK, PD3MD_101), 476 477 PINMUX_DATA(PD2_DATA, PD2MD_000, PD2_IN, PD2_OUT), 478 PINMUX_DATA(D18_MARK, PD2MD_001), 479 PINMUX_DATA(IRQ2_PD_MARK, PD2MD_010), 480 PINMUX_DATA(SSO0_PD_MARK, PD2MD_011), 481 PINMUX_DATA(DREQ3_MARK, PD2MD_100), 482 PINMUX_DATA(TIOC0C_MARK, PD2MD_101), 483 484 PINMUX_DATA(PD1_DATA, PD1MD_000, PD1_IN, PD1_OUT), 485 PINMUX_DATA(D17_MARK, PD1MD_001), 486 PINMUX_DATA(IRQ1_PD_MARK, PD1MD_010), 487 PINMUX_DATA(SSI0_PD_MARK, PD1MD_011), 488 PINMUX_DATA(DACK2_MARK, PD1MD_100), 489 PINMUX_DATA(TIOC0B_MARK, PD1MD_101), 490 491 PINMUX_DATA(PD0_DATA, PD0MD_000, PD0_IN, PD0_OUT), 492 PINMUX_DATA(D16_MARK, PD0MD_001), 493 PINMUX_DATA(IRQ0_PD_MARK, PD0MD_010), 494 PINMUX_DATA(SSCK0_PD_MARK, PD0MD_011), 495 PINMUX_DATA(DREQ2_MARK, PD0MD_100), 496 PINMUX_DATA(TIOC0A_MARK, PD0MD_101), 497 498 /* PE */ 499 PINMUX_DATA(PE15_DATA, PE15MD_00, PE15_IN, PE15_OUT), 500 PINMUX_DATA(IOIS16_MARK, PE15MD_01), 501 PINMUX_DATA(RTS3_MARK, PE15MD_11), 502 503 PINMUX_DATA(PE14_DATA, PE14MD_00, PE14_IN, PE14_OUT), 504 PINMUX_DATA(CS1_MARK, PE14MD_01), 505 PINMUX_DATA(CTS3_MARK, PE14MD_11), 506 507 PINMUX_DATA(PE13_DATA, PE13MD_00, PE13_IN, PE13_OUT), 508 PINMUX_DATA(TXD3_MARK, PE13MD_11), 509 510 PINMUX_DATA(PE12_DATA, PE12MD_00, PE12_IN, PE12_OUT), 511 PINMUX_DATA(RXD3_MARK, PE12MD_11), 512 513 PINMUX_DATA(PE11_DATA, PE11MD_000, PE11_IN, PE11_OUT), 514 PINMUX_DATA(CS6_CE1B_MARK, PE11MD_001), 515 PINMUX_DATA(IRQ7_PE_MARK, PE11MD_010), 516 PINMUX_DATA(TEND1_PE_MARK, PE11MD_100), 517 518 PINMUX_DATA(PE10_DATA, PE10MD_000, PE10_IN, PE10_OUT), 519 PINMUX_DATA(CE2B_MARK, PE10MD_001), 520 PINMUX_DATA(IRQ6_PE_MARK, PE10MD_010), 521 PINMUX_DATA(TEND0_PE_MARK, PE10MD_100), 522 523 PINMUX_DATA(PE9_DATA, PE9MD_00, PE9_IN, PE9_OUT), 524 PINMUX_DATA(CS5_CE1A_MARK, PE9MD_01), 525 PINMUX_DATA(IRQ5_PE_MARK, PE9MD_10), 526 PINMUX_DATA(SCK3_MARK, PE9MD_11), 527 528 PINMUX_DATA(PE8_DATA, PE8MD_00, PE8_IN, PE8_OUT), 529 PINMUX_DATA(CE2A_MARK, PE8MD_01), 530 PINMUX_DATA(IRQ4_PE_MARK, PE8MD_10), 531 PINMUX_DATA(SCK2_MARK, PE8MD_11), 532 533 PINMUX_DATA(PE7_DATA, PE7MD_000, PE7_IN, PE7_OUT), 534 PINMUX_DATA(FRAME_MARK, PE7MD_001), 535 PINMUX_DATA(IRQ3_PE_MARK, PE7MD_010), 536 PINMUX_DATA(TXD2_MARK, PE7MD_011), 537 PINMUX_DATA(DACK1_PE_MARK, PE7MD_100), 538 539 PINMUX_DATA(PE6_DATA, PE6MD_000, PE6_IN, PE6_OUT), 540 PINMUX_DATA(A25_MARK, PE6MD_001), 541 PINMUX_DATA(IRQ2_PE_MARK, PE6MD_010), 542 PINMUX_DATA(RXD2_MARK, PE6MD_011), 543 PINMUX_DATA(DREQ1_PE_MARK, PE6MD_100), 544 545 PINMUX_DATA(PE5_DATA, PE5MD_000, PE5_IN, PE5_OUT), 546 PINMUX_DATA(A24_MARK, PE5MD_001), 547 PINMUX_DATA(IRQ1_PE_MARK, PE5MD_010), 548 PINMUX_DATA(TXD1_MARK, PE5MD_011), 549 PINMUX_DATA(DACK0_PE_MARK, PE5MD_100), 550 551 PINMUX_DATA(PE4_DATA, PE4MD_000, PE4_IN, PE4_OUT), 552 PINMUX_DATA(A23_MARK, PE4MD_001), 553 PINMUX_DATA(IRQ0_PE_MARK, PE4MD_010), 554 PINMUX_DATA(RXD1_MARK, PE4MD_011), 555 PINMUX_DATA(DREQ0_PE_MARK, PE4MD_100), 556 557 PINMUX_DATA(PE3_DATA, PE3MD_00, PE3_IN, PE3_OUT), 558 PINMUX_DATA(A22_MARK, PE3MD_01), 559 PINMUX_DATA(SCK1_MARK, PE3MD_11), 560 561 PINMUX_DATA(PE2_DATA, PE2MD_00, PE2_IN, PE2_OUT), 562 PINMUX_DATA(A21_MARK, PE2MD_01), 563 PINMUX_DATA(SCK0_MARK, PE2MD_11), 564 565 PINMUX_DATA(PE1_DATA, PE1MD_00, PE1_IN, PE1_OUT), 566 PINMUX_DATA(CS4_MARK, PE1MD_01), 567 PINMUX_DATA(MRES_MARK, PE1MD_10), 568 PINMUX_DATA(TXD0_MARK, PE1MD_11), 569 570 PINMUX_DATA(PE0_DATA, PE0MD_000, PE0_IN, PE0_OUT), 571 PINMUX_DATA(BS_MARK, PE0MD_001), 572 PINMUX_DATA(RXD0_MARK, PE0MD_011), 573 PINMUX_DATA(ADTRG_PE_MARK, PE0MD_100), 574 575 /* PF */ 576 PINMUX_DATA(PF30_DATA, PF30MD_0, PF30_IN, PF30_OUT), 577 PINMUX_DATA(AUDIO_CLK_MARK, PF30MD_1), 578 579 PINMUX_DATA(PF29_DATA, PF29MD_0, PF29_IN, PF29_OUT), 580 PINMUX_DATA(SSIDATA3_MARK, PF29MD_1), 581 582 PINMUX_DATA(PF28_DATA, PF28MD_0, PF28_IN, PF28_OUT), 583 PINMUX_DATA(SSIWS3_MARK, PF28MD_1), 584 585 PINMUX_DATA(PF27_DATA, PF27MD_0, PF27_IN, PF27_OUT), 586 PINMUX_DATA(SSISCK3_MARK, PF27MD_1), 587 588 PINMUX_DATA(PF26_DATA, PF26MD_0, PF26_IN, PF26_OUT), 589 PINMUX_DATA(SSIDATA2_MARK, PF26MD_1), 590 591 PINMUX_DATA(PF25_DATA, PF25MD_0, PF25_IN, PF25_OUT), 592 PINMUX_DATA(SSIWS2_MARK, PF25MD_1), 593 594 PINMUX_DATA(PF24_DATA, PF24MD_0, PF24_IN, PF24_OUT), 595 PINMUX_DATA(SSISCK2_MARK, PF24MD_1), 596 597 PINMUX_DATA(PF23_DATA, PF23MD_00, PF23_IN, PF23_OUT), 598 PINMUX_DATA(SSIDATA1_MARK, PF23MD_01), 599 PINMUX_DATA(LCD_VEPWC_MARK, PF23MD_10), 600 601 PINMUX_DATA(PF22_DATA, PF22MD_00, PF22_IN, PF22_OUT), 602 PINMUX_DATA(SSIWS1_MARK, PF22MD_01), 603 PINMUX_DATA(LCD_VCPWC_MARK, PF22MD_10), 604 605 PINMUX_DATA(PF21_DATA, PF21MD_00, PF21_IN, PF21_OUT), 606 PINMUX_DATA(SSISCK1_MARK, PF21MD_01), 607 PINMUX_DATA(LCD_CLK_MARK, PF21MD_10), 608 609 PINMUX_DATA(PF20_DATA, PF20MD_00, PF20_IN, PF20_OUT), 610 PINMUX_DATA(SSIDATA0_MARK, PF20MD_01), 611 PINMUX_DATA(LCD_FLM_MARK, PF20MD_10), 612 613 PINMUX_DATA(PF19_DATA, PF19MD_00, PF19_IN, PF19_OUT), 614 PINMUX_DATA(SSIWS0_MARK, PF19MD_01), 615 PINMUX_DATA(LCD_M_DISP_MARK, PF19MD_10), 616 617 PINMUX_DATA(PF18_DATA, PF18MD_00, PF18_IN, PF18_OUT), 618 PINMUX_DATA(SSISCK0_MARK, PF18MD_01), 619 PINMUX_DATA(LCD_CL2_MARK, PF18MD_10), 620 621 PINMUX_DATA(PF17_DATA, PF17MD_00, PF17_IN, PF17_OUT), 622 PINMUX_DATA(FCE_MARK, PF17MD_01), 623 PINMUX_DATA(LCD_CL1_MARK, PF17MD_10), 624 625 PINMUX_DATA(PF16_DATA, PF16MD_00, PF16_IN, PF16_OUT), 626 PINMUX_DATA(FRB_MARK, PF16MD_01), 627 PINMUX_DATA(LCD_DON_MARK, PF16MD_10), 628 629 PINMUX_DATA(PF15_DATA, PF15MD_00, PF15_IN, PF15_OUT), 630 PINMUX_DATA(NAF7_MARK, PF15MD_01), 631 PINMUX_DATA(LCD_DATA15_MARK, PF15MD_10), 632 633 PINMUX_DATA(PF14_DATA, PF14MD_00, PF14_IN, PF14_OUT), 634 PINMUX_DATA(NAF6_MARK, PF14MD_01), 635 PINMUX_DATA(LCD_DATA14_MARK, PF14MD_10), 636 637 PINMUX_DATA(PF13_DATA, PF13MD_00, PF13_IN, PF13_OUT), 638 PINMUX_DATA(NAF5_MARK, PF13MD_01), 639 PINMUX_DATA(LCD_DATA13_MARK, PF13MD_10), 640 641 PINMUX_DATA(PF12_DATA, PF12MD_00, PF12_IN, PF12_OUT), 642 PINMUX_DATA(NAF4_MARK, PF12MD_01), 643 PINMUX_DATA(LCD_DATA12_MARK, PF12MD_10), 644 645 PINMUX_DATA(PF11_DATA, PF11MD_00, PF11_IN, PF11_OUT), 646 PINMUX_DATA(NAF3_MARK, PF11MD_01), 647 PINMUX_DATA(LCD_DATA11_MARK, PF11MD_10), 648 649 PINMUX_DATA(PF10_DATA, PF10MD_00, PF10_IN, PF10_OUT), 650 PINMUX_DATA(NAF2_MARK, PF10MD_01), 651 PINMUX_DATA(LCD_DATA10_MARK, PF10MD_10), 652 653 PINMUX_DATA(PF9_DATA, PF9MD_00, PF9_IN, PF9_OUT), 654 PINMUX_DATA(NAF1_MARK, PF9MD_01), 655 PINMUX_DATA(LCD_DATA9_MARK, PF9MD_10), 656 657 PINMUX_DATA(PF8_DATA, PF8MD_00, PF8_IN, PF8_OUT), 658 PINMUX_DATA(NAF0_MARK, PF8MD_01), 659 PINMUX_DATA(LCD_DATA8_MARK, PF8MD_10), 660 661 PINMUX_DATA(PF7_DATA, PF7MD_00, PF7_IN, PF7_OUT), 662 PINMUX_DATA(FSC_MARK, PF7MD_01), 663 PINMUX_DATA(LCD_DATA7_MARK, PF7MD_10), 664 PINMUX_DATA(SCS1_PF_MARK, PF7MD_11), 665 666 PINMUX_DATA(PF6_DATA, PF6MD_00, PF6_IN, PF6_OUT), 667 PINMUX_DATA(FOE_MARK, PF6MD_01), 668 PINMUX_DATA(LCD_DATA6_MARK, PF6MD_10), 669 PINMUX_DATA(SSO1_PF_MARK, PF6MD_11), 670 671 PINMUX_DATA(PF5_DATA, PF5MD_00, PF5_IN, PF5_OUT), 672 PINMUX_DATA(FCDE_MARK, PF5MD_01), 673 PINMUX_DATA(LCD_DATA5_MARK, PF5MD_10), 674 PINMUX_DATA(SSI1_PF_MARK, PF5MD_11), 675 676 PINMUX_DATA(PF4_DATA, PF4MD_00, PF4_IN, PF4_OUT), 677 PINMUX_DATA(FWE_MARK, PF4MD_01), 678 PINMUX_DATA(LCD_DATA4_MARK, PF4MD_10), 679 PINMUX_DATA(SSCK1_PF_MARK, PF4MD_11), 680 681 PINMUX_DATA(PF3_DATA, PF3MD_00, PF3_IN, PF3_OUT), 682 PINMUX_DATA(TCLKD_PF_MARK, PF3MD_01), 683 PINMUX_DATA(LCD_DATA3_MARK, PF3MD_10), 684 PINMUX_DATA(SCS0_PF_MARK, PF3MD_11), 685 686 PINMUX_DATA(PF2_DATA, PF2MD_00, PF2_IN, PF2_OUT), 687 PINMUX_DATA(TCLKC_PF_MARK, PF2MD_01), 688 PINMUX_DATA(LCD_DATA2_MARK, PF2MD_10), 689 PINMUX_DATA(SSO0_PF_MARK, PF2MD_11), 690 691 PINMUX_DATA(PF1_DATA, PF1MD_00, PF1_IN, PF1_OUT), 692 PINMUX_DATA(TCLKB_PF_MARK, PF1MD_01), 693 PINMUX_DATA(LCD_DATA1_MARK, PF1MD_10), 694 PINMUX_DATA(SSI0_PF_MARK, PF1MD_11), 695 696 PINMUX_DATA(PF0_DATA, PF0MD_00, PF0_IN, PF0_OUT), 697 PINMUX_DATA(TCLKA_PF_MARK, PF0MD_01), 698 PINMUX_DATA(LCD_DATA0_MARK, PF0MD_10), 699 PINMUX_DATA(SSCK0_PF_MARK, PF0MD_11), 700 }; 701 702 static const struct sh_pfc_pin pinmux_pins[] = { 703 /* PA */ 704 PINMUX_GPIO(PA7), 705 PINMUX_GPIO(PA6), 706 PINMUX_GPIO(PA5), 707 PINMUX_GPIO(PA4), 708 PINMUX_GPIO(PA3), 709 PINMUX_GPIO(PA2), 710 PINMUX_GPIO(PA1), 711 PINMUX_GPIO(PA0), 712 713 /* PB */ 714 PINMUX_GPIO(PB12), 715 PINMUX_GPIO(PB11), 716 PINMUX_GPIO(PB10), 717 PINMUX_GPIO(PB9), 718 PINMUX_GPIO(PB8), 719 PINMUX_GPIO(PB7), 720 PINMUX_GPIO(PB6), 721 PINMUX_GPIO(PB5), 722 PINMUX_GPIO(PB4), 723 PINMUX_GPIO(PB3), 724 PINMUX_GPIO(PB2), 725 PINMUX_GPIO(PB1), 726 PINMUX_GPIO(PB0), 727 728 /* PC */ 729 PINMUX_GPIO(PC14), 730 PINMUX_GPIO(PC13), 731 PINMUX_GPIO(PC12), 732 PINMUX_GPIO(PC11), 733 PINMUX_GPIO(PC10), 734 PINMUX_GPIO(PC9), 735 PINMUX_GPIO(PC8), 736 PINMUX_GPIO(PC7), 737 PINMUX_GPIO(PC6), 738 PINMUX_GPIO(PC5), 739 PINMUX_GPIO(PC4), 740 PINMUX_GPIO(PC3), 741 PINMUX_GPIO(PC2), 742 PINMUX_GPIO(PC1), 743 PINMUX_GPIO(PC0), 744 745 /* PD */ 746 PINMUX_GPIO(PD15), 747 PINMUX_GPIO(PD14), 748 PINMUX_GPIO(PD13), 749 PINMUX_GPIO(PD12), 750 PINMUX_GPIO(PD11), 751 PINMUX_GPIO(PD10), 752 PINMUX_GPIO(PD9), 753 PINMUX_GPIO(PD8), 754 PINMUX_GPIO(PD7), 755 PINMUX_GPIO(PD6), 756 PINMUX_GPIO(PD5), 757 PINMUX_GPIO(PD4), 758 PINMUX_GPIO(PD3), 759 PINMUX_GPIO(PD2), 760 PINMUX_GPIO(PD1), 761 PINMUX_GPIO(PD0), 762 763 /* PE */ 764 PINMUX_GPIO(PE15), 765 PINMUX_GPIO(PE14), 766 PINMUX_GPIO(PE13), 767 PINMUX_GPIO(PE12), 768 PINMUX_GPIO(PE11), 769 PINMUX_GPIO(PE10), 770 PINMUX_GPIO(PE9), 771 PINMUX_GPIO(PE8), 772 PINMUX_GPIO(PE7), 773 PINMUX_GPIO(PE6), 774 PINMUX_GPIO(PE5), 775 PINMUX_GPIO(PE4), 776 PINMUX_GPIO(PE3), 777 PINMUX_GPIO(PE2), 778 PINMUX_GPIO(PE1), 779 PINMUX_GPIO(PE0), 780 781 /* PF */ 782 PINMUX_GPIO(PF30), 783 PINMUX_GPIO(PF29), 784 PINMUX_GPIO(PF28), 785 PINMUX_GPIO(PF27), 786 PINMUX_GPIO(PF26), 787 PINMUX_GPIO(PF25), 788 PINMUX_GPIO(PF24), 789 PINMUX_GPIO(PF23), 790 PINMUX_GPIO(PF22), 791 PINMUX_GPIO(PF21), 792 PINMUX_GPIO(PF20), 793 PINMUX_GPIO(PF19), 794 PINMUX_GPIO(PF18), 795 PINMUX_GPIO(PF17), 796 PINMUX_GPIO(PF16), 797 PINMUX_GPIO(PF15), 798 PINMUX_GPIO(PF14), 799 PINMUX_GPIO(PF13), 800 PINMUX_GPIO(PF12), 801 PINMUX_GPIO(PF11), 802 PINMUX_GPIO(PF10), 803 PINMUX_GPIO(PF9), 804 PINMUX_GPIO(PF8), 805 PINMUX_GPIO(PF7), 806 PINMUX_GPIO(PF6), 807 PINMUX_GPIO(PF5), 808 PINMUX_GPIO(PF4), 809 PINMUX_GPIO(PF3), 810 PINMUX_GPIO(PF2), 811 PINMUX_GPIO(PF1), 812 PINMUX_GPIO(PF0), 813 }; 814 815 #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) 816 817 static const struct pinmux_func pinmux_func_gpios[] = { 818 /* INTC */ 819 GPIO_FN(PINT7_PB), 820 GPIO_FN(PINT6_PB), 821 GPIO_FN(PINT5_PB), 822 GPIO_FN(PINT4_PB), 823 GPIO_FN(PINT3_PB), 824 GPIO_FN(PINT2_PB), 825 GPIO_FN(PINT1_PB), 826 GPIO_FN(PINT0_PB), 827 GPIO_FN(PINT7_PD), 828 GPIO_FN(PINT6_PD), 829 GPIO_FN(PINT5_PD), 830 GPIO_FN(PINT4_PD), 831 GPIO_FN(PINT3_PD), 832 GPIO_FN(PINT2_PD), 833 GPIO_FN(PINT1_PD), 834 GPIO_FN(PINT0_PD), 835 GPIO_FN(IRQ7_PB), 836 GPIO_FN(IRQ6_PB), 837 GPIO_FN(IRQ5_PB), 838 GPIO_FN(IRQ4_PB), 839 GPIO_FN(IRQ3_PB), 840 GPIO_FN(IRQ2_PB), 841 GPIO_FN(IRQ1_PB), 842 GPIO_FN(IRQ0_PB), 843 GPIO_FN(IRQ7_PD), 844 GPIO_FN(IRQ6_PD), 845 GPIO_FN(IRQ5_PD), 846 GPIO_FN(IRQ4_PD), 847 GPIO_FN(IRQ3_PD), 848 GPIO_FN(IRQ2_PD), 849 GPIO_FN(IRQ1_PD), 850 GPIO_FN(IRQ0_PD), 851 GPIO_FN(IRQ7_PE), 852 GPIO_FN(IRQ6_PE), 853 GPIO_FN(IRQ5_PE), 854 GPIO_FN(IRQ4_PE), 855 GPIO_FN(IRQ3_PE), 856 GPIO_FN(IRQ2_PE), 857 GPIO_FN(IRQ1_PE), 858 GPIO_FN(IRQ0_PE), 859 860 GPIO_FN(WDTOVF), 861 GPIO_FN(IRQOUT), 862 GPIO_FN(REFOUT), 863 GPIO_FN(IRQOUT_REFOUT), 864 GPIO_FN(UBCTRG), 865 866 /* CAN */ 867 GPIO_FN(CTX1), 868 GPIO_FN(CRX1), 869 GPIO_FN(CTX0), 870 GPIO_FN(CTX0_CTX1), 871 GPIO_FN(CRX0), 872 GPIO_FN(CRX0_CRX1), 873 874 /* IIC3 */ 875 GPIO_FN(SDA3), 876 GPIO_FN(SCL3), 877 GPIO_FN(SDA2), 878 GPIO_FN(SCL2), 879 GPIO_FN(SDA1), 880 GPIO_FN(SCL1), 881 GPIO_FN(SDA0), 882 GPIO_FN(SCL0), 883 884 /* DMAC */ 885 GPIO_FN(TEND0_PD), 886 GPIO_FN(TEND0_PE), 887 GPIO_FN(DACK0_PD), 888 GPIO_FN(DACK0_PE), 889 GPIO_FN(DREQ0_PD), 890 GPIO_FN(DREQ0_PE), 891 GPIO_FN(TEND1_PD), 892 GPIO_FN(TEND1_PE), 893 GPIO_FN(DACK1_PD), 894 GPIO_FN(DACK1_PE), 895 GPIO_FN(DREQ1_PD), 896 GPIO_FN(DREQ1_PE), 897 GPIO_FN(DACK2), 898 GPIO_FN(DREQ2), 899 GPIO_FN(DACK3), 900 GPIO_FN(DREQ3), 901 902 /* ADC */ 903 GPIO_FN(ADTRG_PD), 904 GPIO_FN(ADTRG_PE), 905 906 /* BSC */ 907 GPIO_FN(D31), 908 GPIO_FN(D30), 909 GPIO_FN(D29), 910 GPIO_FN(D28), 911 GPIO_FN(D27), 912 GPIO_FN(D26), 913 GPIO_FN(D25), 914 GPIO_FN(D24), 915 GPIO_FN(D23), 916 GPIO_FN(D22), 917 GPIO_FN(D21), 918 GPIO_FN(D20), 919 GPIO_FN(D19), 920 GPIO_FN(D18), 921 GPIO_FN(D17), 922 GPIO_FN(D16), 923 GPIO_FN(A25), 924 GPIO_FN(A24), 925 GPIO_FN(A23), 926 GPIO_FN(A22), 927 GPIO_FN(A21), 928 GPIO_FN(CS4), 929 GPIO_FN(MRES), 930 GPIO_FN(BS), 931 GPIO_FN(IOIS16), 932 GPIO_FN(CS1), 933 GPIO_FN(CS6_CE1B), 934 GPIO_FN(CE2B), 935 GPIO_FN(CS5_CE1A), 936 GPIO_FN(CE2A), 937 GPIO_FN(FRAME), 938 GPIO_FN(WAIT), 939 GPIO_FN(RDWR), 940 GPIO_FN(CKE), 941 GPIO_FN(CASU), 942 GPIO_FN(BREQ), 943 GPIO_FN(RASU), 944 GPIO_FN(BACK), 945 GPIO_FN(CASL), 946 GPIO_FN(RASL), 947 GPIO_FN(WE3_DQMUU_AH_ICIO_WR), 948 GPIO_FN(WE2_DQMUL_ICIORD), 949 GPIO_FN(WE1_DQMLU_WE), 950 GPIO_FN(WE0_DQMLL), 951 GPIO_FN(CS3), 952 GPIO_FN(CS2), 953 GPIO_FN(A1), 954 GPIO_FN(A0), 955 GPIO_FN(CS7), 956 957 /* TMU */ 958 GPIO_FN(TIOC4D), 959 GPIO_FN(TIOC4C), 960 GPIO_FN(TIOC4B), 961 GPIO_FN(TIOC4A), 962 GPIO_FN(TIOC3D), 963 GPIO_FN(TIOC3C), 964 GPIO_FN(TIOC3B), 965 GPIO_FN(TIOC3A), 966 GPIO_FN(TIOC2B), 967 GPIO_FN(TIOC1B), 968 GPIO_FN(TIOC2A), 969 GPIO_FN(TIOC1A), 970 GPIO_FN(TIOC0D), 971 GPIO_FN(TIOC0C), 972 GPIO_FN(TIOC0B), 973 GPIO_FN(TIOC0A), 974 GPIO_FN(TCLKD_PD), 975 GPIO_FN(TCLKC_PD), 976 GPIO_FN(TCLKB_PD), 977 GPIO_FN(TCLKA_PD), 978 GPIO_FN(TCLKD_PF), 979 GPIO_FN(TCLKC_PF), 980 GPIO_FN(TCLKB_PF), 981 GPIO_FN(TCLKA_PF), 982 983 /* SSU */ 984 GPIO_FN(SCS0_PD), 985 GPIO_FN(SSO0_PD), 986 GPIO_FN(SSI0_PD), 987 GPIO_FN(SSCK0_PD), 988 GPIO_FN(SCS0_PF), 989 GPIO_FN(SSO0_PF), 990 GPIO_FN(SSI0_PF), 991 GPIO_FN(SSCK0_PF), 992 GPIO_FN(SCS1_PD), 993 GPIO_FN(SSO1_PD), 994 GPIO_FN(SSI1_PD), 995 GPIO_FN(SSCK1_PD), 996 GPIO_FN(SCS1_PF), 997 GPIO_FN(SSO1_PF), 998 GPIO_FN(SSI1_PF), 999 GPIO_FN(SSCK1_PF), 1000 1001 /* SCIF */ 1002 GPIO_FN(TXD0), 1003 GPIO_FN(RXD0), 1004 GPIO_FN(SCK0), 1005 GPIO_FN(TXD1), 1006 GPIO_FN(RXD1), 1007 GPIO_FN(SCK1), 1008 GPIO_FN(TXD2), 1009 GPIO_FN(RXD2), 1010 GPIO_FN(SCK2), 1011 GPIO_FN(RTS3), 1012 GPIO_FN(CTS3), 1013 GPIO_FN(TXD3), 1014 GPIO_FN(RXD3), 1015 GPIO_FN(SCK3), 1016 1017 /* SSI */ 1018 GPIO_FN(AUDIO_CLK), 1019 GPIO_FN(SSIDATA3), 1020 GPIO_FN(SSIWS3), 1021 GPIO_FN(SSISCK3), 1022 GPIO_FN(SSIDATA2), 1023 GPIO_FN(SSIWS2), 1024 GPIO_FN(SSISCK2), 1025 GPIO_FN(SSIDATA1), 1026 GPIO_FN(SSIWS1), 1027 GPIO_FN(SSISCK1), 1028 GPIO_FN(SSIDATA0), 1029 GPIO_FN(SSIWS0), 1030 GPIO_FN(SSISCK0), 1031 1032 /* FLCTL */ 1033 GPIO_FN(FCE), 1034 GPIO_FN(FRB), 1035 GPIO_FN(NAF7), 1036 GPIO_FN(NAF6), 1037 GPIO_FN(NAF5), 1038 GPIO_FN(NAF4), 1039 GPIO_FN(NAF3), 1040 GPIO_FN(NAF2), 1041 GPIO_FN(NAF1), 1042 GPIO_FN(NAF0), 1043 GPIO_FN(FSC), 1044 GPIO_FN(FOE), 1045 GPIO_FN(FCDE), 1046 GPIO_FN(FWE), 1047 1048 /* LCDC */ 1049 GPIO_FN(LCD_VEPWC), 1050 GPIO_FN(LCD_VCPWC), 1051 GPIO_FN(LCD_CLK), 1052 GPIO_FN(LCD_FLM), 1053 GPIO_FN(LCD_M_DISP), 1054 GPIO_FN(LCD_CL2), 1055 GPIO_FN(LCD_CL1), 1056 GPIO_FN(LCD_DON), 1057 GPIO_FN(LCD_DATA15), 1058 GPIO_FN(LCD_DATA14), 1059 GPIO_FN(LCD_DATA13), 1060 GPIO_FN(LCD_DATA12), 1061 GPIO_FN(LCD_DATA11), 1062 GPIO_FN(LCD_DATA10), 1063 GPIO_FN(LCD_DATA9), 1064 GPIO_FN(LCD_DATA8), 1065 GPIO_FN(LCD_DATA7), 1066 GPIO_FN(LCD_DATA6), 1067 GPIO_FN(LCD_DATA5), 1068 GPIO_FN(LCD_DATA4), 1069 GPIO_FN(LCD_DATA3), 1070 GPIO_FN(LCD_DATA2), 1071 GPIO_FN(LCD_DATA1), 1072 GPIO_FN(LCD_DATA0), 1073 }; 1074 1075 static const struct pinmux_cfg_reg pinmux_config_regs[] = { 1076 { PINMUX_CFG_REG("PBIORL", 0xfffe3886, 16, 1, GROUP( 1077 0, 0, 1078 0, 0, 1079 0, 0, 1080 0, 0, 1081 PB11_IN, PB11_OUT, 1082 PB10_IN, PB10_OUT, 1083 PB9_IN, PB9_OUT, 1084 PB8_IN, PB8_OUT, 1085 0, 0, 1086 0, 0, 1087 0, 0, 1088 0, 0, 1089 0, 0, 1090 0, 0, 1091 0, 0, 1092 0, 0 )) 1093 }, 1094 { PINMUX_CFG_REG("PBCRL4", 0xfffe3890, 16, 4, GROUP( 1095 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1096 1097 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1098 1099 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1100 1101 PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11, 1102 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1103 }, 1104 { PINMUX_CFG_REG("PBCRL3", 0xfffe3892, 16, 4, GROUP( 1105 PB11MD_0, PB11MD_1, 1106 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1107 1108 PB10MD_0, PB10MD_1, 1109 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1110 1111 PB9MD_00, PB9MD_01, PB9MD_10, 0, 1112 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1113 1114 PB8MD_00, PB8MD_01, PB8MD_10, 0, 1115 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1116 }, 1117 { PINMUX_CFG_REG("PBCRL2", 0xfffe3894, 16, 4, GROUP( 1118 PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11, 1119 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1120 1121 PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11, 1122 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1123 1124 PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11, 1125 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1126 1127 PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11, 1128 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1129 }, 1130 { PINMUX_CFG_REG("PBCRL1", 0xfffe3896, 16, 4, GROUP( 1131 PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11, 1132 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1133 1134 PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11, 1135 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1136 1137 PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11, 1138 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1139 1140 PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11, 1141 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1142 }, 1143 { PINMUX_CFG_REG("IFCR", 0xfffe38a2, 16, 4, GROUP( 1144 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1145 1146 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1147 1148 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1149 1150 PB12IRQ_00, PB12IRQ_01, PB12IRQ_10, 0, 1151 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1152 }, 1153 { PINMUX_CFG_REG("PCIORL", 0xfffe3906, 16, 1, GROUP( 1154 0, 0, 1155 PC14_IN, PC14_OUT, 1156 PC13_IN, PC13_OUT, 1157 PC12_IN, PC12_OUT, 1158 PC11_IN, PC11_OUT, 1159 PC10_IN, PC10_OUT, 1160 PC9_IN, PC9_OUT, 1161 PC8_IN, PC8_OUT, 1162 PC7_IN, PC7_OUT, 1163 PC6_IN, PC6_OUT, 1164 PC5_IN, PC5_OUT, 1165 PC4_IN, PC4_OUT, 1166 PC3_IN, PC3_OUT, 1167 PC2_IN, PC2_OUT, 1168 PC1_IN, PC1_OUT, 1169 PC0_IN, PC0_OUT )) 1170 }, 1171 { PINMUX_CFG_REG("PCCRL4", 0xfffe3910, 16, 4, GROUP( 1172 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1173 1174 PC14MD_0, PC14MD_1, 1175 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1176 1177 PC13MD_0, PC13MD_1, 1178 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1179 1180 PC12MD_0, PC12MD_1, 1181 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1182 }, 1183 { PINMUX_CFG_REG("PCCRL3", 0xfffe3912, 16, 4, GROUP( 1184 PC11MD_00, PC11MD_01, PC11MD_10, 0, 1185 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1186 1187 PC10MD_00, PC10MD_01, PC10MD_10, 0, 1188 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1189 1190 PC9MD_0, PC9MD_1, 1191 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1192 1193 PC8MD_0, PC8MD_1, 1194 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1195 }, 1196 { PINMUX_CFG_REG("PCCRL2", 0xfffe3914, 16, 4, GROUP( 1197 PC7MD_0, PC7MD_1, 1198 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1199 1200 PC6MD_0, PC6MD_1, 1201 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1202 1203 PC5MD_0, PC5MD_1, 1204 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1205 1206 PC4MD_0, PC4MD_1, 1207 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1208 }, 1209 { PINMUX_CFG_REG("PCCRL1", 0xfffe3916, 16, 4, GROUP( 1210 PC3MD_0, PC3MD_1, 1211 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1212 1213 PC2MD_0, PC2MD_1, 1214 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1215 1216 PC1MD_0, PC1MD_1, 1217 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1218 1219 PC0MD_00, PC0MD_01, PC0MD_10, 0, 1220 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1221 }, 1222 { PINMUX_CFG_REG("PDIORL", 0xfffe3986, 16, 1, GROUP( 1223 PD15_IN, PD15_OUT, 1224 PD14_IN, PD14_OUT, 1225 PD13_IN, PD13_OUT, 1226 PD12_IN, PD12_OUT, 1227 PD11_IN, PD11_OUT, 1228 PD10_IN, PD10_OUT, 1229 PD9_IN, PD9_OUT, 1230 PD8_IN, PD8_OUT, 1231 PD7_IN, PD7_OUT, 1232 PD6_IN, PD6_OUT, 1233 PD5_IN, PD5_OUT, 1234 PD4_IN, PD4_OUT, 1235 PD3_IN, PD3_OUT, 1236 PD2_IN, PD2_OUT, 1237 PD1_IN, PD1_OUT, 1238 PD0_IN, PD0_OUT )) 1239 }, 1240 { PINMUX_CFG_REG("PDCRL4", 0xfffe3990, 16, 4, GROUP( 1241 PD15MD_000, PD15MD_001, PD15MD_010, 0, 1242 PD15MD_100, PD15MD_101, 0, 0, 1243 0, 0, 0, 0, 0, 0, 0, 0, 1244 1245 PD14MD_000, PD14MD_001, PD14MD_010, 0, 1246 0, PD14MD_101, 0, 0, 1247 0, 0, 0, 0, 0, 0, 0, 0, 1248 1249 PD13MD_000, PD13MD_001, PD13MD_010, 0, 1250 PD13MD_100, PD13MD_101, 0, 0, 1251 0, 0, 0, 0, 0, 0, 0, 0, 1252 1253 PD12MD_000, PD12MD_001, PD12MD_010, 0, 1254 PD12MD_100, PD12MD_101, 0, 0, 1255 0, 0, 0, 0, 0, 0, 0, 0 )) 1256 }, 1257 { PINMUX_CFG_REG("PDCRL3", 0xfffe3992, 16, 4, GROUP( 1258 PD11MD_000, PD11MD_001, PD11MD_010, 0, 1259 PD11MD_100, PD11MD_101, 0, 0, 1260 0, 0, 0, 0, 0, 0, 0, 0, 1261 1262 PD10MD_000, PD10MD_001, PD10MD_010, 0, 1263 PD10MD_100, PD10MD_101, 0, 0, 1264 0, 0, 0, 0, 0, 0, 0, 0, 1265 1266 PD9MD_000, PD9MD_001, PD9MD_010, 0, 1267 PD9MD_100, PD9MD_101, 0, 0, 1268 0, 0, 0, 0, 0, 0, 0, 0, 1269 1270 PD8MD_000, PD8MD_001, PD8MD_010, 0, 1271 PD8MD_100, PD8MD_101, 0, 0, 1272 0, 0, 0, 0, 0, 0, 0, 0 )) 1273 }, 1274 { PINMUX_CFG_REG("PDCRL2", 0xfffe3994, 16, 4, GROUP( 1275 PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011, 1276 PD7MD_100, PD7MD_101, 0, 0, 1277 0, 0, 0, 0, 0, 0, 0, 0, 1278 1279 PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011, 1280 PD6MD_100, PD6MD_101, 0, 0, 1281 0, 0, 0, 0, 0, 0, 0, 0, 1282 1283 PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011, 1284 PD5MD_100, PD5MD_101, 0, 0, 1285 0, 0, 0, 0, 0, 0, 0, 0, 1286 1287 PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011, 1288 PD4MD_100, PD4MD_101, 0, 0, 1289 0, 0, 0, 0, 0, 0, 0, 0 )) 1290 }, 1291 { PINMUX_CFG_REG("PDCRL1", 0xfffe3996, 16, 4, GROUP( 1292 PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011, 1293 PD3MD_100, PD3MD_101, 0, 0, 1294 0, 0, 0, 0, 0, 0, 0, 0, 1295 1296 PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011, 1297 PD2MD_100, PD2MD_101, 0, 0, 1298 0, 0, 0, 0, 0, 0, 0, 0, 1299 1300 PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011, 1301 PD1MD_100, PD1MD_101, 0, 0, 1302 0, 0, 0, 0, 0, 0, 0, 0, 1303 1304 PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011, 1305 PD0MD_100, PD0MD_101, 0, 0, 1306 0, 0, 0, 0, 0, 0, 0, 0 )) 1307 }, 1308 { PINMUX_CFG_REG("PEIORL", 0xfffe3a06, 16, 1, GROUP( 1309 PE15_IN, PE15_OUT, 1310 PE14_IN, PE14_OUT, 1311 PE13_IN, PE13_OUT, 1312 PE12_IN, PE12_OUT, 1313 PE11_IN, PE11_OUT, 1314 PE10_IN, PE10_OUT, 1315 PE9_IN, PE9_OUT, 1316 PE8_IN, PE8_OUT, 1317 PE7_IN, PE7_OUT, 1318 PE6_IN, PE6_OUT, 1319 PE5_IN, PE5_OUT, 1320 PE4_IN, PE4_OUT, 1321 PE3_IN, PE3_OUT, 1322 PE2_IN, PE2_OUT, 1323 PE1_IN, PE1_OUT, 1324 PE0_IN, PE0_OUT )) 1325 }, 1326 { PINMUX_CFG_REG("PECRL4", 0xfffe3a10, 16, 4, GROUP( 1327 PE15MD_00, PE15MD_01, 0, PE15MD_11, 1328 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1329 1330 PE14MD_00, PE14MD_01, 0, PE14MD_11, 1331 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1332 1333 PE13MD_00, 0, 0, PE13MD_11, 1334 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1335 1336 PE12MD_00, 0, 0, PE12MD_11, 1337 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1338 }, 1339 { PINMUX_CFG_REG("PECRL3", 0xfffe3a12, 16, 4, GROUP( 1340 PE11MD_000, PE11MD_001, PE11MD_010, 0, 1341 PE11MD_100, 0, 0, 0, 1342 0, 0, 0, 0, 0, 0, 0, 0, 1343 1344 PE10MD_000, PE10MD_001, PE10MD_010, 0, 1345 PE10MD_100, 0, 0, 0, 1346 0, 0, 0, 0, 0, 0, 0, 0, 1347 1348 PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11, 1349 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1350 1351 PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11, 1352 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1353 }, 1354 { PINMUX_CFG_REG("PECRL2", 0xfffe3a14, 16, 4, GROUP( 1355 PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011, 1356 PE7MD_100, 0, 0, 0, 1357 0, 0, 0, 0, 0, 0, 0, 0, 1358 1359 PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011, 1360 PE6MD_100, 0, 0, 0, 1361 0, 0, 0, 0, 0, 0, 0, 0, 1362 1363 PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011, 1364 PE5MD_100, 0, 0, 0, 1365 0, 0, 0, 0, 0, 0, 0, 0, 1366 1367 PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011, 1368 PE4MD_100, 0, 0, 0, 1369 0, 0, 0, 0, 0, 0, 0, 0 )) 1370 }, 1371 { PINMUX_CFG_REG("PECRL1", 0xfffe3a16, 16, 4, GROUP( 1372 PE3MD_00, PE3MD_01, 0, PE3MD_11, 1373 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1374 1375 PE2MD_00, PE2MD_01, 0, PE2MD_11, 1376 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1377 1378 PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11, 1379 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1380 1381 PE0MD_000, PE0MD_001, 0, PE0MD_011, 1382 PE0MD_100, 0, 0, 0, 1383 0, 0, 0, 0, 0, 0, 0, 0 )) 1384 }, 1385 { PINMUX_CFG_REG("PFIORH", 0xfffe3a84, 16, 1, GROUP( 1386 0, 0, 1387 PF30_IN, PF30_OUT, 1388 PF29_IN, PF29_OUT, 1389 PF28_IN, PF28_OUT, 1390 PF27_IN, PF27_OUT, 1391 PF26_IN, PF26_OUT, 1392 PF25_IN, PF25_OUT, 1393 PF24_IN, PF24_OUT, 1394 PF23_IN, PF23_OUT, 1395 PF22_IN, PF22_OUT, 1396 PF21_IN, PF21_OUT, 1397 PF20_IN, PF20_OUT, 1398 PF19_IN, PF19_OUT, 1399 PF18_IN, PF18_OUT, 1400 PF17_IN, PF17_OUT, 1401 PF16_IN, PF16_OUT )) 1402 }, 1403 { PINMUX_CFG_REG("PFIORL", 0xfffe3a86, 16, 1, GROUP( 1404 PF15_IN, PF15_OUT, 1405 PF14_IN, PF14_OUT, 1406 PF13_IN, PF13_OUT, 1407 PF12_IN, PF12_OUT, 1408 PF11_IN, PF11_OUT, 1409 PF10_IN, PF10_OUT, 1410 PF9_IN, PF9_OUT, 1411 PF8_IN, PF8_OUT, 1412 PF7_IN, PF7_OUT, 1413 PF6_IN, PF6_OUT, 1414 PF5_IN, PF5_OUT, 1415 PF4_IN, PF4_OUT, 1416 PF3_IN, PF3_OUT, 1417 PF2_IN, PF2_OUT, 1418 PF1_IN, PF1_OUT, 1419 PF0_IN, PF0_OUT )) 1420 }, 1421 { PINMUX_CFG_REG("PFCRH4", 0xfffe3a88, 16, 4, GROUP( 1422 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1423 1424 PF30MD_0, PF30MD_1, 1425 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1426 1427 PF29MD_0, PF29MD_1, 1428 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1429 1430 PF28MD_0, PF28MD_1, 1431 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1432 }, 1433 { PINMUX_CFG_REG("PFCRH3", 0xfffe3a8a, 16, 4, GROUP( 1434 PF27MD_0, PF27MD_1, 1435 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1436 1437 PF26MD_0, PF26MD_1, 1438 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1439 1440 PF25MD_0, PF25MD_1, 1441 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1442 1443 PF24MD_0, PF24MD_1, 1444 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1445 }, 1446 { PINMUX_CFG_REG("PFCRH2", 0xfffe3a8c, 16, 4, GROUP( 1447 PF23MD_00, PF23MD_01, PF23MD_10, 0, 1448 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1449 1450 PF22MD_00, PF22MD_01, PF22MD_10, 0, 1451 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1452 1453 PF21MD_00, PF21MD_01, PF21MD_10, 0, 1454 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1455 1456 PF20MD_00, PF20MD_01, PF20MD_10, 0, 1457 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1458 }, 1459 { PINMUX_CFG_REG("PFCRH1", 0xfffe3a8e, 16, 4, GROUP( 1460 PF19MD_00, PF19MD_01, PF19MD_10, 0, 1461 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1462 1463 PF18MD_00, PF18MD_01, PF18MD_10, 0, 1464 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1465 1466 PF17MD_00, PF17MD_01, PF17MD_10, 0, 1467 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1468 1469 PF16MD_00, PF16MD_01, PF16MD_10, 0, 1470 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1471 }, 1472 { PINMUX_CFG_REG("PFCRL4", 0xfffe3a90, 16, 4, GROUP( 1473 PF15MD_00, PF15MD_01, PF15MD_10, 0, 1474 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1475 1476 PF14MD_00, PF14MD_01, PF14MD_10, 0, 1477 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1478 1479 PF13MD_00, PF13MD_01, PF13MD_10, 0, 1480 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1481 1482 PF12MD_00, PF12MD_01, PF12MD_10, 0, 1483 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1484 }, 1485 { PINMUX_CFG_REG("PFCRL3", 0xfffe3a92, 16, 4, GROUP( 1486 PF11MD_00, PF11MD_01, PF11MD_10, 0, 1487 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1488 1489 PF10MD_00, PF10MD_01, PF10MD_10, 0, 1490 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1491 1492 PF9MD_00, PF9MD_01, PF9MD_10, 0, 1493 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1494 1495 PF8MD_00, PF8MD_01, PF8MD_10, 0, 1496 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1497 }, 1498 { PINMUX_CFG_REG("PFCRL2", 0xfffe3a94, 16, 4, GROUP( 1499 PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11, 1500 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1501 1502 PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11, 1503 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1504 1505 PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11, 1506 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1507 1508 PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11, 1509 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1510 }, 1511 { PINMUX_CFG_REG("PFCRL1", 0xfffe3a96, 16, 4, GROUP( 1512 PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11, 1513 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1514 1515 PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11, 1516 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1517 1518 PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11, 1519 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1520 1521 PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11, 1522 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 )) 1523 }, 1524 {} 1525 }; 1526 1527 static const struct pinmux_data_reg pinmux_data_regs[] = { 1528 { PINMUX_DATA_REG("PADRL", 0xfffe3802, 16, GROUP( 1529 0, 0, 0, 0, 1530 0, 0, 0, 0, 1531 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA, 1532 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA )) 1533 }, 1534 { PINMUX_DATA_REG("PBDRL", 0xfffe3882, 16, GROUP( 1535 0, 0, 0, PB12_DATA, 1536 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA, 1537 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA, 1538 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA )) 1539 }, 1540 { PINMUX_DATA_REG("PCDRL", 0xfffe3902, 16, GROUP( 1541 0, PC14_DATA, PC13_DATA, PC12_DATA, 1542 PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA, 1543 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA, 1544 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA )) 1545 }, 1546 { PINMUX_DATA_REG("PDDRL", 0xfffe3982, 16, GROUP( 1547 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA, 1548 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA, 1549 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA, 1550 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA )) 1551 }, 1552 { PINMUX_DATA_REG("PEDRL", 0xfffe3a02, 16, GROUP( 1553 PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA, 1554 PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA, 1555 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA, 1556 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA )) 1557 }, 1558 { PINMUX_DATA_REG("PFDRH", 0xfffe3a80, 16, GROUP( 1559 0, PF30_DATA, PF29_DATA, PF28_DATA, 1560 PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA, 1561 PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA, 1562 PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA )) 1563 }, 1564 { PINMUX_DATA_REG("PFDRL", 0xfffe3a82, 16, GROUP( 1565 PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA, 1566 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA, 1567 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA, 1568 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA )) 1569 }, 1570 { }, 1571 }; 1572 1573 const struct sh_pfc_soc_info sh7203_pinmux_info = { 1574 .name = "sh7203_pfc", 1575 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN }, 1576 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT }, 1577 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, 1578 1579 .pins = pinmux_pins, 1580 .nr_pins = ARRAY_SIZE(pinmux_pins), 1581 .func_gpios = pinmux_func_gpios, 1582 .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), 1583 1584 .cfg_regs = pinmux_config_regs, 1585 .data_regs = pinmux_data_regs, 1586 1587 .pinmux_data = pinmux_data, 1588 .pinmux_data_size = ARRAY_SIZE(pinmux_data), 1589 }; 1590