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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Hantro VPU codec driver
4  *
5  * Copyright 2018 Google LLC.
6  *	Tomasz Figa <tfiga@chromium.org>
7  */
8 
9 #ifndef HANTRO_HW_H_
10 #define HANTRO_HW_H_
11 
12 #include <linux/interrupt.h>
13 #include <linux/v4l2-controls.h>
14 #include <media/h264-ctrls.h>
15 #include <media/mpeg2-ctrls.h>
16 #include <media/vp8-ctrls.h>
17 #include <media/videobuf2-core.h>
18 
19 #define DEC_8190_ALIGN_MASK	0x07U
20 
21 #define MB_DIM			16
22 #define MB_WIDTH(w)		DIV_ROUND_UP(w, MB_DIM)
23 #define MB_HEIGHT(h)		DIV_ROUND_UP(h, MB_DIM)
24 
25 struct hantro_dev;
26 struct hantro_ctx;
27 struct hantro_buf;
28 struct hantro_variant;
29 
30 /**
31  * struct hantro_aux_buf - auxiliary DMA buffer for hardware data
32  * @cpu:	CPU pointer to the buffer.
33  * @dma:	DMA address of the buffer.
34  * @size:	Size of the buffer.
35  * @attrs:	Attributes of the DMA mapping.
36  */
37 struct hantro_aux_buf {
38 	void *cpu;
39 	dma_addr_t dma;
40 	size_t size;
41 	unsigned long attrs;
42 };
43 
44 /**
45  * struct hantro_jpeg_enc_hw_ctx
46  * @bounce_buffer:	Bounce buffer
47  */
48 struct hantro_jpeg_enc_hw_ctx {
49 	struct hantro_aux_buf bounce_buffer;
50 };
51 
52 /* Max. number of entries in the DPB (HW limitation). */
53 #define HANTRO_H264_DPB_SIZE		16
54 
55 /**
56  * struct hantro_h264_dec_ctrls
57  * @decode:	Decode params
58  * @scaling:	Scaling info
59  * @sps:	SPS info
60  * @pps:	PPS info
61  */
62 struct hantro_h264_dec_ctrls {
63 	const struct v4l2_ctrl_h264_decode_params *decode;
64 	const struct v4l2_ctrl_h264_scaling_matrix *scaling;
65 	const struct v4l2_ctrl_h264_sps *sps;
66 	const struct v4l2_ctrl_h264_pps *pps;
67 };
68 
69 /**
70  * struct hantro_h264_dec_reflists
71  * @p:		P reflist
72  * @b0:		B0 reflist
73  * @b1:		B1 reflist
74  */
75 struct hantro_h264_dec_reflists {
76 	u8 p[HANTRO_H264_DPB_SIZE];
77 	u8 b0[HANTRO_H264_DPB_SIZE];
78 	u8 b1[HANTRO_H264_DPB_SIZE];
79 };
80 
81 /**
82  * struct hantro_h264_dec_hw_ctx
83  * @priv:	Private auxiliary buffer for hardware.
84  * @dpb:	DPB
85  * @reflists:	P/B0/B1 reflists
86  * @ctrls:	V4L2 controls attached to a run
87  */
88 struct hantro_h264_dec_hw_ctx {
89 	struct hantro_aux_buf priv;
90 	struct v4l2_h264_dpb_entry dpb[HANTRO_H264_DPB_SIZE];
91 	struct hantro_h264_dec_reflists reflists;
92 	struct hantro_h264_dec_ctrls ctrls;
93 };
94 
95 /**
96  * struct hantro_mpeg2_dec_hw_ctx
97  * @qtable:		Quantization table
98  */
99 struct hantro_mpeg2_dec_hw_ctx {
100 	struct hantro_aux_buf qtable;
101 };
102 
103 /**
104  * struct hantro_vp8d_hw_ctx
105  * @segment_map:	Segment map buffer.
106  * @prob_tbl:		Probability table buffer.
107  */
108 struct hantro_vp8_dec_hw_ctx {
109 	struct hantro_aux_buf segment_map;
110 	struct hantro_aux_buf prob_tbl;
111 };
112 
113 /**
114  * struct hantro_postproc_ctx
115  *
116  * @dec_q:		References buffers, in decoder format.
117  */
118 struct hantro_postproc_ctx {
119 	struct hantro_aux_buf dec_q[VB2_MAX_FRAME];
120 };
121 
122 /**
123  * struct hantro_codec_ops - codec mode specific operations
124  *
125  * @init:	If needed, can be used for initialization.
126  *		Optional and called from process context.
127  * @exit:	If needed, can be used to undo the .init phase.
128  *		Optional and called from process context.
129  * @run:	Start single {en,de)coding job. Called from atomic context
130  *		to indicate that a pair of buffers is ready and the hardware
131  *		should be programmed and started.
132  * @done:	Read back processing results and additional data from hardware.
133  * @reset:	Reset the hardware in case of a timeout.
134  */
135 struct hantro_codec_ops {
136 	int (*init)(struct hantro_ctx *ctx);
137 	void (*exit)(struct hantro_ctx *ctx);
138 	void (*run)(struct hantro_ctx *ctx);
139 	void (*done)(struct hantro_ctx *ctx);
140 	void (*reset)(struct hantro_ctx *ctx);
141 };
142 
143 /**
144  * enum hantro_enc_fmt - source format ID for hardware registers.
145  */
146 enum hantro_enc_fmt {
147 	RK3288_VPU_ENC_FMT_YUV420P = 0,
148 	RK3288_VPU_ENC_FMT_YUV420SP = 1,
149 	RK3288_VPU_ENC_FMT_YUYV422 = 2,
150 	RK3288_VPU_ENC_FMT_UYVY422 = 3,
151 };
152 
153 extern const struct hantro_variant rk3399_vpu_variant;
154 extern const struct hantro_variant rk3328_vpu_variant;
155 extern const struct hantro_variant rk3288_vpu_variant;
156 extern const struct hantro_variant imx8mq_vpu_variant;
157 
158 extern const struct hantro_postproc_regs hantro_g1_postproc_regs;
159 
160 extern const u32 hantro_vp8_dec_mc_filter[8][6];
161 
162 void hantro_watchdog(struct work_struct *work);
163 void hantro_run(struct hantro_ctx *ctx);
164 void hantro_irq_done(struct hantro_dev *vpu,
165 		     enum vb2_buffer_state result);
166 void hantro_start_prepare_run(struct hantro_ctx *ctx);
167 void hantro_end_prepare_run(struct hantro_ctx *ctx);
168 
169 void hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx);
170 void rk3399_vpu_jpeg_enc_run(struct hantro_ctx *ctx);
171 int hantro_jpeg_enc_init(struct hantro_ctx *ctx);
172 void hantro_jpeg_enc_exit(struct hantro_ctx *ctx);
173 void hantro_jpeg_enc_done(struct hantro_ctx *ctx);
174 
175 dma_addr_t hantro_h264_get_ref_buf(struct hantro_ctx *ctx,
176 				   unsigned int dpb_idx);
177 int hantro_h264_dec_prepare_run(struct hantro_ctx *ctx);
178 void hantro_g1_h264_dec_run(struct hantro_ctx *ctx);
179 int hantro_h264_dec_init(struct hantro_ctx *ctx);
180 void hantro_h264_dec_exit(struct hantro_ctx *ctx);
181 
182 static inline size_t
hantro_h264_mv_size(unsigned int width,unsigned int height)183 hantro_h264_mv_size(unsigned int width, unsigned int height)
184 {
185 	/*
186 	 * A decoded 8-bit 4:2:0 NV12 frame may need memory for up to
187 	 * 448 bytes per macroblock with additional 32 bytes on
188 	 * multi-core variants.
189 	 *
190 	 * The H264 decoder needs extra space on the output buffers
191 	 * to store motion vectors. This is needed for reference
192 	 * frames and only if the format is non-post-processed NV12.
193 	 *
194 	 * Memory layout is as follow:
195 	 *
196 	 * +---------------------------+
197 	 * | Y-plane   256 bytes x MBs |
198 	 * +---------------------------+
199 	 * | UV-plane  128 bytes x MBs |
200 	 * +---------------------------+
201 	 * | MV buffer  64 bytes x MBs |
202 	 * +---------------------------+
203 	 * | MC sync          32 bytes |
204 	 * +---------------------------+
205 	 */
206 	return 64 * MB_WIDTH(width) * MB_WIDTH(height) + 32;
207 }
208 
209 void hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx);
210 void rk3399_vpu_mpeg2_dec_run(struct hantro_ctx *ctx);
211 void hantro_mpeg2_dec_copy_qtable(u8 *qtable,
212 	const struct v4l2_ctrl_mpeg2_quantization *ctrl);
213 int hantro_mpeg2_dec_init(struct hantro_ctx *ctx);
214 void hantro_mpeg2_dec_exit(struct hantro_ctx *ctx);
215 
216 void hantro_g1_vp8_dec_run(struct hantro_ctx *ctx);
217 void rk3399_vpu_vp8_dec_run(struct hantro_ctx *ctx);
218 int hantro_vp8_dec_init(struct hantro_ctx *ctx);
219 void hantro_vp8_dec_exit(struct hantro_ctx *ctx);
220 void hantro_vp8_prob_update(struct hantro_ctx *ctx,
221 			    const struct v4l2_ctrl_vp8_frame_header *hdr);
222 
223 #endif /* HANTRO_HW_H_ */
224