1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Renesas RPC-IF core driver 4 * 5 * Copyright (C) 2018~2019 Renesas Solutions Corp. 6 * Copyright (C) 2019 Macronix International Co., Ltd. 7 * Copyright (C) 2019-2020 Cogent Embedded, Inc. 8 */ 9 10 #ifndef __RENESAS_RPC_IF_H 11 #define __RENESAS_RPC_IF_H 12 13 #include <linux/types.h> 14 15 enum rpcif_data_dir { 16 RPCIF_NO_DATA, 17 RPCIF_DATA_IN, 18 RPCIF_DATA_OUT, 19 }; 20 21 struct rpcif_op { 22 struct { 23 u8 buswidth; 24 u8 opcode; 25 bool ddr; 26 } cmd, ocmd; 27 28 struct { 29 u8 nbytes; 30 u8 buswidth; 31 bool ddr; 32 u64 val; 33 } addr; 34 35 struct { 36 u8 ncycles; 37 u8 buswidth; 38 } dummy; 39 40 struct { 41 u8 nbytes; 42 u8 buswidth; 43 bool ddr; 44 u32 val; 45 } option; 46 47 struct { 48 u8 buswidth; 49 unsigned int nbytes; 50 enum rpcif_data_dir dir; 51 bool ddr; 52 union { 53 void *in; 54 const void *out; 55 } buf; 56 } data; 57 }; 58 59 struct rpcif { 60 struct device *dev; 61 void __iomem *base; 62 void __iomem *dirmap; 63 struct regmap *regmap; 64 struct reset_control *rstc; 65 size_t size; 66 enum rpcif_data_dir dir; 67 u8 bus_size; 68 u8 xfer_size; 69 void *buffer; 70 u32 xferlen; 71 u32 smcr; 72 u32 smadr; 73 u32 command; /* DRCMR or SMCMR */ 74 u32 option; /* DROPR or SMOPR */ 75 u32 enable; /* DRENR or SMENR */ 76 u32 dummy; /* DRDMCR or SMDMCR */ 77 u32 ddr; /* DRDRENR or SMDRENR */ 78 }; 79 80 int rpcif_sw_init(struct rpcif *rpc, struct device *dev); 81 void rpcif_hw_init(struct rpcif *rpc, bool hyperflash); 82 void rpcif_enable_rpm(struct rpcif *rpc); 83 void rpcif_disable_rpm(struct rpcif *rpc); 84 void rpcif_prepare(struct rpcif *rpc, const struct rpcif_op *op, u64 *offs, 85 size_t *len); 86 int rpcif_manual_xfer(struct rpcif *rpc); 87 ssize_t rpcif_dirmap_read(struct rpcif *rpc, u64 offs, size_t len, void *buf); 88 89 #endif // __RENESAS_RPC_IF_H 90