49 void amdgpu_sync_create(struct amdgpu_sync *sync)  in amdgpu_sync_create()  argument
51 	hash_init(sync->fences);  in amdgpu_sync_create()
52 	sync->last_vm_update = NULL;  in amdgpu_sync_create()
131 static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct dma_fence *f)  in amdgpu_sync_add_later()  argument
135 	hash_for_each_possible(sync->fences, e, node, f->context) {  in amdgpu_sync_add_later()
153 int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f)  in amdgpu_sync_fence()  argument
160 	if (amdgpu_sync_add_later(sync, f))  in amdgpu_sync_fence()
167 	hash_add(sync->fences, &e->node, f->context);  in amdgpu_sync_fence()
181 int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence)  in amdgpu_sync_vm_fence()  argument
186 	amdgpu_sync_keep_later(&sync->last_vm_update, fence);  in amdgpu_sync_vm_fence()
187 	return amdgpu_sync_fence(sync, fence);  in amdgpu_sync_vm_fence()
200 int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync,  in amdgpu_sync_resv()  argument
214 	r = amdgpu_sync_fence(sync, f);  in amdgpu_sync_resv()
230 			r = amdgpu_sync_fence(sync, f);  in amdgpu_sync_resv()
271 		r = amdgpu_sync_fence(sync, f);  in amdgpu_sync_resv()
287 struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,  in amdgpu_sync_peek_fence()  argument
294 	hash_for_each_safe(sync->fences, i, tmp, e, node) {  in amdgpu_sync_peek_fence()
329 struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync)  in amdgpu_sync_get_fence()  argument
335 	hash_for_each_safe(sync->fences, i, tmp, e, node) {  in amdgpu_sync_get_fence()
385 int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr)  in amdgpu_sync_wait()  argument
391 	hash_for_each_safe(sync->fences, i, tmp, e, node) {  in amdgpu_sync_wait()
411 void amdgpu_sync_free(struct amdgpu_sync *sync)  in amdgpu_sync_free()  argument
417 	hash_for_each_safe(sync->fences, i, tmp, e, node) {  in amdgpu_sync_free()
423 	dma_fence_put(sync->last_vm_update);  in amdgpu_sync_free()