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1 /*
2  * Copyright 2014 Advanced Micro Devices, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sub license, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
20  *
21  * The above copyright notice and this permission notice (including the
22  * next paragraph) shall be included in all copies or substantial portions
23  * of the Software.
24  *
25  */
26 /*
27  * Authors:
28  *    Christian König <christian.koenig@amd.com>
29  */
30 
31 #include "amdgpu.h"
32 #include "amdgpu_trace.h"
33 #include "amdgpu_amdkfd.h"
34 
35 struct amdgpu_sync_entry {
36 	struct hlist_node	node;
37 	struct dma_fence	*fence;
38 };
39 
40 static struct kmem_cache *amdgpu_sync_slab;
41 
42 /**
43  * amdgpu_sync_create - zero init sync object
44  *
45  * @sync: sync object to initialize
46  *
47  * Just clear the sync object for now.
48  */
amdgpu_sync_create(struct amdgpu_sync * sync)49 void amdgpu_sync_create(struct amdgpu_sync *sync)
50 {
51 	hash_init(sync->fences);
52 	sync->last_vm_update = NULL;
53 }
54 
55 /**
56  * amdgpu_sync_same_dev - test if fence belong to us
57  *
58  * @adev: amdgpu device to use for the test
59  * @f: fence to test
60  *
61  * Test if the fence was issued by us.
62  */
amdgpu_sync_same_dev(struct amdgpu_device * adev,struct dma_fence * f)63 static bool amdgpu_sync_same_dev(struct amdgpu_device *adev,
64 				 struct dma_fence *f)
65 {
66 	struct drm_sched_fence *s_fence = to_drm_sched_fence(f);
67 
68 	if (s_fence) {
69 		struct amdgpu_ring *ring;
70 
71 		ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
72 		return ring->adev == adev;
73 	}
74 
75 	return false;
76 }
77 
78 /**
79  * amdgpu_sync_get_owner - extract the owner of a fence
80  *
81  * @fence: fence get the owner from
82  *
83  * Extract who originally created the fence.
84  */
amdgpu_sync_get_owner(struct dma_fence * f)85 static void *amdgpu_sync_get_owner(struct dma_fence *f)
86 {
87 	struct drm_sched_fence *s_fence;
88 	struct amdgpu_amdkfd_fence *kfd_fence;
89 
90 	if (!f)
91 		return AMDGPU_FENCE_OWNER_UNDEFINED;
92 
93 	s_fence = to_drm_sched_fence(f);
94 	if (s_fence)
95 		return s_fence->owner;
96 
97 	kfd_fence = to_amdgpu_amdkfd_fence(f);
98 	if (kfd_fence)
99 		return AMDGPU_FENCE_OWNER_KFD;
100 
101 	return AMDGPU_FENCE_OWNER_UNDEFINED;
102 }
103 
104 /**
105  * amdgpu_sync_keep_later - Keep the later fence
106  *
107  * @keep: existing fence to test
108  * @fence: new fence
109  *
110  * Either keep the existing fence or the new one, depending which one is later.
111  */
amdgpu_sync_keep_later(struct dma_fence ** keep,struct dma_fence * fence)112 static void amdgpu_sync_keep_later(struct dma_fence **keep,
113 				   struct dma_fence *fence)
114 {
115 	if (*keep && dma_fence_is_later(*keep, fence))
116 		return;
117 
118 	dma_fence_put(*keep);
119 	*keep = dma_fence_get(fence);
120 }
121 
122 /**
123  * amdgpu_sync_add_later - add the fence to the hash
124  *
125  * @sync: sync object to add the fence to
126  * @f: fence to add
127  *
128  * Tries to add the fence to an existing hash entry. Returns true when an entry
129  * was found, false otherwise.
130  */
amdgpu_sync_add_later(struct amdgpu_sync * sync,struct dma_fence * f)131 static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct dma_fence *f)
132 {
133 	struct amdgpu_sync_entry *e;
134 
135 	hash_for_each_possible(sync->fences, e, node, f->context) {
136 		if (unlikely(e->fence->context != f->context))
137 			continue;
138 
139 		amdgpu_sync_keep_later(&e->fence, f);
140 		return true;
141 	}
142 	return false;
143 }
144 
145 /**
146  * amdgpu_sync_fence - remember to sync to this fence
147  *
148  * @sync: sync object to add fence to
149  * @f: fence to sync to
150  *
151  * Add the fence to the sync object.
152  */
amdgpu_sync_fence(struct amdgpu_sync * sync,struct dma_fence * f)153 int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f)
154 {
155 	struct amdgpu_sync_entry *e;
156 
157 	if (!f)
158 		return 0;
159 
160 	if (amdgpu_sync_add_later(sync, f))
161 		return 0;
162 
163 	e = kmem_cache_alloc(amdgpu_sync_slab, GFP_KERNEL);
164 	if (!e)
165 		return -ENOMEM;
166 
167 	hash_add(sync->fences, &e->node, f->context);
168 	e->fence = dma_fence_get(f);
169 	return 0;
170 }
171 
172 /**
173  * amdgpu_sync_vm_fence - remember to sync to this VM fence
174  *
175  * @adev: amdgpu device
176  * @sync: sync object to add fence to
177  * @fence: the VM fence to add
178  *
179  * Add the fence to the sync object and remember it as VM update.
180  */
amdgpu_sync_vm_fence(struct amdgpu_sync * sync,struct dma_fence * fence)181 int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence)
182 {
183 	if (!fence)
184 		return 0;
185 
186 	amdgpu_sync_keep_later(&sync->last_vm_update, fence);
187 	return amdgpu_sync_fence(sync, fence);
188 }
189 
190 /**
191  * amdgpu_sync_resv - sync to a reservation object
192  *
193  * @sync: sync object to add fences from reservation object to
194  * @resv: reservation object with embedded fence
195  * @mode: how owner affects which fences we sync to
196  * @owner: owner of the planned job submission
197  *
198  * Sync to the fence
199  */
amdgpu_sync_resv(struct amdgpu_device * adev,struct amdgpu_sync * sync,struct dma_resv * resv,enum amdgpu_sync_mode mode,void * owner)200 int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync,
201 		     struct dma_resv *resv, enum amdgpu_sync_mode mode,
202 		     void *owner)
203 {
204 	struct dma_resv_list *flist;
205 	struct dma_fence *f;
206 	unsigned i;
207 	int r = 0;
208 
209 	if (resv == NULL)
210 		return -EINVAL;
211 
212 	/* always sync to the exclusive fence */
213 	f = dma_resv_get_excl(resv);
214 	r = amdgpu_sync_fence(sync, f);
215 
216 	flist = dma_resv_get_list(resv);
217 	if (!flist || r)
218 		return r;
219 
220 	for (i = 0; i < flist->shared_count; ++i) {
221 		void *fence_owner;
222 
223 		f = rcu_dereference_protected(flist->shared[i],
224 					      dma_resv_held(resv));
225 
226 		fence_owner = amdgpu_sync_get_owner(f);
227 
228 		/* Always sync to moves, no matter what */
229 		if (fence_owner == AMDGPU_FENCE_OWNER_UNDEFINED) {
230 			r = amdgpu_sync_fence(sync, f);
231 			if (r)
232 				break;
233 		}
234 
235 		/* We only want to trigger KFD eviction fences on
236 		 * evict or move jobs. Skip KFD fences otherwise.
237 		 */
238 		if (fence_owner == AMDGPU_FENCE_OWNER_KFD &&
239 		    owner != AMDGPU_FENCE_OWNER_UNDEFINED)
240 			continue;
241 
242 		/* Never sync to VM updates either. */
243 		if (fence_owner == AMDGPU_FENCE_OWNER_VM &&
244 		    owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
245 	    owner != AMDGPU_FENCE_OWNER_KFD)
246 			continue;
247 
248 		/* Ignore fences depending on the sync mode */
249 		switch (mode) {
250 		case AMDGPU_SYNC_ALWAYS:
251 			break;
252 
253 		case AMDGPU_SYNC_NE_OWNER:
254 			if (amdgpu_sync_same_dev(adev, f) &&
255 			    fence_owner == owner)
256 				continue;
257 			break;
258 
259 		case AMDGPU_SYNC_EQ_OWNER:
260 			if (amdgpu_sync_same_dev(adev, f) &&
261 			    fence_owner != owner)
262 				continue;
263 			break;
264 
265 		case AMDGPU_SYNC_EXPLICIT:
266 			continue;
267 		}
268 
269 		WARN(debug_evictions && fence_owner == AMDGPU_FENCE_OWNER_KFD,
270 		     "Adding eviction fence to sync obj");
271 		r = amdgpu_sync_fence(sync, f);
272 		if (r)
273 			break;
274 	}
275 	return r;
276 }
277 
278 /**
279  * amdgpu_sync_peek_fence - get the next fence not signaled yet
280  *
281  * @sync: the sync object
282  * @ring: optional ring to use for test
283  *
284  * Returns the next fence not signaled yet without removing it from the sync
285  * object.
286  */
amdgpu_sync_peek_fence(struct amdgpu_sync * sync,struct amdgpu_ring * ring)287 struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
288 					 struct amdgpu_ring *ring)
289 {
290 	struct amdgpu_sync_entry *e;
291 	struct hlist_node *tmp;
292 	int i;
293 
294 	hash_for_each_safe(sync->fences, i, tmp, e, node) {
295 		struct dma_fence *f = e->fence;
296 		struct drm_sched_fence *s_fence = to_drm_sched_fence(f);
297 
298 		if (dma_fence_is_signaled(f)) {
299 			hash_del(&e->node);
300 			dma_fence_put(f);
301 			kmem_cache_free(amdgpu_sync_slab, e);
302 			continue;
303 		}
304 		if (ring && s_fence) {
305 			/* For fences from the same ring it is sufficient
306 			 * when they are scheduled.
307 			 */
308 			if (s_fence->sched == &ring->sched) {
309 				if (dma_fence_is_signaled(&s_fence->scheduled))
310 					continue;
311 
312 				return &s_fence->scheduled;
313 			}
314 		}
315 
316 		return f;
317 	}
318 
319 	return NULL;
320 }
321 
322 /**
323  * amdgpu_sync_get_fence - get the next fence from the sync object
324  *
325  * @sync: sync object to use
326  *
327  * Get and removes the next fence from the sync object not signaled yet.
328  */
amdgpu_sync_get_fence(struct amdgpu_sync * sync)329 struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync)
330 {
331 	struct amdgpu_sync_entry *e;
332 	struct hlist_node *tmp;
333 	struct dma_fence *f;
334 	int i;
335 	hash_for_each_safe(sync->fences, i, tmp, e, node) {
336 
337 		f = e->fence;
338 
339 		hash_del(&e->node);
340 		kmem_cache_free(amdgpu_sync_slab, e);
341 
342 		if (!dma_fence_is_signaled(f))
343 			return f;
344 
345 		dma_fence_put(f);
346 	}
347 	return NULL;
348 }
349 
350 /**
351  * amdgpu_sync_clone - clone a sync object
352  *
353  * @source: sync object to clone
354  * @clone: pointer to destination sync object
355  *
356  * Adds references to all unsignaled fences in @source to @clone. Also
357  * removes signaled fences from @source while at it.
358  */
amdgpu_sync_clone(struct amdgpu_sync * source,struct amdgpu_sync * clone)359 int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone)
360 {
361 	struct amdgpu_sync_entry *e;
362 	struct hlist_node *tmp;
363 	struct dma_fence *f;
364 	int i, r;
365 
366 	hash_for_each_safe(source->fences, i, tmp, e, node) {
367 		f = e->fence;
368 		if (!dma_fence_is_signaled(f)) {
369 			r = amdgpu_sync_fence(clone, f);
370 			if (r)
371 				return r;
372 		} else {
373 			hash_del(&e->node);
374 			dma_fence_put(f);
375 			kmem_cache_free(amdgpu_sync_slab, e);
376 		}
377 	}
378 
379 	dma_fence_put(clone->last_vm_update);
380 	clone->last_vm_update = dma_fence_get(source->last_vm_update);
381 
382 	return 0;
383 }
384 
amdgpu_sync_wait(struct amdgpu_sync * sync,bool intr)385 int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr)
386 {
387 	struct amdgpu_sync_entry *e;
388 	struct hlist_node *tmp;
389 	int i, r;
390 
391 	hash_for_each_safe(sync->fences, i, tmp, e, node) {
392 		r = dma_fence_wait(e->fence, intr);
393 		if (r)
394 			return r;
395 
396 		hash_del(&e->node);
397 		dma_fence_put(e->fence);
398 		kmem_cache_free(amdgpu_sync_slab, e);
399 	}
400 
401 	return 0;
402 }
403 
404 /**
405  * amdgpu_sync_free - free the sync object
406  *
407  * @sync: sync object to use
408  *
409  * Free the sync object.
410  */
amdgpu_sync_free(struct amdgpu_sync * sync)411 void amdgpu_sync_free(struct amdgpu_sync *sync)
412 {
413 	struct amdgpu_sync_entry *e;
414 	struct hlist_node *tmp;
415 	unsigned i;
416 
417 	hash_for_each_safe(sync->fences, i, tmp, e, node) {
418 		hash_del(&e->node);
419 		dma_fence_put(e->fence);
420 		kmem_cache_free(amdgpu_sync_slab, e);
421 	}
422 
423 	dma_fence_put(sync->last_vm_update);
424 }
425 
426 /**
427  * amdgpu_sync_init - init sync object subsystem
428  *
429  * Allocate the slab allocator.
430  */
amdgpu_sync_init(void)431 int amdgpu_sync_init(void)
432 {
433 	amdgpu_sync_slab = kmem_cache_create(
434 		"amdgpu_sync", sizeof(struct amdgpu_sync_entry), 0,
435 		SLAB_HWCACHE_ALIGN, NULL);
436 	if (!amdgpu_sync_slab)
437 		return -ENOMEM;
438 
439 	return 0;
440 }
441 
442 /**
443  * amdgpu_sync_fini - fini sync object subsystem
444  *
445  * Free the slab allocator.
446  */
amdgpu_sync_fini(void)447 void amdgpu_sync_fini(void)
448 {
449 	kmem_cache_destroy(amdgpu_sync_slab);
450 }
451