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Searched refs:asic (Results 1 – 25 of 43) sorted by relevance

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/drivers/mfd/
Dasic3.c90 void asic3_write_register(struct asic3 *asic, unsigned int reg, u32 value) in asic3_write_register() argument
92 iowrite16(value, asic->mapping + in asic3_write_register()
93 (reg >> asic->bus_shift)); in asic3_write_register()
97 u32 asic3_read_register(struct asic3 *asic, unsigned int reg) in asic3_read_register() argument
99 return ioread16(asic->mapping + in asic3_read_register()
100 (reg >> asic->bus_shift)); in asic3_read_register()
104 static void asic3_set_register(struct asic3 *asic, u32 reg, u32 bits, bool set) in asic3_set_register() argument
109 raw_spin_lock_irqsave(&asic->lock, flags); in asic3_set_register()
110 val = asic3_read_register(asic, reg); in asic3_set_register()
115 asic3_write_register(asic, reg, val); in asic3_set_register()
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Dhtc-pasic3.c36 struct pasic3_data *asic = dev_get_drvdata(dev); in pasic3_write_register() local
37 int bus_shift = asic->bus_shift; in pasic3_write_register()
38 void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift); in pasic3_write_register()
39 void __iomem *data = asic->mapping + (REG_DATA << bus_shift); in pasic3_write_register()
51 struct pasic3_data *asic = dev_get_drvdata(dev); in pasic3_read_register() local
52 int bus_shift = asic->bus_shift; in pasic3_read_register()
53 void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift); in pasic3_read_register()
54 void __iomem *data = asic->mapping + (REG_DATA << bus_shift); in pasic3_read_register()
128 struct pasic3_data *asic; in pasic3_probe() local
147 asic = devm_kzalloc(dev, sizeof(struct pasic3_data), GFP_KERNEL); in pasic3_probe()
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/drivers/staging/comedi/drivers/
Dpcmuio.c130 int asic) in pcmuio_asic_iobase() argument
132 return dev->iobase + (asic * PCMUIO_ASIC_IOSIZE); in pcmuio_asic_iobase()
154 int asic, int page, int port) in pcmuio_write() argument
157 struct pcmuio_asic *chip = &devpriv->asics[asic]; in pcmuio_write()
158 unsigned long iobase = pcmuio_asic_iobase(dev, asic); in pcmuio_write()
177 int asic, int page, int port) in pcmuio_read() argument
180 struct pcmuio_asic *chip = &devpriv->asics[asic]; in pcmuio_read()
181 unsigned long iobase = pcmuio_asic_iobase(dev, asic); in pcmuio_read()
217 int asic = pcmuio_subdevice_to_asic(s); in pcmuio_dio_insn_bits() local
235 pcmuio_write(dev, val, asic, 0, port); in pcmuio_dio_insn_bits()
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/drivers/leds/
Dleds-asic3.c41 struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); in brightness_set() local
48 asic3_write_register(asic, (base + ASIC3_LED_PeriodTime), 32); in brightness_set()
49 asic3_write_register(asic, (base + ASIC3_LED_DutyTime), 32); in brightness_set()
50 asic3_write_register(asic, (base + ASIC3_LED_AutoStopCount), 0); in brightness_set()
51 asic3_write_register(asic, (base + ASIC3_LED_TimeBase), timebase); in brightness_set()
60 struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); in blink_set() local
80 asic3_write_register(asic, (base + ASIC3_LED_PeriodTime), (on + off)); in blink_set()
81 asic3_write_register(asic, (base + ASIC3_LED_DutyTime), on); in blink_set()
82 asic3_write_register(asic, (base + ASIC3_LED_AutoStopCount), 0); in blink_set()
83 asic3_write_register(asic, (base + ASIC3_LED_TimeBase), (LED_EN|0x4)); in blink_set()
/drivers/gpu/drm/radeon/
Dradeon.h2386 struct radeon_asic *asic; member
2705 #define radeon_init(rdev) (rdev)->asic->init((rdev))
2706 #define radeon_fini(rdev) (rdev)->asic->fini((rdev))
2707 #define radeon_resume(rdev) (rdev)->asic->resume((rdev))
2708 #define radeon_suspend(rdev) (rdev)->asic->suspend((rdev))
2709 #define radeon_cs_parse(rdev, r, p) (rdev)->asic->ring[(r)]->cs_parse((p))
2710 #define radeon_vga_set_state(rdev, state) (rdev)->asic->vga_set_state((rdev), (state))
2711 #define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev), false)
2712 #define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart.tlb_flush((rdev))
2713 #define radeon_gart_get_page_entry(a, f) (rdev)->asic->gart.get_page_entry((a), (f))
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Dradeon_asic.c167 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; in radeon_agp_disable()
168 rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry; in radeon_agp_disable()
169 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; in radeon_agp_disable()
173 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; in radeon_agp_disable()
174 rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry; in radeon_agp_disable()
175 rdev->asic->gart.set_page = &r100_pci_gart_set_page; in radeon_agp_disable()
2337 rdev->asic = &r100_asic; in radeon_asic_init()
2343 rdev->asic = &r200_asic; in radeon_asic_init()
2350 rdev->asic = &r300_asic_pcie; in radeon_asic_init()
2352 rdev->asic = &r300_asic; in radeon_asic_init()
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Dradeon_pm.c83 if (rdev->asic->dpm.enable_bapm) in radeon_pm_acpi_event_handler()
232 if (rdev->asic->pm.set_memory_clock && (mclk != rdev->pm.current_mclk)) { in radeon_set_power_state()
554 if (rdev->asic->dpm.force_performance_level) { in radeon_set_dpm_forced_performance_level()
576 if (rdev->asic->dpm.fan_ctrl_get_mode) in radeon_hwmon_get_pwm1_enable()
577 pwm_mode = rdev->asic->dpm.fan_ctrl_get_mode(rdev); in radeon_hwmon_get_pwm1_enable()
592 if(!rdev->asic->dpm.fan_ctrl_set_mode) in radeon_hwmon_set_pwm1_enable()
601 rdev->asic->dpm.fan_ctrl_set_mode(rdev, FDO_PWM_MODE_STATIC); in radeon_hwmon_set_pwm1_enable()
604 rdev->asic->dpm.fan_ctrl_set_mode(rdev, 0); in radeon_hwmon_set_pwm1_enable()
639 err = rdev->asic->dpm.set_fan_speed_percent(rdev, value); in radeon_hwmon_set_pwm1()
654 err = rdev->asic->dpm.get_fan_speed_percent(rdev, &speed); in radeon_hwmon_get_pwm1()
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Dni_dma.c161 if ((rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) || in cayman_dma_stop()
162 (rdev->asic->copy.copy_ring_index == CAYMAN_RING_TYPE_DMA1_INDEX)) in cayman_dma_stop()
257 if ((rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) || in cayman_dma_resume()
258 (rdev->asic->copy.copy_ring_index == CAYMAN_RING_TYPE_DMA1_INDEX)) in cayman_dma_resume()
Dradeon_ring.c174 if (hdp_flush && rdev->asic->ring[ring->idx]->hdp_flush) in radeon_ring_commit()
175 rdev->asic->ring[ring->idx]->hdp_flush(rdev, ring); in radeon_ring_commit()
184 if (hdp_flush && rdev->asic->mmio_hdp_flush) in radeon_ring_commit()
185 rdev->asic->mmio_hdp_flush(rdev); in radeon_ring_commit()
Dr600_dma.c103 if (rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) in r600_dma_stop()
180 if (rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) in r600_dma_resume()
451 int ring_index = rdev->asic->copy.dma_ring_index; in r600_copy_dma()
Dradeon_benchmark.c122 if (rdev->asic->copy.dma) { in radeon_benchmark_move()
133 if (rdev->asic->copy.blit) { in radeon_benchmark_move()
Dcik_sdma.c255 if ((rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) || in cik_sdma_gfx_stop()
256 (rdev->asic->copy.copy_ring_index == CAYMAN_RING_TYPE_DMA1_INDEX)) in cik_sdma_gfx_stop()
433 if ((rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) || in cik_sdma_gfx_resume()
434 (rdev->asic->copy.copy_ring_index == CAYMAN_RING_TYPE_DMA1_INDEX)) in cik_sdma_gfx_resume()
586 int ring_index = rdev->asic->copy.dma_ring_index; in cik_copy_dma()
Drv770_dma.c49 int ring_index = rdev->asic->copy.dma_ring_index; in rv770_copy_dma()
Devergreen_dma.c115 int ring_index = rdev->asic->copy.dma_ring_index; in evergreen_copy_dma()
Dradeon_test.c256 if (rdev->asic->copy.dma) in radeon_test_moves()
258 if (rdev->asic->copy.blit) in radeon_test_moves()
Dsi_dma.c238 int ring_index = rdev->asic->copy.dma_ring_index; in si_copy_dma()
Dradeon_gem.c490 if (rdev->asic->mmio_hdp_flush && in radeon_gem_wait_idle_ioctl()
492 robj->rdev->asic->mmio_hdp_flush(rdev); in radeon_gem_wait_idle_ioctl()
/drivers/parisc/
Dgsc.c188 void gsc_asic_assign_irq(struct gsc_asic *asic, int local_irq, int *irqp) in gsc_asic_assign_irq() argument
190 int irq = asic->global_irq[local_irq]; in gsc_asic_assign_irq()
193 irq = gsc_assign_irq(&gsc_asic_interrupt_type, asic); in gsc_asic_assign_irq()
197 asic->global_irq[local_irq] = irq; in gsc_asic_assign_irq()
Dgsc.h45 void gsc_asic_assign_irq(struct gsc_asic *asic, int local_irq, int *irqp);
/drivers/gpu/drm/amd/display/dmub/src/
Ddmub_srv.c132 static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic) in dmub_srv_hw_setup() argument
136 switch (asic) { in dmub_srv_hw_setup()
157 if (asic == DMUB_ASIC_DCN21) { in dmub_srv_hw_setup()
164 if (asic == DMUB_ASIC_DCN30) { in dmub_srv_hw_setup()
190 dmub->asic = params->asic; in dmub_srv_create()
195 if (!dmub_srv_hw_setup(dmub, params->asic)) { in dmub_srv_create()
/drivers/misc/habanalabs/common/
Dhw_queue.c851 struct asic_fixed_properties *asic = &hdev->asic_prop; in hl_hw_queues_create() local
855 hdev->kernel_queues = kcalloc(asic->max_queues, in hl_hw_queues_create()
865 i < asic->max_queues ; i++, q_ready_cnt++, q++) { in hl_hw_queues_create()
867 q->queue_type = asic->hw_queues_props[i].type; in hl_hw_queues_create()
869 asic->hw_queues_props[i].supports_sync_stream; in hl_hw_queues_create()
Dcommand_submission.c523 struct asic_fixed_properties *asic = &hdev->asic_prop; in validate_queue_index() local
529 if (chunk->queue_index >= asic->max_queues) { in validate_queue_index()
535 hw_queue_prop = &asic->hw_queues_props[chunk->queue_index]; in validate_queue_index()
/drivers/gpu/drm/amd/display/dmub/
Ddmub_srv.h299 enum dmub_asic asic; member
329 enum dmub_asic asic; member
/drivers/atm/
Deni.h115 int asic; /* PCI interface type, 0 for FPGA */ member
Deni.c1719 (eni_dev->asic ? PCI_COMMAND_PARITY | PCI_COMMAND_SERR : 0)))) { in eni_do_init()
1735 if (!eni_dev->asic) { in eni_do_init()
1767 if (!(eni_in(MID_RES_ID_MCON) & 0x200) != !eni_dev->asic) { in eni_do_init()
1774 error = eni_dev->asic ? get_esi_asic(dev) : get_esi_fpga(dev,base); in eni_do_init()
1822 (eni_dev->asic ? PCI_COMMAND_PARITY | PCI_COMMAND_SERR : 0)))) { in eni_start()
2249 eni_dev->asic = ent->driver_data; in eni_init_one()

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