Searched refs:mdp5_pipe (Results 1 – 12 of 12) sorted by relevance
| /drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5.xml.h | 67 enum mdp5_pipe { enum
535 static inline uint32_t __offset_PIPE(enum mdp5_pipe idx) in __offset_PIPE()
554 static inline uint32_t REG_MDP5_PIPE(enum mdp5_pipe i0) { return 0x00000000 + __offset_PIPE(i0); } in REG_MDP5_PIPE()
556 static inline uint32_t REG_MDP5_PIPE_OP_MODE(enum mdp5_pipe i0) { return 0x00000200 + __offset_PIPE… in REG_MDP5_PIPE_OP_MODE()
571 static inline uint32_t REG_MDP5_PIPE_HIST_CTL_BASE(enum mdp5_pipe i0) { return 0x000002c4 + __offse… in REG_MDP5_PIPE_HIST_CTL_BASE()
573 static inline uint32_t REG_MDP5_PIPE_HIST_LUT_BASE(enum mdp5_pipe i0) { return 0x000002f0 + __offse… in REG_MDP5_PIPE_HIST_LUT_BASE()
575 static inline uint32_t REG_MDP5_PIPE_HIST_LUT_SWAP(enum mdp5_pipe i0) { return 0x00000300 + __offse… in REG_MDP5_PIPE_HIST_LUT_SWAP()
577 static inline uint32_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_0(enum mdp5_pipe i0) { return 0x00000320 + … in REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_0()
591 static inline uint32_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_1(enum mdp5_pipe i0) { return 0x00000324 + … in REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_1()
605 static inline uint32_t REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_2(enum mdp5_pipe i0) { return 0x00000328 + … in REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_2()
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| D | mdp5_smp.c | 39 static inline u32 pipe2client(enum mdp5_pipe pipe, int plane) in pipe2client()
97 enum mdp5_pipe pipe, int nblks) in set_fifo_thresholds()
165 enum mdp5_pipe pipe, uint32_t blkcfg) in mdp5_smp_assign()
196 enum mdp5_pipe pipe) in mdp5_smp_release()
277 enum mdp5_pipe pipe = hwpipe->pipe; in write_smp_fifo_regs()
290 enum mdp5_pipe pipe; in mdp5_smp_prepare_commit()
316 enum mdp5_pipe pipe; in mdp5_smp_complete_commit()
351 enum mdp5_pipe pipe = hwpipe->pipe; in mdp5_smp_dump()
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| D | mdp5_ctl.h | 56 enum mdp5_pipe stage[][MAX_PIPE_STAGE],
57 enum mdp5_pipe r_stage[][MAX_PIPE_STAGE],
67 u32 mdp_ctl_flush_mask_pipe(enum mdp5_pipe pipe);
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| D | mdp5_pipe.h | 18 enum mdp5_pipe pipe;
42 struct mdp5_hw_pipe *mdp5_pipe_init(enum mdp5_pipe pipe,
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| D | mdp5_smp.h | 80 enum mdp5_pipe pipe, uint32_t blkcfg);
82 enum mdp5_pipe pipe);
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| D | mdp5_kms.h | 196 static inline const char *pipe2name(enum mdp5_pipe pipe) in pipe2name()
210 static inline int pipe2nclients(enum mdp5_pipe pipe) in pipe2nclients()
276 enum mdp5_pipe mdp5_plane_pipe(struct drm_plane *plane);
277 enum mdp5_pipe mdp5_plane_right_pipe(struct drm_plane *plane);
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| D | mdp5_ctl.c | 286 static u32 mdp_ctl_blend_mask(enum mdp5_pipe pipe, in mdp_ctl_blend_mask()
306 static u32 mdp_ctl_blend_ext_mask(enum mdp5_pipe pipe, in mdp_ctl_blend_ext_mask()
348 enum mdp5_pipe stage[][MAX_PIPE_STAGE], in mdp5_ctl_blend()
349 enum mdp5_pipe r_stage[][MAX_PIPE_STAGE], in mdp5_ctl_blend()
438 u32 mdp_ctl_flush_mask_pipe(enum mdp5_pipe pipe) in mdp_ctl_flush_mask_pipe()
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| D | mdp5_plane.c | 549 enum mdp5_pipe pipe, in set_scanout_locked()
573 static void csc_disable(struct mdp5_kms *mdp5_kms, enum mdp5_pipe pipe) in csc_disable()
582 static void csc_enable(struct mdp5_kms *mdp5_kms, enum mdp5_pipe pipe, in csc_enable()
758 static void mdp5_write_pixel_ext(struct mdp5_kms *mdp5_kms, enum mdp5_pipe pipe, in mdp5_write_pixel_ext()
843 enum mdp5_pipe pipe = hwpipe->pipe; in mdp5_hwpipe_mode_set()
934 enum mdp5_pipe pipe = hwpipe->pipe; in mdp5_plane_mode_set()
1043 enum mdp5_pipe mdp5_plane_pipe(struct drm_plane *plane) in mdp5_plane_pipe()
1053 enum mdp5_pipe mdp5_plane_right_pipe(struct drm_plane *plane) in mdp5_plane_right_pipe()
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| D | mdp5_kms.c | 698 const enum mdp5_pipe *pipes, const uint32_t *offsets, in construct_pipes()
723 static const enum mdp5_pipe rgb_planes[] = { in hwpipe_init()
726 static const enum mdp5_pipe vig_planes[] = { in hwpipe_init()
729 static const enum mdp5_pipe dma_planes[] = { in hwpipe_init()
732 static const enum mdp5_pipe cursor_planes[] = { in hwpipe_init()
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| D | mdp5_pipe.c | 159 struct mdp5_hw_pipe *mdp5_pipe_init(enum mdp5_pipe pipe, in mdp5_pipe_init()
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| D | mdp5_crtc.c | 226 enum mdp5_pipe stage[STAGE_MAX + 1][MAX_PIPE_STAGE] = { { SSPP_NONE } }; in blend_setup()
227 enum mdp5_pipe r_stage[STAGE_MAX + 1][MAX_PIPE_STAGE] = { { SSPP_NONE } }; in blend_setup()
243 enum mdp5_pipe right_pipe; in blend_setup()
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| /drivers/gpu/drm/msm/ |
| D | Makefile | 50 disp/mdp5/mdp5_pipe.o \
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