Searched refs:mmSDMA0_UTCL1_PAGE (Results 1 – 9 of 9) sorted by relevance
| /drivers/gpu/drm/amd/include/asic_reg/sdma0/ |
| D | sdma0_4_1_offset.h | 156 #define mmSDMA0_UTCL1_PAGE … macro
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| D | sdma0_4_0_offset.h | 158 #define mmSDMA0_UTCL1_PAGE 0x0048 macro
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| D | sdma0_4_2_2_offset.h | 158 #define mmSDMA0_UTCL1_PAGE … macro
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| D | sdma0_4_2_offset.h | 158 #define mmSDMA0_UTCL1_PAGE … macro
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | sdma_v5_0.c | 77 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_UTCL1_PAGE, 0x00ffffff, 0x000c5c00),
759 temp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE)); in sdma_v5_0_gfx_resume()
763 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE), temp); in sdma_v5_0_gfx_resume()
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| D | sdma_v4_0.c | 100 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003c0),
146 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003e0),
181 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003c0),
272 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003e0),
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| D | sdma_v5_2.c | 689 temp = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE)); in sdma_v5_2_gfx_resume()
695 WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE), temp); in sdma_v5_2_gfx_resume()
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| /drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_10_1_0_offset.h | 133 #define mmSDMA0_UTCL1_PAGE … macro
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| D | gc_10_3_0_offset.h | 130 #define mmSDMA0_UTCL1_PAGE … macro
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