Searched refs:omap3_noncore_dpll_set_rate (Results 1 – 3 of 3) sorted by relevance
/drivers/clk/ti/ |
D | dpll.c | 37 .set_rate = &omap3_noncore_dpll_set_rate, 62 .set_rate = &omap3_noncore_dpll_set_rate, 75 .set_rate = &omap3_noncore_dpll_set_rate, 116 .set_rate = &omap3_noncore_dpll_set_rate,
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D | dpll3xxx.c | 561 int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate, in omap3_noncore_dpll_set_rate() function 627 ret = omap3_noncore_dpll_set_rate(hw, rate, parent_rate); in omap3_noncore_dpll_set_rate_and_parent() 936 return omap3_noncore_dpll_set_rate(hw, rate, parent_rate); in omap3_dpll4_set_rate() 1027 return omap3_noncore_dpll_set_rate(hw, rate, parent_rate); in omap3_dpll5_set_rate()
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D | clock.h | 278 int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
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