| /drivers/clk/renesas/ |
| D | clk-r8a73a4.c | 65 const char *parent_name; in r8a73a4_cpg_register_clock() local
76 parent_name = of_clk_get_parent_name(np, 0); in r8a73a4_cpg_register_clock()
79 parent_name = of_clk_get_parent_name(np, 0); in r8a73a4_cpg_register_clock()
83 parent_name = of_clk_get_parent_name(np, 1); in r8a73a4_cpg_register_clock()
86 parent_name = of_clk_get_parent_name(np, 1); in r8a73a4_cpg_register_clock()
98 parent_name = "main"; in r8a73a4_cpg_register_clock()
105 parent_name = "main"; in r8a73a4_cpg_register_clock()
129 parent_name = "main"; in r8a73a4_cpg_register_clock()
133 parent_name = "extal2"; in r8a73a4_cpg_register_clock()
137 parent_name = "extal2"; in r8a73a4_cpg_register_clock()
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| D | clk-r8a7740.c | 67 const char *parent_name; in r8a7740_cpg_register_clock() local
76 parent_name = of_clk_get_parent_name(np, 0); in r8a7740_cpg_register_clock()
81 parent_name = of_clk_get_parent_name(np, 0); in r8a7740_cpg_register_clock()
86 parent_name = of_clk_get_parent_name(np, 2); in r8a7740_cpg_register_clock()
90 parent_name = of_clk_get_parent_name(np, 0); in r8a7740_cpg_register_clock()
100 parent_name = "system"; in r8a7740_cpg_register_clock()
104 parent_name = "system"; in r8a7740_cpg_register_clock()
109 parent_name = "system"; in r8a7740_cpg_register_clock()
115 parent_name = of_clk_get_parent_name(np, 1); in r8a7740_cpg_register_clock()
117 parent_name = "system"; in r8a7740_cpg_register_clock()
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| D | rcar-gen2-cpg.c | 137 const char *parent_name, in cpg_z_clk_register() argument
151 init.parent_names = &parent_name; in cpg_z_clk_register()
166 const char *parent_name, in cpg_rcan_clk_register() argument
191 clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL, in cpg_rcan_clk_register()
210 const char *parent_name, in cpg_adsp_clk_register() argument
237 clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL, in cpg_adsp_clk_register()
283 const char *parent_name; in rcar_gen2_cpg_clk_register() local
292 parent_name = __clk_get_name(parent); in rcar_gen2_cpg_clk_register()
326 return cpg_z_clk_register(core->name, parent_name, base); in rcar_gen2_cpg_clk_register()
333 return cpg_adsp_clk_register(core->name, parent_name, base); in rcar_gen2_cpg_clk_register()
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| D | clk-sh73a0.c | 80 const char *parent_name = NULL; in sh73a0_cpg_register_clock() local
88 parent_name = of_clk_get_parent_name(np, parent_idx >> 1); in sh73a0_cpg_register_clock()
94 parent_name = "main"; in sh73a0_cpg_register_clock()
123 parent_name = phy_no ? "dsi1pck" : "dsi0pck"; in sh73a0_cpg_register_clock()
130 parent_name = "pll0"; in sh73a0_cpg_register_clock()
140 parent_name = c->parent; in sh73a0_cpg_register_clock()
153 return clk_register_fixed_factor(NULL, name, parent_name, 0, in sh73a0_cpg_register_clock()
156 return clk_register_divider_table(NULL, name, parent_name, 0, in sh73a0_cpg_register_clock()
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| /drivers/clk/at91/ |
| D | dt-compat.c | 32 const char *parent_name; in of_sama5d2_clk_audio_pll_frac_setup() local
39 parent_name = of_clk_get_parent_name(np, 0); in of_sama5d2_clk_audio_pll_frac_setup()
41 hw = at91_clk_register_audio_pll_frac(regmap, name, parent_name); in of_sama5d2_clk_audio_pll_frac_setup()
55 const char *parent_name; in of_sama5d2_clk_audio_pll_pad_setup() local
62 parent_name = of_clk_get_parent_name(np, 0); in of_sama5d2_clk_audio_pll_pad_setup()
64 hw = at91_clk_register_audio_pll_pad(regmap, name, parent_name); in of_sama5d2_clk_audio_pll_pad_setup()
78 const char *parent_name; in of_sama5d2_clk_audio_pll_pmc_setup() local
85 parent_name = of_clk_get_parent_name(np, 0); in of_sama5d2_clk_audio_pll_pmc_setup()
87 hw = at91_clk_register_audio_pll_pmc(regmap, name, parent_name); in of_sama5d2_clk_audio_pll_pmc_setup()
179 const char *parent_name; in of_sama5d4_clk_h32mx_setup() local
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| D | pmc.h | 117 const char *parent_name);
121 const char *parent_name);
125 const char *parent_name);
136 const char *parent_name);
148 const char *parent_name, bool bypass);
152 const char *parent_name);
172 const char *parent_name, u32 id);
176 const char *name, const char *parent_name,
182 const char *parent_name, u8 id,
187 const char *parent_name);
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| D | clk-utmi.c | 126 const char *name, const char *parent_name, in at91_clk_register_utmi_internal() argument
140 init.parent_names = parent_name ? &parent_name : NULL; in at91_clk_register_utmi_internal()
141 init.num_parents = parent_name ? 1 : 0; in at91_clk_register_utmi_internal()
160 const char *name, const char *parent_name) in at91_clk_register_utmi() argument
163 parent_name, &utmi_ops, CLK_SET_RATE_GATE); in at91_clk_register_utmi()
243 const char *parent_name) in at91_clk_sama7g5_register_utmi() argument
246 parent_name, &sama7g5_utmi_ops, 0); in at91_clk_sama7g5_register_utmi()
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| /drivers/clk/ux500/ |
| D | clk.h | 18 const char *parent_name,
24 const char *parent_name,
30 const char *parent_name,
36 const char *parent_name,
41 const char *parent_name,
47 const char *parent_name,
52 const char *parent_name,
57 const char *parent_name,
64 const char *parent_name,
73 const char *parent_name,
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| D | clk-prcmu.c | 245 const char *parent_name, in clk_reg_prcmu() argument
275 clk_prcmu_init.parent_names = (parent_name ? &parent_name : NULL); in clk_reg_prcmu()
276 clk_prcmu_init.num_parents = (parent_name ? 1 : 0); in clk_reg_prcmu()
292 const char *parent_name, in clk_reg_prcmu_scalable() argument
297 return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags, in clk_reg_prcmu_scalable()
302 const char *parent_name, in clk_reg_prcmu_gate() argument
306 return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags, in clk_reg_prcmu_gate()
311 const char *parent_name, in clk_reg_prcmu_scalable_rate() argument
316 return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags, in clk_reg_prcmu_scalable_rate()
321 const char *parent_name, in clk_reg_prcmu_rate() argument
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| D | clk-prcc.c | 94 const char *parent_name, in clk_reg_prcc() argument
123 clk_prcc_init.parent_names = (parent_name ? &parent_name : NULL); in clk_reg_prcc()
124 clk_prcc_init.num_parents = (parent_name ? 1 : 0); in clk_reg_prcc()
142 const char *parent_name, in clk_reg_prcc_pclk() argument
147 return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags, in clk_reg_prcc_pclk()
152 const char *parent_name, in clk_reg_prcc_kclk() argument
157 return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags, in clk_reg_prcc_kclk()
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| D | clk-sysctrl.c | 179 const char *parent_name, in clk_reg_sysctrl_gate() argument
186 const char **parent_names = (parent_name ? &parent_name : NULL); in clk_reg_sysctrl_gate()
187 u8 num_parents = (parent_name ? 1 : 0); in clk_reg_sysctrl_gate()
196 const char *parent_name, in clk_reg_sysctrl_gate_fixed_rate() argument
204 const char **parent_names = (parent_name ? &parent_name : NULL); in clk_reg_sysctrl_gate_fixed_rate()
205 u8 num_parents = (parent_name ? 1 : 0); in clk_reg_sysctrl_gate_fixed_rate()
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| /drivers/clk/mxs/ |
| D | clk.h | 21 struct clk *mxs_clk_pll(const char *name, const char *parent_name,
24 struct clk *mxs_clk_ref(const char *name, const char *parent_name,
27 struct clk *mxs_clk_div(const char *name, const char *parent_name,
30 struct clk *mxs_clk_frac(const char *name, const char *parent_name,
39 const char *parent_name, void __iomem *reg, u8 shift) in mxs_clk_gate() argument
41 return clk_register_gate(NULL, name, parent_name, CLK_SET_RATE_PARENT, in mxs_clk_gate()
55 const char *parent_name, unsigned int mult, unsigned int div) in mxs_clk_fixed_factor() argument
57 return clk_register_fixed_factor(NULL, name, parent_name, in mxs_clk_fixed_factor()
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| /drivers/clk/ |
| D | clk-nomadik.c | 258 const char *parent_name, u32 id) in pll_clk_register() argument
275 init.parent_names = (parent_name ? &parent_name : NULL); in pll_clk_register()
276 init.num_parents = (parent_name ? 1 : 0); in pll_clk_register()
350 const char *parent_name, u8 id) in src_clk_register() argument
367 init.parent_names = (parent_name ? &parent_name : NULL); in src_clk_register()
368 init.num_parents = (parent_name ? 1 : 0); in src_clk_register()
503 const char *parent_name; in of_nomadik_pll_setup() local
514 parent_name = of_clk_get_parent_name(np, 0); in of_nomadik_pll_setup()
515 hw = pll_clk_register(NULL, clk_name, parent_name, pll_id); in of_nomadik_pll_setup()
526 const char *parent_name; in of_nomadik_hclk_setup() local
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| D | clk-moxart.c | 26 const char *parent_name; in moxart_of_pll_clk_init() local
29 parent_name = of_clk_get_parent_name(node, 0); in moxart_of_pll_clk_init()
46 hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, mul, 1); in moxart_of_pll_clk_init()
66 const char *parent_name; in moxart_of_apb_clk_init() local
69 parent_name = of_clk_get_parent_name(node, 0); in moxart_of_apb_clk_init()
90 hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, 1, div); in moxart_of_apb_clk_init()
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| D | clk-milbeaut.c | 71 const char *parent_name; member
82 const char *parent_name; member
458 const char *name, const char *parent_name, unsigned long flags, in m10v_clk_hw_register_divider() argument
475 init.parent_names = &parent_name; in m10v_clk_hw_register_divider()
515 factors->parent_name, in m10v_reg_div_pre()
529 const char *parent_name) in m10v_reg_fixed_pre() argument
532 const char *pn = factors->parent_name ? in m10v_reg_fixed_pre()
533 factors->parent_name : parent_name; in m10v_reg_fixed_pre()
567 const char *parent_name; in m10v_clk_probe() local
574 parent_name = of_clk_get_parent_name(np, 0); in m10v_clk_probe()
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| /drivers/clk/tegra/ |
| D | clk.h | 135 const char *parent_name, void __iomem *reg,
138 struct clk *tegra_clk_register_mc(const char *name, const char *parent_name,
404 struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,
409 struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,
414 struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
420 struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
426 struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
432 struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
439 const char *parent_name, void __iomem *clk_base,
445 const char *parent_name,
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| /drivers/clk/keystone/ |
| D | pll.c | 122 const char *parent_name, in clk_register_pll() argument
136 init.parent_names = (parent_name ? &parent_name : NULL); in clk_register_pll()
137 init.num_parents = (parent_name ? 1 : 0); in clk_register_pll()
161 const char *parent_name; in _of_pll_clk_init() local
171 parent_name = of_clk_get_parent_name(node, 0); in _of_pll_clk_init()
211 clk = clk_register_pll(NULL, node->name, parent_name, pll_data); in _of_pll_clk_init()
250 const char *parent_name; in of_pll_div_clk_init() local
263 parent_name = of_clk_get_parent_name(node, 0); in of_pll_div_clk_init()
264 if (!parent_name) { in of_pll_div_clk_init()
282 clk = clk_register_divider(NULL, clk_name, parent_name, 0, reg, shift, in of_pll_div_clk_init()
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| D | gate.c | 163 const char *parent_name, in clk_register_psc() argument
178 init.parent_names = (parent_name ? &parent_name : NULL); in clk_register_psc()
179 init.num_parents = (parent_name ? 1 : 0); in clk_register_psc()
200 const char *parent_name; in of_psc_clk_init() local
232 parent_name = of_clk_get_parent_name(node, 0); in of_psc_clk_init()
233 if (!parent_name) { in of_psc_clk_init()
238 clk = clk_register_psc(NULL, clk_name, parent_name, data, lock); in of_psc_clk_init()
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| /drivers/clk/mmp/ |
| D | clk.h | 38 const char *parent_name, unsigned long flags,
124 const char *parent_name, unsigned long flags,
130 const char *parent_name, void __iomem *base,
133 const char *parent_name, void __iomem *base, u32 enable_mask,
145 const char *parent_name; member
156 const char *parent_name; member
168 const char *parent_name; member
182 const char *parent_name; member
198 const char * const *parent_name; member
214 const char *parent_name; member
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| /drivers/clk/imx/ |
| D | clk.h | 67 #define imx_clk_cpu(name, parent_name, div, mux, pll, step) \ argument
68 to_clk(imx_clk_hw_cpu(name, parent_name, div, mux, pll, step))
70 #define clk_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \ argument
72 to_clk(clk_hw_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \
75 #define imx_clk_pllv3(type, name, parent_name, base, div_mask) \ argument
76 to_clk(imx_clk_hw_pllv3(type, name, parent_name, base, div_mask))
78 #define imx_clk_pfd(name, parent_name, reg, idx) \ argument
79 to_clk(imx_clk_hw_pfd(name, parent_name, reg, idx))
129 #define imx_clk_frac_pll(name, parent_name, base) \ argument
130 to_clk(imx_clk_hw_frac_pll(name, parent_name, base))
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| /drivers/clk/socfpga/ |
| D | clk-periph-s10.c | 88 const char *parent_name = clks->parent_name; in s10_register_periph() local
101 init.parent_names = parent_name ? &parent_name : NULL; in s10_register_periph()
122 const char *parent_name = clks->parent_name; in s10_register_cnt_periph() local
145 init.parent_names = parent_name ? &parent_name : NULL; in s10_register_cnt_periph()
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| /drivers/clk/samsung/ |
| D | clk.h | 62 const char *parent_name; member
71 .parent_name = pname, \
88 const char *parent_name; member
98 .parent_name = pname, \
160 const char *parent_name; member
173 .parent_name = pname, \
204 const char *parent_name; member
215 .parent_name = pname, \
250 const char *parent_name; member
263 .parent_name = _pname, \
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| /drivers/clk/hisilicon/ |
| D | clk.h | 29 const char *parent_name; member
37 const char *parent_name; member
73 const char *parent_name; member
86 const char *parent_name; member
98 const char *parent_name; member
111 const char *parent_name, unsigned long flags, void __iomem *reg,
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| /drivers/clk/ti/ |
| D | interface.c | 37 const char *parent_name, in _register_interface() argument
59 init.parent_names = &parent_name; in _register_interface()
73 const char *parent_name; in _of_ti_interface_clk_setup() local
85 parent_name = of_clk_get_parent_name(node, 0); in _of_ti_interface_clk_setup()
86 if (!parent_name) { in _of_ti_interface_clk_setup()
92 clk = _register_interface(node, name, parent_name, ®, in _of_ti_interface_clk_setup()
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| /drivers/clk/loongson1/ |
| D | clk.c | 13 const char *parent_name, in clk_hw_register_pll() argument
29 init.parent_names = parent_name ? &parent_name : NULL; in clk_hw_register_pll()
30 init.num_parents = parent_name ? 1 : 0; in clk_hw_register_pll()
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