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Searched refs:qi (Results 1 – 25 of 25) sorted by relevance

/drivers/net/wireless/ath/ath9k/
Dmac.c22 struct ath9k_tx_queue_info *qi) in ath9k_hw_set_txq_interrupts() argument
201 struct ath9k_tx_queue_info *qi; in ath9k_hw_set_txq_props() local
203 qi = &ah->txq[q]; in ath9k_hw_set_txq_props()
204 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { in ath9k_hw_set_txq_props()
212 qi->tqi_ver = qinfo->tqi_ver; in ath9k_hw_set_txq_props()
213 qi->tqi_subtype = qinfo->tqi_subtype; in ath9k_hw_set_txq_props()
214 qi->tqi_qflags = qinfo->tqi_qflags; in ath9k_hw_set_txq_props()
215 qi->tqi_priority = qinfo->tqi_priority; in ath9k_hw_set_txq_props()
217 qi->tqi_aifs = min(qinfo->tqi_aifs, 255U); in ath9k_hw_set_txq_props()
219 qi->tqi_aifs = INIT_AIFS; in ath9k_hw_set_txq_props()
[all …]
Dhtc_drv_beacon.c24 struct ath9k_tx_queue_info qi, qi_be; in ath9k_htc_beaconq_config() local
26 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info)); in ath9k_htc_beaconq_config()
29 ath9k_hw_get_txq_props(ah, priv->beacon.beaconq, &qi); in ath9k_htc_beaconq_config()
33 qi.tqi_aifs = 1; in ath9k_htc_beaconq_config()
34 qi.tqi_cwmin = 0; in ath9k_htc_beaconq_config()
35 qi.tqi_cwmax = 0; in ath9k_htc_beaconq_config()
41 qi.tqi_aifs = qi_be.tqi_aifs; in ath9k_htc_beaconq_config()
49 qi.tqi_cwmin = 2*qi_be.tqi_cwmin; in ath9k_htc_beaconq_config()
51 qi.tqi_cwmin = 4*qi_be.tqi_cwmin; in ath9k_htc_beaconq_config()
53 qi.tqi_cwmax = qi_be.tqi_cwmax; in ath9k_htc_beaconq_config()
[all …]
Dhtc_drv_txrx.c31 qi.tqi_subtype = subtype_txq_to_hwq[subtype]; \
32 qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT; \
33 qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT; \
34 qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT; \
35 qi.tqi_physCompBuf = 0; \
36 qi.tqi_qflags = TXQ_FLAG_TXEOLINT_ENABLE | \
193 struct ath9k_tx_queue_info qi; in ath_htc_txq_update() local
195 ath9k_hw_get_txq_props(ah, qnum, &qi); in ath_htc_txq_update()
197 qi.tqi_aifs = qinfo->tqi_aifs; in ath_htc_txq_update()
198 qi.tqi_cwmin = qinfo->tqi_cwmin / 2; /* XXX */ in ath_htc_txq_update()
[all …]
Dbeacon.c37 struct ath9k_tx_queue_info qi, qi_be; in ath9k_beaconq_config() local
40 ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi); in ath9k_beaconq_config()
45 qi.tqi_aifs = 1; in ath9k_beaconq_config()
46 qi.tqi_cwmin = 0; in ath9k_beaconq_config()
47 qi.tqi_cwmax = 0; in ath9k_beaconq_config()
52 qi.tqi_aifs = qi_be.tqi_aifs; in ath9k_beaconq_config()
54 qi.tqi_cwmin = 2*qi_be.tqi_cwmin; in ath9k_beaconq_config()
56 qi.tqi_cwmin = 4*qi_be.tqi_cwmin; in ath9k_beaconq_config()
57 qi.tqi_cwmax = qi_be.tqi_cwmax; in ath9k_beaconq_config()
60 if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) { in ath9k_beaconq_config()
Dxmit.c1701 struct ath9k_tx_queue_info qi; in ath_txq_setup() local
1710 memset(&qi, 0, sizeof(qi)); in ath_txq_setup()
1711 qi.tqi_subtype = subtype_txq_to_hwq[subtype]; in ath_txq_setup()
1712 qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT; in ath_txq_setup()
1713 qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT; in ath_txq_setup()
1714 qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT; in ath_txq_setup()
1715 qi.tqi_physCompBuf = 0; in ath_txq_setup()
1733 qi.tqi_qflags = TXQ_FLAG_TXINT_ENABLE; in ath_txq_setup()
1736 qi.tqi_qflags = TXQ_FLAG_TXDESCINT_ENABLE; in ath_txq_setup()
1738 qi.tqi_qflags = TXQ_FLAG_TXEOLINT_ENABLE | in ath_txq_setup()
[all …]
Dhtc_drv_main.c1377 struct ath9k_tx_queue_info qi; in ath9k_htc_conf_tx() local
1386 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info)); in ath9k_htc_conf_tx()
1388 qi.tqi_aifs = params->aifs; in ath9k_htc_conf_tx()
1389 qi.tqi_cwmin = params->cw_min; in ath9k_htc_conf_tx()
1390 qi.tqi_cwmax = params->cw_max; in ath9k_htc_conf_tx()
1391 qi.tqi_burstTime = params->txop * 32; in ath9k_htc_conf_tx()
1400 ret = ath_htc_txq_update(priv, qnum, &qi); in ath9k_htc_conf_tx()
Dmain.c1727 struct ath9k_tx_queue_info qi; in ath9k_conf_tx() local
1738 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info)); in ath9k_conf_tx()
1740 qi.tqi_aifs = params->aifs; in ath9k_conf_tx()
1741 qi.tqi_cwmin = params->cw_min; in ath9k_conf_tx()
1742 qi.tqi_cwmax = params->cw_max; in ath9k_conf_tx()
1743 qi.tqi_burstTime = params->txop * 32; in ath9k_conf_tx()
1750 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime); in ath9k_conf_tx()
1751 ret = ath_txq_update(sc, txq->axq_qnum, &qi); in ath9k_conf_tx()
/drivers/iommu/intel/
Ddmar.c1178 if (iommu->qi) { in free_iommu()
1179 free_page((unsigned long)iommu->qi->desc); in free_iommu()
1180 kfree(iommu->qi->desc_status); in free_iommu()
1181 kfree(iommu->qi); in free_iommu()
1194 static inline void reclaim_free_desc(struct q_inval *qi) in reclaim_free_desc() argument
1196 while (qi->desc_status[qi->free_tail] == QI_DONE || in reclaim_free_desc()
1197 qi->desc_status[qi->free_tail] == QI_ABORT) { in reclaim_free_desc()
1198 qi->desc_status[qi->free_tail] = QI_FREE; in reclaim_free_desc()
1199 qi->free_tail = (qi->free_tail + 1) % QI_LENGTH; in reclaim_free_desc()
1200 qi->free_cnt++; in reclaim_free_desc()
[all …]
Ddebugfs.c389 desc = iommu->qi->desc + offset; in invalidation_queue_entry_show()
394 iommu->qi->desc_status[index]); in invalidation_queue_entry_show()
398 iommu->qi->desc_status[index]); in invalidation_queue_entry_show()
407 struct q_inval *qi; in invalidation_queue_show() local
412 qi = iommu->qi; in invalidation_queue_show()
415 if (!qi || !ecap_qis(iommu->ecap)) in invalidation_queue_show()
420 raw_spin_lock_irqsave(&qi->q_lock, flags); in invalidation_queue_show()
422 (u64)virt_to_phys(qi->desc), in invalidation_queue_show()
426 raw_spin_unlock_irqrestore(&qi->q_lock, flags); in invalidation_queue_show()
Dirq_remapping.c595 if (!iommu->qi) { in intel_setup_irq_remapping()
1072 if (iommu->qi) in reenable_irq_remapping()
Diommu.c1497 if (!iommu->qi) in iommu_support_dev_iotlb()
3033 if (!iommu->qi) { in intel_iommu_init_qi()
4213 if (iommu->qi) in init_iommu_hw()
/drivers/gpu/drm/i915/display/
Dintel_bw.c73 struct intel_qgv_info *qi) in icl_get_qgv_points() argument
78 qi->num_points = dram_info->num_qgv_points; in icl_get_qgv_points()
81 qi->t_bl = dev_priv->dram_info.type == INTEL_DRAM_DDR4 ? 4 : 16; in icl_get_qgv_points()
83 qi->t_bl = dev_priv->dram_info.type == INTEL_DRAM_DDR4 ? 4 : 8; in icl_get_qgv_points()
86 qi->num_points > ARRAY_SIZE(qi->points))) in icl_get_qgv_points()
87 qi->num_points = ARRAY_SIZE(qi->points); in icl_get_qgv_points()
89 for (i = 0; i < qi->num_points; i++) { in icl_get_qgv_points()
90 struct intel_qgv_point *sp = &qi->points[i]; in icl_get_qgv_points()
111 static int icl_sagv_max_dclk(const struct intel_qgv_info *qi) in icl_sagv_max_dclk() argument
116 for (i = 0; i < qi->num_points; i++) in icl_sagv_max_dclk()
[all …]
/drivers/net/wireless/ath/ath5k/
Dqcu.c157 struct ath5k_txq_info *qi; in ath5k_hw_set_tx_queueprops() local
161 qi = &ah->ah_txq[queue]; in ath5k_hw_set_tx_queueprops()
163 if (qi->tqi_type == AR5K_TX_QUEUE_INACTIVE) in ath5k_hw_set_tx_queueprops()
167 qi->tqi_type = qinfo->tqi_type; in ath5k_hw_set_tx_queueprops()
168 qi->tqi_subtype = qinfo->tqi_subtype; in ath5k_hw_set_tx_queueprops()
169 qi->tqi_flags = qinfo->tqi_flags; in ath5k_hw_set_tx_queueprops()
175 qi->tqi_aifs = min(qinfo->tqi_aifs, (u8)0xFC); in ath5k_hw_set_tx_queueprops()
176 qi->tqi_cw_min = ath5k_cw_validate(qinfo->tqi_cw_min); in ath5k_hw_set_tx_queueprops()
177 qi->tqi_cw_max = ath5k_cw_validate(qinfo->tqi_cw_max); in ath5k_hw_set_tx_queueprops()
178 qi->tqi_cbr_period = qinfo->tqi_cbr_period; in ath5k_hw_set_tx_queueprops()
[all …]
Dmac80211-ops.c578 struct ath5k_txq_info qi; in ath5k_conf_tx() local
586 ath5k_hw_get_tx_queueprops(ah, queue, &qi); in ath5k_conf_tx()
588 qi.tqi_aifs = params->aifs; in ath5k_conf_tx()
589 qi.tqi_cw_min = params->cw_min; in ath5k_conf_tx()
590 qi.tqi_cw_max = params->cw_max; in ath5k_conf_tx()
591 qi.tqi_burst_time = params->txop * 32; in ath5k_conf_tx()
599 if (ath5k_hw_set_tx_queueprops(ah, queue, &qi)) { in ath5k_conf_tx()
Dbase.c978 struct ath5k_txq_info qi = { in ath5k_txq_setup() local
1000 qi.tqi_flags = AR5K_TXQ_FLAG_TXEOLINT_ENABLE | in ath5k_txq_setup()
1002 qnum = ath5k_hw_setup_tx_queue(ah, qtype, &qi); in ath5k_txq_setup()
1028 struct ath5k_txq_info qi = { in ath5k_beaconq_setup() local
1038 return ath5k_hw_setup_tx_queue(ah, AR5K_TX_QUEUE_BEACON, &qi); in ath5k_beaconq_setup()
1044 struct ath5k_txq_info qi; in ath5k_beaconq_config() local
1047 ret = ath5k_hw_get_tx_queueprops(ah, ah->bhalq, &qi); in ath5k_beaconq_config()
1057 qi.tqi_aifs = 0; in ath5k_beaconq_config()
1058 qi.tqi_cw_min = 0; in ath5k_beaconq_config()
1059 qi.tqi_cw_max = 0; in ath5k_beaconq_config()
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/drivers/staging/ks7010/
DTODO9 [1] http://projects.qi-hardware.com/index.php/p/openwrt-packages/source/tree/master/ks7010/src
10 [2] http://downloads.qi-hardware.com/software/ks7010_sdio_v007.tar.bz2
11 [3] http://en.qi-hardware.com/wiki/Ben_NanoNote_Wi-Fi
/drivers/net/ethernet/intel/ice/
Dice_controlq.c313 #define ICE_FREE_CQ_BUFS(hw, qi, ring) \ argument
316 if ((qi)->ring.r.ring##_bi) { \
319 for (i = 0; i < (qi)->num_##ring##_entries; i++) \
320 if ((qi)->ring.r.ring##_bi[i].pa) { \
322 (qi)->ring.r.ring##_bi[i].size, \
323 (qi)->ring.r.ring##_bi[i].va, \
324 (qi)->ring.r.ring##_bi[i].pa); \
325 (qi)->ring.r.ring##_bi[i].va = NULL;\
326 (qi)->ring.r.ring##_bi[i].pa = 0;\
327 (qi)->ring.r.ring##_bi[i].size = 0;\
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/drivers/regulator/
Dmt6323-regulator.c31 u32 qi; member
57 .qi = BIT(13), \
80 .qi = BIT(15), \
100 .qi = BIT(15), \
169 return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; in mt6323_get_status()
Dmt6397-regulator.c29 u32 qi; member
58 .qi = BIT(13), \
84 .qi = BIT(15), \
101 .qi = BIT(15), \
229 return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; in mt6397_get_status()
Dmt6358-regulator.c28 u32 qi; member
61 .qi = BIT(0), \
89 .qi = BIT(15), \
118 .qi = BIT(0), \
137 .qi = BIT(15), \
325 return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; in mt6358_get_status()
/drivers/net/ethernet/pensando/ionic/
Dionic_txrx.c423 unsigned int qi; in ionic_dim_update() local
430 qi = qcq->cq.bound_q->index; in ionic_dim_update()
434 pkts = lif->txqstats[qi].pkts; in ionic_dim_update()
435 bytes = lif->txqstats[qi].bytes; in ionic_dim_update()
438 pkts = lif->rxqstats[qi].pkts; in ionic_dim_update()
439 bytes = lif->rxqstats[qi].bytes; in ionic_dim_update()
442 pkts = lif->txqstats[qi].pkts + lif->rxqstats[qi].pkts; in ionic_dim_update()
443 bytes = lif->txqstats[qi].bytes + lif->rxqstats[qi].bytes; in ionic_dim_update()
526 unsigned int qi = rxcq->bound_q->index; in ionic_txrx_napi() local
536 txcq = &lif->txqcqs[qi]->cq; in ionic_txrx_napi()
/drivers/crypto/caam/
Dintern.h76 struct caam_queue_if __iomem *qi; /* QI control region */ member
Dctrl.c798 ctrlpriv->qi = (struct caam_queue_if __iomem __force *) in caam_probe()
803 wr_reg32(&ctrlpriv->qi->qi_control_lo, QICTL_DQEN); in caam_probe()
Dregs.h303 u32 qi; /* QI_VERSION */ member
/drivers/net/wireless/ath/carl9170/
Ddebug.c373 #define DEBUGFS_QUEUE_DUMP(q, qi) \ argument
374 static char *carl9170_debugfs_##q ##_##qi ##_read(struct ar9170 *ar, \
377 carl9170_debugfs_queue_dump(ar, buf, len, bufsize, &ar->q[qi]); \
380 DEBUGFS_DECLARE_RO_FILE(q##_##qi, 8000);