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Searched refs:timings (Results 1 – 25 of 168) sorted by relevance

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/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi_wp.c145 struct omap_video_timings *timings) in hdmi_wp_video_config_interface() argument
151 vsync_pol = timings->vsync_level == OMAPDSS_SIG_ACTIVE_HIGH; in hdmi_wp_video_config_interface()
152 hsync_pol = timings->hsync_level == OMAPDSS_SIG_ACTIVE_HIGH; in hdmi_wp_video_config_interface()
157 r = FLD_MOD(r, timings->interlace, 3, 3); in hdmi_wp_video_config_interface()
163 struct omap_video_timings *timings) in hdmi_wp_video_config_timing() argument
170 timing_h |= FLD_VAL(timings->hbp, 31, 20); in hdmi_wp_video_config_timing()
171 timing_h |= FLD_VAL(timings->hfp, 19, 8); in hdmi_wp_video_config_timing()
172 timing_h |= FLD_VAL(timings->hsw, 7, 0); in hdmi_wp_video_config_timing()
175 timing_v |= FLD_VAL(timings->vbp, 31, 20); in hdmi_wp_video_config_timing()
176 timing_v |= FLD_VAL(timings->vfp, 19, 8); in hdmi_wp_video_config_timing()
[all …]
Dhdmi5_core.c286 video_cfg->v_fc_config.timings.hsync_level = cfg->timings.hsync_level; in hdmi_core_init()
287 video_cfg->v_fc_config.timings.x_res = cfg->timings.x_res; in hdmi_core_init()
288 video_cfg->v_fc_config.timings.hsw = cfg->timings.hsw - 1; in hdmi_core_init()
289 video_cfg->v_fc_config.timings.hbp = cfg->timings.hbp; in hdmi_core_init()
290 video_cfg->v_fc_config.timings.hfp = cfg->timings.hfp; in hdmi_core_init()
291 video_cfg->hblank = cfg->timings.hfp + in hdmi_core_init()
292 cfg->timings.hbp + cfg->timings.hsw - 1; in hdmi_core_init()
293 video_cfg->v_fc_config.timings.vsync_level = cfg->timings.vsync_level; in hdmi_core_init()
294 video_cfg->v_fc_config.timings.y_res = cfg->timings.y_res; in hdmi_core_init()
295 video_cfg->v_fc_config.timings.vsw = cfg->timings.vsw; in hdmi_core_init()
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/drivers/video/fbdev/core/
Dfbmon.c1148 static void fb_timings_vfreq(struct __fb_timings *timings) in fb_timings_vfreq() argument
1150 timings->hfreq = fb_get_hfreq(timings->vfreq, timings->vactive); in fb_timings_vfreq()
1151 timings->vblank = fb_get_vblank(timings->hfreq); in fb_timings_vfreq()
1152 timings->vtotal = timings->vactive + timings->vblank; in fb_timings_vfreq()
1153 timings->hblank = fb_get_hblank_by_hfreq(timings->hfreq, in fb_timings_vfreq()
1154 timings->hactive); in fb_timings_vfreq()
1155 timings->htotal = timings->hactive + timings->hblank; in fb_timings_vfreq()
1156 timings->dclk = timings->htotal * timings->hfreq; in fb_timings_vfreq()
1159 static void fb_timings_hfreq(struct __fb_timings *timings) in fb_timings_hfreq() argument
1161 timings->vblank = fb_get_vblank(timings->hfreq); in fb_timings_hfreq()
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/drivers/mtd/nand/raw/
Dnand_timings.c26 .timings.mode = 0,
27 .timings.sdr = {
71 .timings.mode = 1,
72 .timings.sdr = {
116 .timings.mode = 2,
117 .timings.sdr = {
161 .timings.mode = 3,
162 .timings.sdr = {
206 .timings.mode = 4,
207 .timings.sdr = {
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/drivers/media/i2c/adv748x/
Dadv748x-hdmi.c48 struct v4l2_dv_timings timings; member
96 fmt->field = hdmi->timings.bt.interlaced ? in adv748x_hdmi_fill_format()
102 fmt->width = hdmi->timings.bt.width; in adv748x_hdmi_fill_format()
103 fmt->height = hdmi->timings.bt.height; in adv748x_hdmi_fill_format()
109 static void adv748x_fill_optional_dv_timings(struct v4l2_dv_timings *timings) in adv748x_fill_optional_dv_timings() argument
111 v4l2_find_dv_timings_cap(timings, &adv748x_hdmi_timings_cap, in adv748x_fill_optional_dv_timings()
172 const struct v4l2_dv_timings *timings) in adv748x_hdmi_set_video_timings() argument
179 if (!v4l2_match_dv_timings(timings, &stds[i].timings, 250000, in adv748x_hdmi_set_video_timings()
218 struct v4l2_dv_timings *timings) in adv748x_hdmi_s_dv_timings() argument
224 if (!timings) in adv748x_hdmi_s_dv_timings()
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/drivers/memory/tegra/
Dtegra210-emc-table.c16 struct tegra210_emc_timing *timings; in tegra210_emc_table_device_init() local
19 timings = memremap(rmem->base, rmem->size, MEMREMAP_WB); in tegra210_emc_table_device_init()
20 if (!timings) { in tegra210_emc_table_device_init()
28 if (timings[i].revision == 0) in tegra210_emc_table_device_init()
44 memunmap(timings); in tegra210_emc_table_device_init()
48 emc->derated = timings; in tegra210_emc_table_device_init()
51 emc->nominal = timings; in tegra210_emc_table_device_init()
56 rmem->priv = timings; in tegra210_emc_table_device_init()
64 struct tegra210_emc_timing *timings = rmem->priv; in tegra210_emc_table_device_release() local
67 if ((emc->nominal && timings != emc->nominal) && in tegra210_emc_table_device_release()
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/drivers/memory/
Dpl353-smc.c118 void pl353_smc_set_cycles(u32 timings[]) in pl353_smc_set_cycles() argument
125 timings[0] &= PL353_SMC_SET_CYCLES_T0_MASK; in pl353_smc_set_cycles()
126 timings[1] = (timings[1] & PL353_SMC_SET_CYCLES_T1_MASK) << in pl353_smc_set_cycles()
128 timings[2] = (timings[2] & PL353_SMC_SET_CYCLES_T2_MASK) << in pl353_smc_set_cycles()
130 timings[3] = (timings[3] & PL353_SMC_SET_CYCLES_T3_MASK) << in pl353_smc_set_cycles()
132 timings[4] = (timings[4] & PL353_SMC_SET_CYCLES_T4_MASK) << in pl353_smc_set_cycles()
134 timings[5] = (timings[5] & PL353_SMC_SET_CYCLES_T5_MASK) << in pl353_smc_set_cycles()
136 timings[6] = (timings[6] & PL353_SMC_SET_CYCLES_T6_MASK) << in pl353_smc_set_cycles()
138 timings[0] |= timings[1] | timings[2] | timings[3] | in pl353_smc_set_cycles()
139 timings[4] | timings[5] | timings[6]; in pl353_smc_set_cycles()
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Demif.c339 const struct lpddr2_timings *timings = NULL; in get_timings_table() local
340 const struct lpddr2_timings *timings_arr = emif->plat_data->timings; in get_timings_table()
356 timings = &timings_arr[i]; in get_timings_table()
360 if (!timings) in get_timings_table()
367 return timings; in get_timings_table()
389 static u32 get_sdram_tim_1_shdw(const struct lpddr2_timings *timings, in get_sdram_tim_1_shdw() argument
395 val = max(min_tck->tWTR, DIV_ROUND_UP(timings->tWTR, t_ck)) - 1; in get_sdram_tim_1_shdw()
399 val = DIV_ROUND_UP(timings->tFAW, t_ck*4); in get_sdram_tim_1_shdw()
401 val = max(min_tck->tRRD, DIV_ROUND_UP(timings->tRRD, t_ck)); in get_sdram_tim_1_shdw()
404 val = DIV_ROUND_UP(timings->tRAS_min + timings->tRPab, t_ck) - 1; in get_sdram_tim_1_shdw()
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Dof_memory.c109 struct lpddr2_timings *timings = NULL; in of_get_ddr_timings() local
128 timings = devm_kcalloc(dev, arr_sz, sizeof(*timings), in of_get_ddr_timings()
131 if (!timings) in of_get_ddr_timings()
136 if (of_do_get_timings(np_tim, &timings[i])) { in of_get_ddr_timings()
138 devm_kfree(dev, timings); in of_get_ddr_timings()
147 return timings; in of_get_ddr_timings()
258 struct lpddr3_timings *timings = NULL; in of_lpddr3_get_ddr_timings() local
276 timings = devm_kcalloc(dev, arr_sz, sizeof(*timings), in of_lpddr3_get_ddr_timings()
279 if (!timings) in of_lpddr3_get_ddr_timings()
284 if (of_lpddr3_do_get_timings(np_tim, &timings[i])) { in of_lpddr3_get_ddr_timings()
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/drivers/video/fbdev/omap2/omapfb/displays/
Dencoder-tfp410.c24 struct omap_video_timings timings; member
81 in->ops.dpi->set_timings(in, &ddata->timings); in tfp410_enable()
113 static void tfp410_fix_timings(struct omap_video_timings *timings) in tfp410_fix_timings() argument
115 timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; in tfp410_fix_timings()
116 timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; in tfp410_fix_timings()
117 timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH; in tfp410_fix_timings()
121 struct omap_video_timings *timings) in tfp410_set_timings() argument
126 tfp410_fix_timings(timings); in tfp410_set_timings()
128 ddata->timings = *timings; in tfp410_set_timings()
129 dssdev->panel.timings = *timings; in tfp410_set_timings()
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Dconnector-analog-tv.c23 struct omap_video_timings timings; member
91 in->ops.atv->set_timings(in, &ddata->timings); in tvc_enable()
125 struct omap_video_timings *timings) in tvc_set_timings() argument
130 ddata->timings = *timings; in tvc_set_timings()
131 dssdev->panel.timings = *timings; in tvc_set_timings()
133 in->ops.atv->set_timings(in, timings); in tvc_set_timings()
137 struct omap_video_timings *timings) in tvc_get_timings() argument
141 *timings = ddata->timings; in tvc_get_timings()
145 struct omap_video_timings *timings) in tvc_check_timings() argument
150 return in->ops.atv->check_timings(in, timings); in tvc_check_timings()
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Dconnector-dvi.c43 struct omap_video_timings timings; member
89 in->ops.dvi->set_timings(in, &ddata->timings); in dvic_enable()
114 struct omap_video_timings *timings) in dvic_set_timings() argument
119 ddata->timings = *timings; in dvic_set_timings()
120 dssdev->panel.timings = *timings; in dvic_set_timings()
122 in->ops.dvi->set_timings(in, timings); in dvic_set_timings()
126 struct omap_video_timings *timings) in dvic_get_timings() argument
130 *timings = ddata->timings; in dvic_get_timings()
134 struct omap_video_timings *timings) in dvic_check_timings() argument
139 return in->ops.dvi->check_timings(in, timings); in dvic_check_timings()
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Dconnector-hdmi.c42 struct omap_video_timings timings; member
94 in->ops.hdmi->set_timings(in, &ddata->timings); in hdmic_enable()
121 struct omap_video_timings *timings) in hdmic_set_timings() argument
126 ddata->timings = *timings; in hdmic_set_timings()
127 dssdev->panel.timings = *timings; in hdmic_set_timings()
129 in->ops.hdmi->set_timings(in, timings); in hdmic_set_timings()
133 struct omap_video_timings *timings) in hdmic_get_timings() argument
137 *timings = ddata->timings; in hdmic_get_timings()
141 struct omap_video_timings *timings) in hdmic_check_timings() argument
146 return in->ops.hdmi->check_timings(in, timings); in hdmic_check_timings()
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Dencoder-opa362.c28 struct omap_video_timings timings; member
91 in->ops.atv->set_timings(in, &ddata->timings); in opa362_enable()
124 struct omap_video_timings *timings) in opa362_set_timings() argument
131 ddata->timings = *timings; in opa362_set_timings()
132 dssdev->panel.timings = *timings; in opa362_set_timings()
134 in->ops.atv->set_timings(in, timings); in opa362_set_timings()
138 struct omap_video_timings *timings) in opa362_get_timings() argument
144 *timings = ddata->timings; in opa362_get_timings()
148 struct omap_video_timings *timings) in opa362_check_timings() argument
155 return in->ops.atv->check_timings(in, timings); in opa362_check_timings()
/drivers/media/rc/
Drc-ir-raw.c319 const struct ir_raw_timings_manchester *timings, in ir_raw_gen_manchester() argument
328 if (timings->leader_pulse) { in ir_raw_gen_manchester()
331 init_ir_raw_event_duration((*ev), 1, timings->leader_pulse); in ir_raw_gen_manchester()
332 if (timings->leader_space) { in ir_raw_gen_manchester()
336 timings->leader_space); in ir_raw_gen_manchester()
346 if (timings->invert) in ir_raw_gen_manchester()
349 (*ev)->duration += timings->clock; in ir_raw_gen_manchester()
354 timings->clock); in ir_raw_gen_manchester()
360 timings->clock); in ir_raw_gen_manchester()
364 if (timings->trailer_space) { in ir_raw_gen_manchester()
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/drivers/ide/
Dcs5536.c137 unsigned long timings = (unsigned long)ide_get_drivedata(drive); in cs5536_set_pio_mode() local
145 timings &= (IDE_DRV_MASK << 8); in cs5536_set_pio_mode()
146 timings |= drv_timings[pio]; in cs5536_set_pio_mode()
147 ide_set_drivedata(drive, (void *)timings); in cs5536_set_pio_mode()
180 unsigned long timings = (unsigned long)ide_get_drivedata(drive); in cs5536_set_dma_mode() local
191 timings &= IDE_DRV_MASK; in cs5536_set_dma_mode()
192 timings |= mwdma_timings[mode - XFER_MW_DMA_0] << 8; in cs5536_set_dma_mode()
193 ide_set_drivedata(drive, (void *)timings); in cs5536_set_dma_mode()
201 unsigned long timings = (unsigned long)ide_get_drivedata(drive); in cs5536_dma_start() local
204 (timings >> 8) != (timings & IDE_DRV_MASK)) in cs5536_dma_start()
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Dcs5530.c39 #define CS5530_BAD_PIO(timings) (((timings)&~0x80000000)==0x0000e132) argument
106 unsigned int reg, timings = 0; in cs5530_set_dma_mode() local
109 case XFER_UDMA_0: timings = 0x00921250; break; in cs5530_set_dma_mode()
110 case XFER_UDMA_1: timings = 0x00911140; break; in cs5530_set_dma_mode()
111 case XFER_UDMA_2: timings = 0x00911030; break; in cs5530_set_dma_mode()
112 case XFER_MW_DMA_0: timings = 0x00077771; break; in cs5530_set_dma_mode()
113 case XFER_MW_DMA_1: timings = 0x00012121; break; in cs5530_set_dma_mode()
114 case XFER_MW_DMA_2: timings = 0x00002020; break; in cs5530_set_dma_mode()
118 timings |= reg & 0x80000000; /* preserve PIO format bit */ in cs5530_set_dma_mode()
120 outl(timings, basereg + 4); /* write drive0 config register */ in cs5530_set_dma_mode()
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Dpmac.c59 u32 timings[4]; member
416 writel(pmif->timings[1], PMAC_IDE_REG(IDE_TIMING_CONFIG)); in pmac_ide_apply_timings()
418 writel(pmif->timings[0], PMAC_IDE_REG(IDE_TIMING_CONFIG)); in pmac_ide_apply_timings()
433 writel(pmif->timings[1], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG)); in pmac_ide_kauai_apply_timings()
434 writel(pmif->timings[3], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG)); in pmac_ide_kauai_apply_timings()
436 writel(pmif->timings[0], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG)); in pmac_ide_kauai_apply_timings()
437 writel(pmif->timings[2], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG)); in pmac_ide_kauai_apply_timings()
497 u32 *timings, t; in pmac_ide_set_pio_mode() local
503 timings = &pmif->timings[drive->dn & 1]; in pmac_ide_set_pio_mode()
504 t = *timings; in pmac_ide_set_pio_mode()
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/drivers/media/spi/
Dgs1662.c229 static int gs_status_format(u16 status, struct v4l2_dv_timings *timings) in gs_status_format() argument
236 *timings = reg_fmt[i].format; in gs_status_format()
244 static u16 get_register_timings(struct v4l2_dv_timings *timings) in get_register_timings() argument
249 if (v4l2_match_dv_timings(timings, &reg_fmt[i].format, 0, in get_register_timings()
263 struct v4l2_dv_timings *timings) in gs_s_dv_timings() argument
268 reg_value = get_register_timings(timings); in gs_s_dv_timings()
272 gs->current_timings = *timings; in gs_s_dv_timings()
277 struct v4l2_dv_timings *timings) in gs_g_dv_timings() argument
281 *timings = gs->current_timings; in gs_g_dv_timings()
286 struct v4l2_dv_timings *timings) in gs_query_dv_timings() argument
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/drivers/media/i2c/
Dtvp7002.c319 struct v4l2_dv_timings timings; member
559 const struct v4l2_bt_timings *t = &tvp7002_timings[i].timings.bt; in tvp7002_s_dv_timings()
574 *dv_timings = device->current_timings->timings; in tvp7002_g_dv_timings()
610 const struct tvp7002_timings_definition *timings = tvp7002_timings; in tvp7002_query_dv() local
642 for (*index = 0; *index < NUM_TIMINGS; (*index)++, timings++) in tvp7002_query_dv()
643 if (lpfr == timings->lines_per_frame && in tvp7002_query_dv()
644 progressive == timings->progressive) { in tvp7002_query_dv()
645 if (timings->cpl_min == 0xffff) in tvp7002_query_dv()
647 if (cpln >= timings->cpl_min && cpln <= timings->cpl_max) in tvp7002_query_dv()
663 struct v4l2_dv_timings *timings) in tvp7002_query_dv_timings() argument
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/drivers/memory/samsung/
Dexynos5422-dmc.c169 const struct lpddr3_timings *timings; member
1055 val = dmc->timings->tRFC / clk_period_ps; in create_timings_aligned()
1056 val += dmc->timings->tRFC % clk_period_ps ? 1 : 0; in create_timings_aligned()
1061 val = dmc->timings->tRRD / clk_period_ps; in create_timings_aligned()
1062 val += dmc->timings->tRRD % clk_period_ps ? 1 : 0; in create_timings_aligned()
1067 val = dmc->timings->tRPab / clk_period_ps; in create_timings_aligned()
1068 val += dmc->timings->tRPab % clk_period_ps ? 1 : 0; in create_timings_aligned()
1073 val = dmc->timings->tRCD / clk_period_ps; in create_timings_aligned()
1074 val += dmc->timings->tRCD % clk_period_ps ? 1 : 0; in create_timings_aligned()
1079 val = dmc->timings->tRC / clk_period_ps; in create_timings_aligned()
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/drivers/clk/tegra/
Dclk-tegra124-emc.c81 struct emc_timing *timings; member
122 if (tegra->timings[k].ram_code == ram_code) in emc_determine_rate()
127 if (tegra->timings[t].ram_code != ram_code) in emc_determine_rate()
132 timing = tegra->timings + i; in emc_determine_rate()
139 req->rate = tegra->timings[i - 1].rate; in emc_determine_rate()
288 timing = tegra->timings + i; in get_backup_timing()
294 tegra->timings[timing_index].parent_index]) in get_backup_timing()
299 timing = tegra->timings + i; in get_backup_timing()
305 tegra->timings[timing_index].parent_index]) in get_backup_timing()
334 if (tegra->timings[i].rate == rate && in emc_set_rate()
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/drivers/media/rc/img-ir/
Dimg-ir-hw.c84 static void img_ir_timings_preprocess(struct img_ir_timings *timings, in img_ir_timings_preprocess() argument
87 img_ir_symbol_timing_preprocess(&timings->ldr, unit); in img_ir_timings_preprocess()
88 img_ir_symbol_timing_preprocess(&timings->s00, unit); in img_ir_timings_preprocess()
89 img_ir_symbol_timing_preprocess(&timings->s01, unit); in img_ir_timings_preprocess()
90 img_ir_symbol_timing_preprocess(&timings->s10, unit); in img_ir_timings_preprocess()
91 img_ir_symbol_timing_preprocess(&timings->s11, unit); in img_ir_timings_preprocess()
95 timings->ft.ft_min = (timings->ft.ft_min*unit + 999)/1000; in img_ir_timings_preprocess()
116 static void img_ir_timings_defaults(struct img_ir_timings *timings, in img_ir_timings_defaults() argument
119 img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr); in img_ir_timings_defaults()
120 img_ir_symbol_timing_defaults(&timings->s00, &defaults->s00); in img_ir_timings_defaults()
[all …]
/drivers/ata/
Dpata_it8213.c89 u8 timings[][2] = { { 0, 0 }, in it8213_set_piomode() local
109 master_data |= (timings[pio][0] << 12) | in it8213_set_piomode()
110 (timings[pio][1] << 8); in it8213_set_piomode()
120 slave_data |= (timings[pio][0] << 2) | timings[pio][1]; in it8213_set_piomode()
149 u8 timings[][2] = { { 0, 0 }, in it8213_set_dmamode() local
215 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); in it8213_set_dmamode()
222 (timings[pio][0] << 12) | in it8213_set_dmamode()
223 (timings[pio][1] << 8); in it8213_set_dmamode()
Dpata_efar.c100 u8 timings[][2] = { { 0, 0 }, in efar_set_piomode() local
122 master_data |= (timings[pio][0] << 12) | in efar_set_piomode()
123 (timings[pio][1] << 8); in efar_set_piomode()
134 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift; in efar_set_piomode()
169 u8 timings[][2] = { { 0, 0 }, in efar_set_dmamode() local
220 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); in efar_set_dmamode()
227 (timings[pio][0] << 12) | in efar_set_dmamode()
228 (timings[pio][1] << 8); in efar_set_dmamode()

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