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Searched refs:ucNumEntries (Results 1 – 18 of 18) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dprocess_pptables_v1_0.c165 PP_ASSERT_WITH_CODE((0 != vddc_lookup_pp_tables->ucNumEntries), in get_vddc_lookup_table()
176 table->count = vddc_lookup_pp_tables->ucNumEntries; in get_vddc_lookup_table()
178 for (i = 0; i < vddc_lookup_pp_tables->ucNumEntries; i++) { in get_vddc_lookup_table()
355 PP_ASSERT_WITH_CODE((0 != limitable->ucNumEntries), "Invalid PowerPlay Table!", return -1); in get_hard_limits()
378 PP_ASSERT_WITH_CODE((0 != mclk_dep_table->ucNumEntries), in get_mclk_voltage_dependency_table()
382 * mclk_dep_table->ucNumEntries; in get_mclk_voltage_dependency_table()
389 mclk_table->count = (uint32_t)mclk_dep_table->ucNumEntries; in get_mclk_voltage_dependency_table()
391 for (i = 0; i < mclk_dep_table->ucNumEntries; i++) { in get_mclk_voltage_dependency_table()
425 PP_ASSERT_WITH_CODE((0 != tonga_table->ucNumEntries), in get_sclk_voltage_dependency_table()
429 * tonga_table->ucNumEntries; in get_sclk_voltage_dependency_table()
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Dvega10_pptable.h131 UCHAR ucNumEntries; /* Number of entries. */ member
165 UCHAR ucNumEntries; /* Number of entries. */ member
171 UCHAR ucNumEntries; /* Number of entries. */ member
177 UCHAR ucNumEntries; /* Number of entries. */ member
183 UCHAR ucNumEntries; /* Number of entries. */ member
189 UCHAR ucNumEntries; /* Number of entries. */ member
195 UCHAR ucNumEntries; /* Number of entries.*/ member
201 UCHAR ucNumEntries; /* Number of entries. */ member
215 UCHAR ucNumEntries; /* Number of entries */ member
227 UCHAR ucNumEntries; /* Number of entries */ member
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Dvega10_processpptables.c83 PP_ASSERT_WITH_CODE(state_arrays->ucNumEntries > 0, in check_powerplay_tables()
322 (bool)patom_record_v2[gfxclk_dep_table->ucNumEntries-1].ucACGEnable; in init_over_drive_limits()
351 PP_ASSERT_WITH_CODE((mm_dependency_table->ucNumEntries != 0), in get_mm_clock_voltage_table()
356 mm_dependency_table->ucNumEntries; in get_mm_clock_voltage_table()
362 mm_table->count = mm_dependency_table->ucNumEntries; in get_mm_clock_voltage_table()
364 for (i = 0; i < mm_dependency_table->ucNumEntries; i++) { in get_mm_clock_voltage_table()
577 PP_ASSERT_WITH_CODE(clk_dep_table->ucNumEntries, in get_socclk_voltage_dependency_table()
582 clk_dep_table->ucNumEntries; in get_socclk_voltage_dependency_table()
589 clk_table->count = (uint32_t)clk_dep_table->ucNumEntries; in get_socclk_voltage_dependency_table()
591 for (i = 0; i < clk_dep_table->ucNumEntries; i++) { in get_socclk_voltage_dependency_table()
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Dpptable_v1_0.h166 UCHAR ucNumEntries; /* Number of entries. */ member
181 UCHAR ucNumEntries; /* Number of entries. */ member
196 UCHAR ucNumEntries; /* Number of entries. */ member
212 UCHAR ucNumEntries; /* Number of entries. */ member
224 UCHAR ucNumEntries; /* Number of entries. */ member
237 UCHAR ucNumEntries; /* Number of entries. */ member
254 UCHAR ucNumEntries; /* Number of entries. */ member
267 UCHAR ucNumEntries; /* Number of entries. */ member
339 UCHAR ucNumEntries; member
418 UCHAR ucNumEntries; member
Dprocesspptables.c96 table_size = sizeof(uint8_t) + p->ucNumEntries * sizeof(VCEClockInfo); in get_vce_clock_info_array_size()
197 p->ucNumEntries * sizeof(UVDClockInfo); in get_uvd_clock_info_array_size()
387 * table->ucNumEntries; in get_clock_voltage_dependency_table()
393 dep_table->count = (unsigned long)table->ucNumEntries; in get_clock_voltage_dependency_table()
786 if (entry_index <= pstate_arrays->ucNumEntries) { in get_state_entry_v2()
880 *num_of_entries = (unsigned long)(pstate_arrays->ucNumEntries); in pp_tables_get_num_of_entries()
915 if (entry_index > pstate_arrays->ucNumEntries) in pp_tables_get_entry()
1507 (sizeof(struct phm_cac_leakage_table) * table->ucNumEntries); in get_cac_leakage_table()
1514 cac_leakage_table->count = (ULONG)table->ucNumEntries; in get_cac_leakage_table()
1649 ptable->ucNumEntries); in init_phase_shedding_table()
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Dvega12_processpptables.c380 PP_ASSERT_WITH_CODE(state_arrays->ucNumEntries > 0,
383 PP_ASSERT_WITH_CODE((entry_index <= state_arrays->ucNumEntries),
/drivers/gpu/drm/radeon/
Dpptable.h440 UCHAR ucNumEntries; member
448 UCHAR ucNumEntries; member
459 UCHAR ucNumEntries; member
475 UCHAR ucNumEntries; // Number of entries. member
491 UCHAR ucNumEntries; // Number of entries. member
515 UCHAR ucNumEntries; // Number of entries. member
530 UCHAR ucNumEntries; // Number of entries. member
542 UCHAR ucNumEntries; member
588 UCHAR ucNumEntries; member
Dr600_dpm.c823 u32 size = atom_table->ucNumEntries * in r600_parse_clk_voltage_dep_table()
833 for (i = 0; i < atom_table->ucNumEntries; i++) { in r600_parse_clk_voltage_dep_table()
840 radeon_table->count = atom_table->ucNumEntries; in r600_parse_clk_voltage_dep_table()
972 if (clk_v->ucNumEntries) { in r600_parse_extended_power_table()
993 kcalloc(psl->ucNumEntries, in r600_parse_extended_power_table()
1002 for (i = 0; i < psl->ucNumEntries; i++) { in r600_parse_extended_power_table()
1013 psl->ucNumEntries; in r600_parse_extended_power_table()
1038 u32 size = cac_table->ucNumEntries * sizeof(struct radeon_cac_leakage_table); in r600_parse_extended_power_table()
1045 for (i = 0; i < cac_table->ucNumEntries; i++) { in r600_parse_extended_power_table()
1062 rdev->pm.dpm.dyn_state.cac_leakage_table.count = cac_table->ucNumEntries; in r600_parse_extended_power_table()
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Dtrinity_dpm.c1761 rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, in trinity_parse_power_table()
1767 for (i = 0; i < state_array->ucNumEntries; i++) { in trinity_parse_power_table()
1787 if (clock_array_index >= clock_info_array->ucNumEntries) in trinity_parse_power_table()
1804 rdev->pm.dpm.num_ps = state_array->ucNumEntries; in trinity_parse_power_table()
Dsumo_dpm.c1484 rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, in sumo_parse_power_table()
1490 for (i = 0; i < state_array->ucNumEntries; i++) { in sumo_parse_power_table()
1526 rdev->pm.dpm.num_ps = state_array->ucNumEntries; in sumo_parse_power_table()
Dkv_dpm.c2664 rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, in kv_parse_power_table()
2670 for (i = 0; i < state_array->ucNumEntries; i++) { in kv_parse_power_table()
2688 if (clock_array_index >= clock_info_array->ucNumEntries) in kv_parse_power_table()
2705 rdev->pm.dpm.num_ps = state_array->ucNumEntries; in kv_parse_power_table()
Dradeon_atombios.c2697 if (state_array->ucNumEntries == 0) in radeon_atombios_parse_power_table_6()
2699 rdev->pm.power_state = kcalloc(state_array->ucNumEntries, in radeon_atombios_parse_power_table_6()
2705 for (i = 0; i < state_array->ucNumEntries; i++) { in radeon_atombios_parse_power_table_6()
Dsi_dpm.c6822 rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, in si_parse_power_table()
6828 for (i = 0; i < state_array->ucNumEntries; i++) { in si_parse_power_table()
6849 if (clock_array_index >= clock_info_array->ucNumEntries) in si_parse_power_table()
6863 rdev->pm.dpm.num_ps = state_array->ucNumEntries; in si_parse_power_table()
Dci_dpm.c5561 rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, in ci_parse_power_table()
5568 for (i = 0; i < state_array->ucNumEntries; i++) { in ci_parse_power_table()
5591 if (clock_array_index >= clock_info_array->ucNumEntries) in ci_parse_power_table()
/drivers/gpu/drm/amd/include/
Dpptable.h481 UCHAR ucNumEntries; member
489 UCHAR ucNumEntries; member
500 UCHAR ucNumEntries; member
516 UCHAR ucNumEntries; // Number of entries. member
532 UCHAR ucNumEntries; // Number of entries. member
556 UCHAR ucNumEntries; // Number of entries. member
571 UCHAR ucNumEntries; // Number of entries. member
583 UCHAR ucNumEntries; member
629 UCHAR ucNumEntries; member
/drivers/gpu/drm/amd/pm/
Damdgpu_dpm.c234 u32 size = atom_table->ucNumEntries * in amdgpu_parse_clk_voltage_dep_table()
244 for (i = 0; i < atom_table->ucNumEntries; i++) { in amdgpu_parse_clk_voltage_dep_table()
251 amdgpu_table->count = atom_table->ucNumEntries; in amdgpu_parse_clk_voltage_dep_table()
384 if (clk_v->ucNumEntries) { in amdgpu_parse_extended_power_table()
405 kcalloc(psl->ucNumEntries, in amdgpu_parse_extended_power_table()
414 for (i = 0; i < psl->ucNumEntries; i++) { in amdgpu_parse_extended_power_table()
425 psl->ucNumEntries; in amdgpu_parse_extended_power_table()
450 u32 size = cac_table->ucNumEntries * sizeof(struct amdgpu_cac_leakage_table); in amdgpu_parse_extended_power_table()
457 for (i = 0; i < cac_table->ucNumEntries; i++) { in amdgpu_parse_extended_power_table()
474 adev->pm.dpm.dyn_state.cac_leakage_table.count = cac_table->ucNumEntries; in amdgpu_parse_extended_power_table()
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/drivers/gpu/drm/amd/pm/powerplay/
Dkv_dpm.c2723 adev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, in kv_parse_power_table()
2729 for (i = 0; i < state_array->ucNumEntries; i++) { in kv_parse_power_table()
2743 if (clock_array_index >= clock_info_array->ucNumEntries) in kv_parse_power_table()
2760 adev->pm.dpm.num_ps = state_array->ucNumEntries; in kv_parse_power_table()
Dsi_dpm.c7247 adev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, in si_parse_power_table()
7253 for (adev->pm.dpm.num_ps = 0, i = 0; i < state_array->ucNumEntries; i++) { in si_parse_power_table()
7270 if (clock_array_index >= clock_info_array->ucNumEntries) in si_parse_power_table()