Searched refs:omap3_noncore_dpll_set_rate_and_parent (Results 1 – 3 of 3) sorted by relevance
| /drivers/clk/ti/ |
| D | dpll.c | 39 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
64 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
77 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
118 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
130 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
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| D | dpll3xxx.c | 609 int omap3_noncore_dpll_set_rate_and_parent(struct clk_hw *hw, in omap3_noncore_dpll_set_rate_and_parent() function
959 return omap3_noncore_dpll_set_rate_and_parent(hw, rate, parent_rate, in omap3_dpll4_set_rate_and_parent()
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| D | clock.h | 280 int omap3_noncore_dpll_set_rate_and_parent(struct clk_hw *hw,
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