1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __ASM_ALTERNATIVE_MACROS_H 3 #define __ASM_ALTERNATIVE_MACROS_H 4 5 #include <asm/cpucaps.h> 6 7 #define ARM64_CB_PATCH ARM64_NCAPS 8 9 /* A64 instructions are always 32 bits. */ 10 #define AARCH64_INSN_SIZE 4 11 12 #ifndef BUILD_FIPS140_KO 13 #ifndef __ASSEMBLY__ 14 15 #include <linux/stringify.h> 16 17 #define ALTINSTR_ENTRY(feature) \ 18 " .word 661b - .\n" /* label */ \ 19 " .word 663f - .\n" /* new instruction */ \ 20 " .hword " __stringify(feature) "\n" /* feature bit */ \ 21 " .byte 662b-661b\n" /* source len */ \ 22 " .byte 664f-663f\n" /* replacement len */ 23 24 #define ALTINSTR_ENTRY_CB(feature, cb) \ 25 " .word 661b - .\n" /* label */ \ 26 " .word " __stringify(cb) "- .\n" /* callback */ \ 27 " .hword " __stringify(feature) "\n" /* feature bit */ \ 28 " .byte 662b-661b\n" /* source len */ \ 29 " .byte 664f-663f\n" /* replacement len */ 30 31 /* 32 * alternative assembly primitive: 33 * 34 * If any of these .org directive fail, it means that insn1 and insn2 35 * don't have the same length. This used to be written as 36 * 37 * .if ((664b-663b) != (662b-661b)) 38 * .error "Alternatives instruction length mismatch" 39 * .endif 40 * 41 * but most assemblers die if insn1 or insn2 have a .inst. This should 42 * be fixed in a binutils release posterior to 2.25.51.0.2 (anything 43 * containing commit 4e4d08cf7399b606 or c1baaddf8861). 44 * 45 * Alternatives with callbacks do not generate replacement instructions. 46 */ 47 #define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled) \ 48 ".if "__stringify(cfg_enabled)" == 1\n" \ 49 "661:\n\t" \ 50 oldinstr "\n" \ 51 "662:\n" \ 52 ".pushsection .altinstructions,\"a\"\n" \ 53 ALTINSTR_ENTRY(feature) \ 54 ".popsection\n" \ 55 ".subsection 1\n" \ 56 "663:\n\t" \ 57 newinstr "\n" \ 58 "664:\n\t" \ 59 ".org . - (664b-663b) + (662b-661b)\n\t" \ 60 ".org . - (662b-661b) + (664b-663b)\n\t" \ 61 ".previous\n" \ 62 ".endif\n" 63 64 #define __ALTERNATIVE_CFG_CB(oldinstr, feature, cfg_enabled, cb) \ 65 ".if "__stringify(cfg_enabled)" == 1\n" \ 66 "661:\n\t" \ 67 oldinstr "\n" \ 68 "662:\n" \ 69 ".pushsection .altinstructions,\"a\"\n" \ 70 ALTINSTR_ENTRY_CB(feature, cb) \ 71 ".popsection\n" \ 72 "663:\n\t" \ 73 "664:\n\t" \ 74 ".endif\n" 75 76 #define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...) \ 77 __ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg)) 78 79 #define ALTERNATIVE_CB(oldinstr, cb) \ 80 __ALTERNATIVE_CFG_CB(oldinstr, ARM64_CB_PATCH, 1, cb) 81 #else 82 83 #include <asm/assembler.h> 84 85 .macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len 86 .word \orig_offset - . 87 .word \alt_offset - . 88 .hword \feature 89 .byte \orig_len 90 .byte \alt_len 91 .endm 92 93 .macro alternative_insn insn1, insn2, cap, enable = 1 94 .if \enable 95 661: \insn1 96 662: .pushsection .altinstructions, "a" 97 altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f 98 .popsection 99 .subsection 1 100 663: \insn2 101 664: .org . - (664b-663b) + (662b-661b) 102 .org . - (662b-661b) + (664b-663b) 103 .previous 104 .endif 105 .endm 106 107 /* 108 * Alternative sequences 109 * 110 * The code for the case where the capability is not present will be 111 * assembled and linked as normal. There are no restrictions on this 112 * code. 113 * 114 * The code for the case where the capability is present will be 115 * assembled into a special section to be used for dynamic patching. 116 * Code for that case must: 117 * 118 * 1. Be exactly the same length (in bytes) as the default code 119 * sequence. 120 * 121 * 2. Not contain a branch target that is used outside of the 122 * alternative sequence it is defined in (branches into an 123 * alternative sequence are not fixed up). 124 */ 125 126 /* 127 * Begin an alternative code sequence. 128 */ 129 .macro alternative_if_not cap 130 .set .Lasm_alt_mode, 0 131 .pushsection .altinstructions, "a" 132 altinstruction_entry 661f, 663f, \cap, 662f-661f, 664f-663f 133 .popsection 134 661: 135 .endm 136 137 .macro alternative_if cap 138 .set .Lasm_alt_mode, 1 139 .pushsection .altinstructions, "a" 140 altinstruction_entry 663f, 661f, \cap, 664f-663f, 662f-661f 141 .popsection 142 .subsection 1 143 .align 2 /* So GAS knows label 661 is suitably aligned */ 144 661: 145 .endm 146 147 .macro alternative_cb cb 148 .set .Lasm_alt_mode, 0 149 .pushsection .altinstructions, "a" 150 altinstruction_entry 661f, \cb, ARM64_CB_PATCH, 662f-661f, 0 151 .popsection 152 661: 153 .endm 154 155 /* 156 * Provide the other half of the alternative code sequence. 157 */ 158 .macro alternative_else 159 662: 160 .if .Lasm_alt_mode==0 161 .subsection 1 162 .else 163 .previous 164 .endif 165 663: 166 .endm 167 168 /* 169 * Complete an alternative code sequence. 170 */ 171 .macro alternative_endif 172 664: 173 .org . - (664b-663b) + (662b-661b) 174 .org . - (662b-661b) + (664b-663b) 175 .if .Lasm_alt_mode==0 176 .previous 177 .endif 178 .endm 179 180 /* 181 * Callback-based alternative epilogue 182 */ 183 .macro alternative_cb_end 184 662: 185 .endm 186 187 /* 188 * Provides a trivial alternative or default sequence consisting solely 189 * of NOPs. The number of NOPs is chosen automatically to match the 190 * previous case. 191 */ 192 .macro alternative_else_nop_endif 193 alternative_else 194 nops (662b-661b) / AARCH64_INSN_SIZE 195 alternative_endif 196 .endm 197 198 #define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...) \ 199 alternative_insn insn1, insn2, cap, IS_ENABLED(cfg) 200 201 #endif /* __ASSEMBLY__ */ 202 203 /* 204 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature)); 205 * 206 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO)); 207 * N.B. If CONFIG_FOO is specified, but not selected, the whole block 208 * will be omitted, including oldinstr. 209 */ 210 #define ALTERNATIVE(oldinstr, newinstr, ...) \ 211 _ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1) 212 213 #else 214 215 /* 216 * The FIPS140 module does not support alternatives patching, as this 217 * invalidates the HMAC digest of the .text section. However, some alternatives 218 * are known to be irrelevant so we can tolerate them in the FIPS140 module, as 219 * they will never be applied in the first place in the use cases that the 220 * FIPS140 module targets (Android running on a production phone). Any other 221 * uses of alternatives should be avoided, as it is not safe in the general 222 * case to simply use the default sequence in one place (the fips module) and 223 * the alternative sequence everywhere else. 224 * 225 * Below is an allowlist of features that we can ignore, by simply taking the 226 * safe default instruction sequence. Note that this implies that the FIPS140 227 * module is not compatible with VHE, or with pseudo-NMI support. 228 */ 229 230 #define __ALT_ARM64_HAS_LDAPR 0, 231 #define __ALT_ARM64_HAS_VIRT_HOST_EXTN 0, 232 #define __ALT_ARM64_HAS_IRQ_PRIO_MASKING 0, 233 234 #define ALTERNATIVE(oldinstr, newinstr, feature, ...) \ 235 _ALTERNATIVE(oldinstr, __ALT_ ## feature, #feature) 236 237 #define _ALTERNATIVE(oldinstr, feature, feature_str) \ 238 __take_second_arg(feature oldinstr, \ 239 ".err Feature " feature_str " not supported in fips140 module") 240 241 #endif /* BUILD_FIPS140_KO */ 242 #endif /* __ASM_ALTERNATIVE_MACROS_H */ 243