1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef _DP_PARSER_H_ 7 #define _DP_PARSER_H_ 8 9 #include <linux/platform_device.h> 10 #include <linux/phy/phy.h> 11 #include <linux/phy/phy-dp.h> 12 13 #include "dpu_io_util.h" 14 #include "msm_drv.h" 15 16 #define DP_LABEL "MDSS DP DISPLAY" 17 #define DP_MAX_PIXEL_CLK_KHZ 675000 18 #define DP_MAX_NUM_DP_LANES 4 19 20 enum dp_pm_type { 21 DP_CORE_PM, 22 DP_CTRL_PM, 23 DP_STREAM_PM, 24 DP_PHY_PM, 25 DP_MAX_PM 26 }; 27 28 struct dss_io_data { 29 u32 len; 30 void __iomem *base; 31 }; 32 dp_parser_pm_name(enum dp_pm_type module)33static inline const char *dp_parser_pm_name(enum dp_pm_type module) 34 { 35 switch (module) { 36 case DP_CORE_PM: return "DP_CORE_PM"; 37 case DP_CTRL_PM: return "DP_CTRL_PM"; 38 case DP_STREAM_PM: return "DP_STREAM_PM"; 39 case DP_PHY_PM: return "DP_PHY_PM"; 40 default: return "???"; 41 } 42 } 43 44 /** 45 * struct dp_display_data - display related device tree data. 46 * 47 * @ctrl_node: referece to controller device 48 * @phy_node: reference to phy device 49 * @is_active: is the controller currently active 50 * @name: name of the display 51 * @display_type: type of the display 52 */ 53 struct dp_display_data { 54 struct device_node *ctrl_node; 55 struct device_node *phy_node; 56 bool is_active; 57 const char *name; 58 const char *display_type; 59 }; 60 61 /** 62 * struct dp_ctrl_resource - controller's IO related data 63 * 64 * @dp_controller: Display Port controller mapped memory address 65 * @phy_io: phy's mapped memory address 66 */ 67 struct dp_io { 68 struct dss_io_data dp_controller; 69 struct phy *phy; 70 union phy_configure_opts phy_opts; 71 }; 72 73 /** 74 * struct dp_pinctrl - DP's pin control 75 * 76 * @pin: pin-controller's instance 77 * @state_active: active state pin control 78 * @state_hpd_active: hpd active state pin control 79 * @state_suspend: suspend state pin control 80 */ 81 struct dp_pinctrl { 82 struct pinctrl *pin; 83 struct pinctrl_state *state_active; 84 struct pinctrl_state *state_hpd_active; 85 struct pinctrl_state *state_suspend; 86 }; 87 88 #define DP_DEV_REGULATOR_MAX 4 89 90 /* Regulators for DP devices */ 91 struct dp_reg_entry { 92 char name[32]; 93 int enable_load; 94 int disable_load; 95 }; 96 97 struct dp_regulator_cfg { 98 int num; 99 struct dp_reg_entry regs[DP_DEV_REGULATOR_MAX]; 100 }; 101 102 /** 103 * struct dp_parser - DP parser's data exposed to clients 104 * 105 * @pdev: platform data of the client 106 * @mp: gpio, regulator and clock related data 107 * @pinctrl: pin-control related data 108 * @disp_data: controller's display related data 109 * @parse: function to be called by client to parse device tree. 110 */ 111 struct dp_parser { 112 struct platform_device *pdev; 113 struct dss_module_power mp[DP_MAX_PM]; 114 struct dp_pinctrl pinctrl; 115 struct dp_io io; 116 struct dp_display_data disp_data; 117 const struct dp_regulator_cfg *regulator_cfg; 118 u32 max_dp_lanes; 119 120 int (*parse)(struct dp_parser *parser); 121 }; 122 123 /** 124 * dp_parser_get() - get the DP's device tree parser module 125 * 126 * @pdev: platform data of the client 127 * return: pointer to dp_parser structure. 128 * 129 * This function provides client capability to parse the 130 * device tree and populate the data structures. The data 131 * related to clock, regulators, pin-control and other 132 * can be parsed using this module. 133 */ 134 struct dp_parser *dp_parser_get(struct platform_device *pdev); 135 136 #endif 137