1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * max31790.c - Part of lm_sensors, Linux kernel modules for hardware
4 * monitoring.
5 *
6 * (C) 2015 by Il Han <corone.il.han@gmail.com>
7 */
8
9 #include <linux/err.h>
10 #include <linux/hwmon.h>
11 #include <linux/i2c.h>
12 #include <linux/init.h>
13 #include <linux/jiffies.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16
17 /* MAX31790 registers */
18 #define MAX31790_REG_GLOBAL_CONFIG 0x00
19 #define MAX31790_REG_FAN_CONFIG(ch) (0x02 + (ch))
20 #define MAX31790_REG_FAN_DYNAMICS(ch) (0x08 + (ch))
21 #define MAX31790_REG_FAN_FAULT_STATUS2 0x10
22 #define MAX31790_REG_FAN_FAULT_STATUS1 0x11
23 #define MAX31790_REG_TACH_COUNT(ch) (0x18 + (ch) * 2)
24 #define MAX31790_REG_PWM_DUTY_CYCLE(ch) (0x30 + (ch) * 2)
25 #define MAX31790_REG_PWMOUT(ch) (0x40 + (ch) * 2)
26 #define MAX31790_REG_TARGET_COUNT(ch) (0x50 + (ch) * 2)
27
28 /* Fan Config register bits */
29 #define MAX31790_FAN_CFG_RPM_MODE 0x80
30 #define MAX31790_FAN_CFG_CTRL_MON 0x10
31 #define MAX31790_FAN_CFG_TACH_INPUT_EN 0x08
32 #define MAX31790_FAN_CFG_TACH_INPUT 0x01
33
34 /* Fan Dynamics register bits */
35 #define MAX31790_FAN_DYN_SR_SHIFT 5
36 #define MAX31790_FAN_DYN_SR_MASK 0xE0
37 #define SR_FROM_REG(reg) (((reg) & MAX31790_FAN_DYN_SR_MASK) \
38 >> MAX31790_FAN_DYN_SR_SHIFT)
39
40 #define FAN_RPM_MIN 120
41 #define FAN_RPM_MAX 7864320
42
43 #define RPM_FROM_REG(reg, sr) (((reg) >> 4) ? \
44 ((60 * (sr) * 8192) / ((reg) >> 4)) : \
45 FAN_RPM_MAX)
46 #define RPM_TO_REG(rpm, sr) ((60 * (sr) * 8192) / ((rpm) * 2))
47
48 #define NR_CHANNEL 6
49
50 /*
51 * Client data (each client gets its own)
52 */
53 struct max31790_data {
54 struct i2c_client *client;
55 struct mutex update_lock;
56 bool valid; /* zero until following fields are valid */
57 unsigned long last_updated; /* in jiffies */
58
59 /* register values */
60 u8 fan_config[NR_CHANNEL];
61 u8 fan_dynamics[NR_CHANNEL];
62 u16 fault_status;
63 u16 tach[NR_CHANNEL * 2];
64 u16 pwm[NR_CHANNEL];
65 u16 target_count[NR_CHANNEL];
66 };
67
max31790_update_device(struct device * dev)68 static struct max31790_data *max31790_update_device(struct device *dev)
69 {
70 struct max31790_data *data = dev_get_drvdata(dev);
71 struct i2c_client *client = data->client;
72 struct max31790_data *ret = data;
73 int i;
74 int rv;
75
76 mutex_lock(&data->update_lock);
77
78 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
79 rv = i2c_smbus_read_byte_data(client,
80 MAX31790_REG_FAN_FAULT_STATUS1);
81 if (rv < 0)
82 goto abort;
83 data->fault_status = rv & 0x3F;
84
85 rv = i2c_smbus_read_byte_data(client,
86 MAX31790_REG_FAN_FAULT_STATUS2);
87 if (rv < 0)
88 goto abort;
89 data->fault_status |= (rv & 0x3F) << 6;
90
91 for (i = 0; i < NR_CHANNEL; i++) {
92 rv = i2c_smbus_read_word_swapped(client,
93 MAX31790_REG_TACH_COUNT(i));
94 if (rv < 0)
95 goto abort;
96 data->tach[i] = rv;
97
98 if (data->fan_config[i]
99 & MAX31790_FAN_CFG_TACH_INPUT) {
100 rv = i2c_smbus_read_word_swapped(client,
101 MAX31790_REG_TACH_COUNT(NR_CHANNEL
102 + i));
103 if (rv < 0)
104 goto abort;
105 data->tach[NR_CHANNEL + i] = rv;
106 } else {
107 rv = i2c_smbus_read_word_swapped(client,
108 MAX31790_REG_PWM_DUTY_CYCLE(i));
109 if (rv < 0)
110 goto abort;
111 data->pwm[i] = rv;
112
113 rv = i2c_smbus_read_word_swapped(client,
114 MAX31790_REG_TARGET_COUNT(i));
115 if (rv < 0)
116 goto abort;
117 data->target_count[i] = rv;
118 }
119 }
120
121 data->last_updated = jiffies;
122 data->valid = true;
123 }
124 goto done;
125
126 abort:
127 data->valid = false;
128 ret = ERR_PTR(rv);
129
130 done:
131 mutex_unlock(&data->update_lock);
132
133 return ret;
134 }
135
136 static const u8 tach_period[8] = { 1, 2, 4, 8, 16, 32, 32, 32 };
137
get_tach_period(u8 fan_dynamics)138 static u8 get_tach_period(u8 fan_dynamics)
139 {
140 return tach_period[SR_FROM_REG(fan_dynamics)];
141 }
142
bits_for_tach_period(int rpm)143 static u8 bits_for_tach_period(int rpm)
144 {
145 u8 bits;
146
147 if (rpm < 500)
148 bits = 0x0;
149 else if (rpm < 1000)
150 bits = 0x1;
151 else if (rpm < 2000)
152 bits = 0x2;
153 else if (rpm < 4000)
154 bits = 0x3;
155 else if (rpm < 8000)
156 bits = 0x4;
157 else
158 bits = 0x5;
159
160 return bits;
161 }
162
max31790_read_fan(struct device * dev,u32 attr,int channel,long * val)163 static int max31790_read_fan(struct device *dev, u32 attr, int channel,
164 long *val)
165 {
166 struct max31790_data *data = max31790_update_device(dev);
167 int sr, rpm;
168
169 if (IS_ERR(data))
170 return PTR_ERR(data);
171
172 switch (attr) {
173 case hwmon_fan_input:
174 sr = get_tach_period(data->fan_dynamics[channel % NR_CHANNEL]);
175 rpm = RPM_FROM_REG(data->tach[channel], sr);
176 *val = rpm;
177 return 0;
178 case hwmon_fan_target:
179 sr = get_tach_period(data->fan_dynamics[channel]);
180 rpm = RPM_FROM_REG(data->target_count[channel], sr);
181 *val = rpm;
182 return 0;
183 case hwmon_fan_fault:
184 *val = !!(data->fault_status & (1 << channel));
185 return 0;
186 default:
187 return -EOPNOTSUPP;
188 }
189 }
190
max31790_write_fan(struct device * dev,u32 attr,int channel,long val)191 static int max31790_write_fan(struct device *dev, u32 attr, int channel,
192 long val)
193 {
194 struct max31790_data *data = dev_get_drvdata(dev);
195 struct i2c_client *client = data->client;
196 int target_count;
197 int err = 0;
198 u8 bits;
199 int sr;
200
201 mutex_lock(&data->update_lock);
202
203 switch (attr) {
204 case hwmon_fan_target:
205 val = clamp_val(val, FAN_RPM_MIN, FAN_RPM_MAX);
206 bits = bits_for_tach_period(val);
207 data->fan_dynamics[channel] =
208 ((data->fan_dynamics[channel] &
209 ~MAX31790_FAN_DYN_SR_MASK) |
210 (bits << MAX31790_FAN_DYN_SR_SHIFT));
211 err = i2c_smbus_write_byte_data(client,
212 MAX31790_REG_FAN_DYNAMICS(channel),
213 data->fan_dynamics[channel]);
214 if (err < 0)
215 break;
216
217 sr = get_tach_period(data->fan_dynamics[channel]);
218 target_count = RPM_TO_REG(val, sr);
219 target_count = clamp_val(target_count, 0x1, 0x7FF);
220
221 data->target_count[channel] = target_count << 5;
222
223 err = i2c_smbus_write_word_swapped(client,
224 MAX31790_REG_TARGET_COUNT(channel),
225 data->target_count[channel]);
226 break;
227 default:
228 err = -EOPNOTSUPP;
229 break;
230 }
231
232 mutex_unlock(&data->update_lock);
233
234 return err;
235 }
236
max31790_fan_is_visible(const void * _data,u32 attr,int channel)237 static umode_t max31790_fan_is_visible(const void *_data, u32 attr, int channel)
238 {
239 const struct max31790_data *data = _data;
240 u8 fan_config = data->fan_config[channel % NR_CHANNEL];
241
242 switch (attr) {
243 case hwmon_fan_input:
244 case hwmon_fan_fault:
245 if (channel < NR_CHANNEL ||
246 (fan_config & MAX31790_FAN_CFG_TACH_INPUT))
247 return 0444;
248 return 0;
249 case hwmon_fan_target:
250 if (channel < NR_CHANNEL &&
251 !(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
252 return 0644;
253 return 0;
254 default:
255 return 0;
256 }
257 }
258
max31790_read_pwm(struct device * dev,u32 attr,int channel,long * val)259 static int max31790_read_pwm(struct device *dev, u32 attr, int channel,
260 long *val)
261 {
262 struct max31790_data *data = max31790_update_device(dev);
263 u8 fan_config;
264
265 if (IS_ERR(data))
266 return PTR_ERR(data);
267
268 fan_config = data->fan_config[channel];
269
270 switch (attr) {
271 case hwmon_pwm_input:
272 *val = data->pwm[channel] >> 8;
273 return 0;
274 case hwmon_pwm_enable:
275 if (fan_config & MAX31790_FAN_CFG_CTRL_MON)
276 *val = 0;
277 else if (fan_config & MAX31790_FAN_CFG_RPM_MODE)
278 *val = 2;
279 else
280 *val = 1;
281 return 0;
282 default:
283 return -EOPNOTSUPP;
284 }
285 }
286
max31790_write_pwm(struct device * dev,u32 attr,int channel,long val)287 static int max31790_write_pwm(struct device *dev, u32 attr, int channel,
288 long val)
289 {
290 struct max31790_data *data = dev_get_drvdata(dev);
291 struct i2c_client *client = data->client;
292 u8 fan_config;
293 int err = 0;
294
295 mutex_lock(&data->update_lock);
296
297 switch (attr) {
298 case hwmon_pwm_input:
299 if (val < 0 || val > 255) {
300 err = -EINVAL;
301 break;
302 }
303 data->valid = false;
304 err = i2c_smbus_write_word_swapped(client,
305 MAX31790_REG_PWMOUT(channel),
306 val << 8);
307 break;
308 case hwmon_pwm_enable:
309 fan_config = data->fan_config[channel];
310 if (val == 0) {
311 fan_config |= MAX31790_FAN_CFG_CTRL_MON;
312 /*
313 * Disable RPM mode; otherwise disabling fan speed
314 * monitoring is not possible.
315 */
316 fan_config &= ~MAX31790_FAN_CFG_RPM_MODE;
317 } else if (val == 1) {
318 fan_config &= ~(MAX31790_FAN_CFG_CTRL_MON | MAX31790_FAN_CFG_RPM_MODE);
319 } else if (val == 2) {
320 fan_config &= ~MAX31790_FAN_CFG_CTRL_MON;
321 /*
322 * The chip sets MAX31790_FAN_CFG_TACH_INPUT_EN on its
323 * own if MAX31790_FAN_CFG_RPM_MODE is set.
324 * Do it here as well to reflect the actual register
325 * value in the cache.
326 */
327 fan_config |= (MAX31790_FAN_CFG_RPM_MODE | MAX31790_FAN_CFG_TACH_INPUT_EN);
328 } else {
329 err = -EINVAL;
330 break;
331 }
332 if (fan_config != data->fan_config[channel]) {
333 err = i2c_smbus_write_byte_data(client, MAX31790_REG_FAN_CONFIG(channel),
334 fan_config);
335 if (!err)
336 data->fan_config[channel] = fan_config;
337 }
338 break;
339 default:
340 err = -EOPNOTSUPP;
341 break;
342 }
343
344 mutex_unlock(&data->update_lock);
345
346 return err;
347 }
348
max31790_pwm_is_visible(const void * _data,u32 attr,int channel)349 static umode_t max31790_pwm_is_visible(const void *_data, u32 attr, int channel)
350 {
351 const struct max31790_data *data = _data;
352 u8 fan_config = data->fan_config[channel];
353
354 switch (attr) {
355 case hwmon_pwm_input:
356 case hwmon_pwm_enable:
357 if (!(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
358 return 0644;
359 return 0;
360 default:
361 return 0;
362 }
363 }
364
max31790_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * val)365 static int max31790_read(struct device *dev, enum hwmon_sensor_types type,
366 u32 attr, int channel, long *val)
367 {
368 switch (type) {
369 case hwmon_fan:
370 return max31790_read_fan(dev, attr, channel, val);
371 case hwmon_pwm:
372 return max31790_read_pwm(dev, attr, channel, val);
373 default:
374 return -EOPNOTSUPP;
375 }
376 }
377
max31790_write(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long val)378 static int max31790_write(struct device *dev, enum hwmon_sensor_types type,
379 u32 attr, int channel, long val)
380 {
381 switch (type) {
382 case hwmon_fan:
383 return max31790_write_fan(dev, attr, channel, val);
384 case hwmon_pwm:
385 return max31790_write_pwm(dev, attr, channel, val);
386 default:
387 return -EOPNOTSUPP;
388 }
389 }
390
max31790_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)391 static umode_t max31790_is_visible(const void *data,
392 enum hwmon_sensor_types type,
393 u32 attr, int channel)
394 {
395 switch (type) {
396 case hwmon_fan:
397 return max31790_fan_is_visible(data, attr, channel);
398 case hwmon_pwm:
399 return max31790_pwm_is_visible(data, attr, channel);
400 default:
401 return 0;
402 }
403 }
404
405 static const struct hwmon_channel_info *max31790_info[] = {
406 HWMON_CHANNEL_INFO(fan,
407 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
408 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
409 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
410 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
411 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
412 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
413 HWMON_F_INPUT | HWMON_F_FAULT,
414 HWMON_F_INPUT | HWMON_F_FAULT,
415 HWMON_F_INPUT | HWMON_F_FAULT,
416 HWMON_F_INPUT | HWMON_F_FAULT,
417 HWMON_F_INPUT | HWMON_F_FAULT,
418 HWMON_F_INPUT | HWMON_F_FAULT),
419 HWMON_CHANNEL_INFO(pwm,
420 HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
421 HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
422 HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
423 HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
424 HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
425 HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
426 NULL
427 };
428
429 static const struct hwmon_ops max31790_hwmon_ops = {
430 .is_visible = max31790_is_visible,
431 .read = max31790_read,
432 .write = max31790_write,
433 };
434
435 static const struct hwmon_chip_info max31790_chip_info = {
436 .ops = &max31790_hwmon_ops,
437 .info = max31790_info,
438 };
439
max31790_init_client(struct i2c_client * client,struct max31790_data * data)440 static int max31790_init_client(struct i2c_client *client,
441 struct max31790_data *data)
442 {
443 int i, rv;
444
445 for (i = 0; i < NR_CHANNEL; i++) {
446 rv = i2c_smbus_read_byte_data(client,
447 MAX31790_REG_FAN_CONFIG(i));
448 if (rv < 0)
449 return rv;
450 data->fan_config[i] = rv;
451
452 rv = i2c_smbus_read_byte_data(client,
453 MAX31790_REG_FAN_DYNAMICS(i));
454 if (rv < 0)
455 return rv;
456 data->fan_dynamics[i] = rv;
457 }
458
459 return 0;
460 }
461
max31790_probe(struct i2c_client * client)462 static int max31790_probe(struct i2c_client *client)
463 {
464 struct i2c_adapter *adapter = client->adapter;
465 struct device *dev = &client->dev;
466 struct max31790_data *data;
467 struct device *hwmon_dev;
468 int err;
469
470 if (!i2c_check_functionality(adapter,
471 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
472 return -ENODEV;
473
474 data = devm_kzalloc(dev, sizeof(struct max31790_data), GFP_KERNEL);
475 if (!data)
476 return -ENOMEM;
477
478 data->client = client;
479 mutex_init(&data->update_lock);
480
481 /*
482 * Initialize the max31790 chip
483 */
484 err = max31790_init_client(client, data);
485 if (err)
486 return err;
487
488 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
489 data,
490 &max31790_chip_info,
491 NULL);
492
493 return PTR_ERR_OR_ZERO(hwmon_dev);
494 }
495
496 static const struct i2c_device_id max31790_id[] = {
497 { "max31790", 0 },
498 { }
499 };
500 MODULE_DEVICE_TABLE(i2c, max31790_id);
501
502 static struct i2c_driver max31790_driver = {
503 .class = I2C_CLASS_HWMON,
504 .probe_new = max31790_probe,
505 .driver = {
506 .name = "max31790",
507 },
508 .id_table = max31790_id,
509 };
510
511 module_i2c_driver(max31790_driver);
512
513 MODULE_AUTHOR("Il Han <corone.il.han@gmail.com>");
514 MODULE_DESCRIPTION("MAX31790 sensor driver");
515 MODULE_LICENSE("GPL");
516